M Hightower c2f136515a

Fixes exceptions resulting from using SPI0Command (#9140) ...

* Resolves exceptions occuring when using SPI0Command for flash write operations
such as: Write Status Register-1, Sector Eraser, etc.

Moved PRECACHE_END to ensure `Wait_SPI_Idlep` and `xt_wsr_ps` are included in the iCache.

Added SPIUCSSETUP to give more settling time for #CS.

* There was a risk of flash reads inserted between an "enable opcode"
and the "target opcode". They are now tightly coupled.

Update flash quirks.

* When sending instruction Write Enable 0x06, use BootROM API
SPI_write_enable for the special handling of the WEL bit.

Corrected zero mask for fractional byte returns where the partial
byte bits are positioned at the most significant bit position in the byte.

2024-07-26 00:03:52 +03:00

..

esp8266

Fixes exceptions resulting from using SPI0Command (#9140)

2024-07-26 00:03:52 +03:00