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https://github.com/esp8266/Arduino.git
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360 lines
12 KiB
C++
360 lines
12 KiB
C++
/*
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phy.c - ESP8266 PHY initialization data
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Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
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This file is part of the esp8266 core for Arduino environment.
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This library is free software; you can redistribute it and/or
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modify it under the terms of the GNU Lesser General Public
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License as published by the Free Software Foundation; either
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version 2.1 of the License, or (at your option) any later version.
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This library is distributed in the hope that it will be useful,
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but WITHOUT ANY WARRANTY; without even the implied warranty of
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MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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Lesser General Public License for more details.
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You should have received a copy of the GNU Lesser General Public
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License along with this library; if not, write to the Free Software
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Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
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*/
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#include <stdint.h>
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#include <stddef.h>
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#include <stdbool.h>
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#include <string.h>
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#include "c_types.h"
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#include "ets_sys.h"
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#include "spi_flash.h"
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#include "user_interface.h"
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extern "C" {
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static const uint8_t ICACHE_FLASH_ATTR phy_init_data[128] =
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{
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/*[0] =*/ 5, // Reserved, do not change
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/*[1] =*/ 8, // Reserved, do not change
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/*[2] =*/ 4, // Reserved, do not change
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/*[3] =*/ 2, // Reserved, do not change
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/*[4] =*/ 5, // Reserved, do not change
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/*[5] =*/ 5, // Reserved, do not change
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/*[6] =*/ 5, // Reserved, do not change
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/*[7] =*/ 2, // Reserved, do not change
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/*[8] =*/ 5, // Reserved, do not change
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/*[9] =*/ 0, // Reserved, do not change
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/*[10] =*/ 4, // Reserved, do not change
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/*[11] =*/ 5, // Reserved, do not change
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/*[12] =*/ 5, // Reserved, do not change
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/*[13] =*/ 4, // Reserved, do not change
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/*[14] =*/ 5, // Reserved, do not change
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/*[15] =*/ 5, // Reserved, do not change
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/*[16] =*/ 4, // Reserved, do not change
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/*[17] =*/ (uint8_t)-2, // Reserved, do not change
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/*[18] =*/ (uint8_t)-3, // Reserved, do not change
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/*[19] =*/ (uint8_t)-1, // Reserved, do not change
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/*[20] =*/ (uint8_t)-16, // Reserved, do not change
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/*[21] =*/ (uint8_t)-16, // Reserved, do not change
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/*[22] =*/ (uint8_t)-16, // Reserved, do not change
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/*[23] =*/ (uint8_t)-32, // Reserved, do not change
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/*[24] =*/ (uint8_t)-32, // Reserved, do not change
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/*[25] =*/ (uint8_t)-32, // Reserved, do not change
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/*[26] =*/ 225, // spur_freq_cfg, spur_freq=spur_freq_cfg/spur_freq_cfg_div
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/*[27] =*/ 10, // spur_freq_cfg_div
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// each bit for 1 channel, 1 to select the spur_freq if in band, else 40
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/*[28] =*/ 0xff, // spur_freq_en_h
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/*[29] =*/ 0xff, // spur_freq_en_l
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/*[30] =*/ 0xf8, // Reserved, do not change
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/*[31] =*/ 0, // Reserved, do not change
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/*[32] =*/ 0xf8, // Reserved, do not change
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/*[33] =*/ 0xf8, // Reserved, do not change
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/*[34] =*/ 78, // target_power_qdb_0, target power is 78/4=19.5dbm
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/*[35] =*/ 74, // target_power_qdb_1, target power is 74/4=18.5dbm
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/*[36] =*/ 70, // target_power_qdb_2, target power is 70/4=17.5dbm
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/*[37] =*/ 64, // target_power_qdb_3, target power is 64/4=16dbm
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/*[38] =*/ 60, // target_power_qdb_4, target power is 60/4=15dbm
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/*[39] =*/ 56, // target_power_qdb_5, target power is 56/4=14dbm
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/*[40] =*/ 0, // target_power_index_mcs0
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/*[41] =*/ 0, // target_power_index_mcs1
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/*[42] =*/ 1, // target_power_index_mcs2
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/*[43] =*/ 1, // target_power_index_mcs3
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/*[44] =*/ 2, // target_power_index_mcs4
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/*[45] =*/ 3, // target_power_index_mcs5
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/*[46] =*/ 4, // target_power_index_mcs6
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/*[47] =*/ 5, // target_power_index_mcs7
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// crystal_26m_en
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// 0: 40MHz
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// 1: 26MHz
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// 2: 24MHz
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#if F_CRYSTAL == 40000000
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/*[48] =*/ 0,
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#else
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/*[48] =*/ 1,
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#endif
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/*[49] =*/ 0,
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// sdio_configure
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// 0: Auto by pin strapping
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// 1: SDIO dataoutput is at negative edges (SDIO V1.1)
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// 2: SDIO dataoutput is at positive edges (SDIO V2.0)
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/*[50] =*/ 0,
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// bt_configure
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// 0: None,no bluetooth
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// 1: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
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// MTMS -> BT_ACTIVE
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// MTCK -> BT_PRIORITY
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// U0RXD -> ANT_SEL_BT
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// 2: None, have bluetooth
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// 3: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
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// MTMS -> BT_PRIORITY
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// MTCK -> BT_ACTIVE
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// U0RXD -> ANT_SEL_BT
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/*[51] =*/ 0,
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// bt_protocol
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// 0: WiFi-BT are not enabled. Antenna is for WiFi
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// 1: WiFi-BT are not enabled. Antenna is for BT
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// 2: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), independent ant
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// 3: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), independent ant
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// 4: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), share ant
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// 5: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), share ant
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/*[52] =*/ 0,
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// dual_ant_configure
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// 0: None
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// 1: dual_ant (antenna diversity for WiFi-only): GPIO0 + U0RXD
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// 2: T/R switch for External PA/LNA: GPIO0 is high and U0RXD is low during Tx
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// 3: T/R switch for External PA/LNA: GPIO0 is low and U0RXD is high during Tx
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/*[53] =*/ 0,
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/*[54] =*/ 2, // Reserved, do not change
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// share_xtal
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// This option is to share crystal clock for BT
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// The state of Crystal during sleeping
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// 0: Off
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// 1: Forcely On
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// 2: Automatically On according to XPD_DCDC
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// 3: Automatically On according to GPIO2
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/*[55] =*/ 0,
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/*[56] =*/ 0,
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/*[57] =*/ 0,
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/*[58] =*/ 0,
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/*[59] =*/ 0,
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/*[60] =*/ 0,
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/*[61] =*/ 0,
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/*[62] =*/ 0,
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/*[63] =*/ 0,
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/*[64] =*/ 225, // spur_freq_cfg_2, spur_freq_2=spur_freq_cfg_2/spur_freq_cfg_div_2
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/*[65] =*/ 10, // spur_freq_cfg_div_2
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/*[66] =*/ 0, // spur_freq_en_h_2
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/*[67] =*/ 0, // spur_freq_en_l_2
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/*[68] =*/ 0, // spur_freq_cfg_msb
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/*[69] =*/ 0, // spur_freq_cfg_2_msb
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/*[70] =*/ 0, // spur_freq_cfg_3_low
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/*[71] =*/ 0, // spur_freq_cfg_3_high
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/*[72] =*/ 0, // spur_freq_cfg_4_low
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/*[73] =*/ 0, // spur_freq_cfg_4_high
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/*[74] =*/ 1, // Reserved, do not change
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/*[75] =*/ 0x93, // Reserved, do not change
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/*[76] =*/ 0x43, // Reserved, do not change
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/*[77] =*/ 0x00, // Reserved, do not change
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/*[78] =*/ 0,
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/*[79] =*/ 0,
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/*[80] =*/ 0,
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/*[81] =*/ 0,
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/*[82] =*/ 0,
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/*[83] =*/ 0,
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/*[84] =*/ 0,
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/*[85] =*/ 0,
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/*[86] =*/ 0,
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/*[87] =*/ 0,
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/*[88] =*/ 0,
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/*[89] =*/ 0,
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/*[90] =*/ 0,
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/*[91] =*/ 0,
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/*[92] =*/ 0,
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// low_power_en
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// 0: disable low power mode
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// 1: enable low power mode
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/*[93] =*/ 0,
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// lp_rf_stg10
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// the attenuation of RF gain stage 0 and 1,
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// 0xf: 0db,
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// 0xe: -2.5db,
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// 0xd: -6db,
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// 0x9: -8.5db,
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// 0xc: -11.5db,
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// 0x8: -14db,
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// 0x4: -17.5,
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// 0x0: -23
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/*[94] =*/ 0x00,
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// lp_bb_att_ext
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// the attenuation of BB gain,
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// 0: 0db,
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// 1: -0.25db,
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// 2: -0.5db,
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// 3: -0.75db,
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// 4: -1db,
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// 5: -1.25db,
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// 6: -1.5db,
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// 7: -1.75db,
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// 8: -2db
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// max valve is 24(-6db)
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/*[95] =*/ 0,
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// pwr_ind_11b_en
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// 0: 11b power is same as mcs0 and 6m
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// 1: enable 11b power different with ofdm
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/*[96] =*/ 0,
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// pwr_ind_11b_0
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// 1m, 2m power index [0~5]
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/*[97] =*/ 0,
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// pwr_ind_11b_1
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// 5.5m, 11m power index [0~5]
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/*[98] =*/ 0,
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/*[99] =*/ 0,
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/*[100] =*/ 0,
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/*[101] =*/ 0,
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/*[102] =*/ 0,
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/*[103] =*/ 0,
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/*[104] =*/ 0,
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/*[105] =*/ 0,
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/*[106] =*/ 0,
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// vdd33_const
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// the voltage of PA_VDD
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// x=0xff: it can measure VDD33,
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// 18<=x<=36: use input voltage,
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// the value is voltage*10, 33 is 3.3V, 30 is 3.0V,
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// x<18 or x>36: default voltage is 3.3V
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//
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// the value of this byte depend from the TOUT pin usage (1 or 2):
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// 1)
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// analogRead function (system_adc_read()):
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// is only available when wire TOUT pin17 to external circuitry, Input Voltage Range restricted to 0 ~ 1.0V.
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// For this function the vdd33_const must be set as real power voltage of VDD3P3 pin 3 and 4
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// The range of operating voltage of ESP8266 is 1.8V~3.6V，the unit of vdd33_const is 0.1V，so effective value range of vdd33_const is [18,36]
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// 2)
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// getVcc function (system_get_vdd33):
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// is only available when TOUT pin17 is suspended (floating), this function measure the power voltage of VDD3P3 pin 3 and 4
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// For this function the vdd33_const must be set to 255 (0xFF).
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/*[107] =*/ 33,
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// disable RF calibration for certain number of times
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/*[108] =*/ 0,
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/*[109] =*/ 0,
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/*[110] =*/ 0,
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/*[111] =*/ 0,
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// freq_correct_en
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// bit[0]:0->do not correct frequency offset, 1->correct frequency offset.
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// bit[1]:0->bbpll is 168M, it can correct + and - frequency offset, 1->bbpll is 160M, it only can correct + frequency offset
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// bit[2]:0->auto measure frequency offset and correct it, 1->use 113 byte force_freq_offset to correct frequency offset.
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// 0: do not correct frequency offset.
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// 1: auto measure frequency offset and correct it, bbpll is 168M, it can correct + and - frequency offset.
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// 3: auto measure frequency offset and correct it, bbpll is 160M, it only can correct + frequency offset.
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// 5: use 113 byte force_freq_offset to correct frequency offset, bbpll is 168M, it can correct + and - frequency offset.
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// 7: use 113 byte force_freq_offset to correct frequency offset, bbpll is 160M , it only can correct + frequency offset.
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/*[112] =*/ 0,
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// force_freq_offset
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// signed, unit is 8kHz
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/*[113] =*/ 0,
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// rf_cal_use_flash
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// 0: RF init no RF CAL, using all RF CAL data in flash, it takes about 2ms for RF init
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// 1: RF init only do TX power control CAL, others using RF CAL data in flash, it takes about 20ms for RF init
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// 2: RF init no RF CAL, using all RF CAL data in flash, it takes about 2ms for RF init (same as 0?!)
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// 3: RF init do all RF CAL, it takes about 200ms for RF init
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/*[114] =*/ 1
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};
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// These functions will be overridden from C++ code.
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// Unfortunately, we can't use extern "C" because Arduino preprocessor
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// doesn't generate forward declarations for extern "C" functions correctly,
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// so we use mangled names here.
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#define __get_adc_mode _Z14__get_adc_modev
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#define __get_rf_mode _Z13__get_rf_modev
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#define __run_user_rf_pre_init _Z22__run_user_rf_pre_initv
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static bool spoof_init_data = false;
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extern int __real_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size);
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extern int IRAM_ATTR __wrap_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size);
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extern int __get_adc_mode();
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extern int IRAM_ATTR __wrap_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size)
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{
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if (!spoof_init_data || size != 128) {
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return __real_spi_flash_read(addr, dst, size);
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}
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memcpy(dst, phy_init_data, sizeof(phy_init_data));
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((uint8_t*)dst)[107] = __get_adc_mode();
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return 0;
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}
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extern int __get_rf_mode(void) __attribute__((weak));
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extern int __get_rf_mode(void)
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{
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return -1; // mode not set
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}
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extern int __get_adc_mode(void) __attribute__((weak));
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extern int __get_adc_mode(void)
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{
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return 33; // default ADC mode
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}
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extern void __run_user_rf_pre_init(void) __attribute__((weak));
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extern void __run_user_rf_pre_init(void)
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{
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return; // default do noting
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}
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uint32_t user_rf_cal_sector_set(void)
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{
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spoof_init_data = true;
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return flashchip->chip_size/SPI_FLASH_SEC_SIZE - 4;
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}
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void user_rf_pre_init()
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{
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// *((volatile uint32_t*) 0x60000710) = 0;
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spoof_init_data = false;
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volatile uint32_t* rtc_reg = (volatile uint32_t*) 0x60001000;
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rtc_reg[30] = 0;
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system_set_os_print(0);
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int rf_mode = __get_rf_mode();
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if (rf_mode >= 0) {
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system_phy_set_rfoption(rf_mode);
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}
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__run_user_rf_pre_init();
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}
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void IRAM_ATTR user_spi_flash_dio_to_qio_pre_init() {}
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};
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