mirror of
https://github.com/esp8266/Arduino.git
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07b4c09b90
RODATA can be copied automatically by the bootrom, so no reason not to allow its use for strings and constants in eboot.c Revert to pfalcon's original uzlib since the single patch to remove RODATA is not required. Rationalize eboot.ld linker script, clean up BSS and init it in code. Saves 112 bytes of space in the bootloader sector by removing the extra code associated with literal loads. * Move CRC out of bootload sector We added protection to only erase the bootload sector when flashing an image when the new sector != the old sector. This was intended to minimize the chance of bricking (i.e. if there was a powerfail during flashing of the boot sector the chip would be dead). Unfortunately, by placing the CRC inside the eboot sector *every* application will have a unique eboot sector (due to the crc/len), so this protection doesn't work. Move the CRC into the first 8 bytes of IROM itself. This frees up extra space in the boot sector and ensures that eboot won't be reflashed unless there really is an eboot change.
154 lines
3.8 KiB
Plaintext
154 lines
3.8 KiB
Plaintext
/* This linker script generated from xt-genldscripts.tpp for LSP . */
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/* Linker Script for ld -N */
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFE8000, len = 0x14000
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iram1_0_seg : org = 0x4010f000, len = 0x1000
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irom0_0_seg : org = 0x40240000, len = 0x32000
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}
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PHDRS
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{
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dport0_0_phdr PT_LOAD;
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dram0_0_phdr PT_LOAD;
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dram0_0_bss_phdr PT_LOAD;
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iram1_0_phdr PT_LOAD;
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irom0_0_phdr PT_LOAD;
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}
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/* Default entry point: */
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ENTRY(main)
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PROVIDE(_memmap_vecbase_reset = 0x40000000);
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/* Various memory-map dependent cache attribute settings: */
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_memmap_cacheattr_wb_base = 0x00000110;
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_memmap_cacheattr_wt_base = 0x00000110;
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_memmap_cacheattr_bp_base = 0x00000220;
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_memmap_cacheattr_unused_mask = 0xFFFFF00F;
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_memmap_cacheattr_wb_trapnull = 0x2222211F;
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_memmap_cacheattr_wba_trapnull = 0x2222211F;
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_memmap_cacheattr_wbna_trapnull = 0x2222211F;
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_memmap_cacheattr_wt_trapnull = 0x2222211F;
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_memmap_cacheattr_bp_trapnull = 0x2222222F;
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_memmap_cacheattr_wb_strict = 0xFFFFF11F;
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_memmap_cacheattr_wt_strict = 0xFFFFF11F;
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_memmap_cacheattr_bp_strict = 0xFFFFF22F;
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_memmap_cacheattr_wb_allvalid = 0x22222112;
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_memmap_cacheattr_wt_allvalid = 0x22222112;
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_memmap_cacheattr_bp_allvalid = 0x22222222;
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PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
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SECTIONS
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{
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.globals : ALIGN(4)
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{
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*(COMMON) /* Global vars */
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} >dram0_0_seg :dram0_0_bss_phdr
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.data : ALIGN(4)
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{
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_data_start = ABSOLUTE(.);
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*(.data)
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*(.data.*)
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*(.gnu.linkonce.d.*)
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*(.data1)
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*(.sdata)
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*(.sdata.*)
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*(.gnu.linkonce.s.*)
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*(.sdata2)
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*(.sdata2.*)
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*(.gnu.linkonce.s2.*)
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*(.jcr)
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_data_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_bss_phdr
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.rodata : ALIGN(4)
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{
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_rodata_start = ABSOLUTE(.);
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*(.rodata)
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*(.rodata.*)
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*(.gnu.linkonce.r.*)
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*(.rodata1)
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__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
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*(.xt_except_table)
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*(.gcc_except_table)
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*(.gnu.linkonce.e.*)
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*(.gnu.version_r)
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*(.eh_frame)
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/* C++ constructor and destructor tables, properly ordered: */
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KEEP (*crtbegin.o(.ctors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
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KEEP (*(SORT(.ctors.*)))
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KEEP (*(.ctors))
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KEEP (*crtbegin.o(.dtors))
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KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
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KEEP (*(SORT(.dtors.*)))
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KEEP (*(.dtors))
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/* C++ exception handlers table: */
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__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
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*(.xt_except_desc)
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*(.gnu.linkonce.h.*)
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__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
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*(.xt_except_desc_end)
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*(.dynamic)
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*(.gnu.version_d)
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_rodata_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_bss_phdr
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.bss : ALIGN(4)
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{
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_bss_start = ABSOLUTE(.);
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*(.dynsbss)
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*(.sbss)
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*(.sbss.*)
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*(.gnu.linkonce.sb.*)
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*(.scommon)
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*(.sbss2)
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*(.sbss2.*)
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*(.gnu.linkonce.sb2.*)
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*(.dynbss)
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*(.bss)
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*(.bss.*)
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*(.gnu.linkonce.b.*)
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_bss_end = ABSOLUTE(.);
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} >dram0_0_seg :dram0_0_bss_phdr
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.text : ALIGN(4)
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{
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_stext = .;
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_text_start = ABSOLUTE(.);
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*(.entry.text)
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*(.init.literal)
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*(.init)
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*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
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*(.fini.literal)
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*(.fini)
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*(.gnu.version)
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_text_end = ABSOLUTE(.);
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_etext = .;
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. = ALIGN (4); /* Ensure 32b alignment since this is written to IRAM */
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} >iram1_0_seg :iram1_0_phdr
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.lit4 : ALIGN(4)
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{
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_lit4_start = ABSOLUTE(.);
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*(*.lit4)
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*(.lit4.*)
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*(.gnu.linkonce.lit4.*)
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_lit4_end = ABSOLUTE(.);
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} >iram1_0_seg :iram1_0_phdr
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.irom0.text : ALIGN(4)
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{
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_irom0_text_start = ABSOLUTE(.);
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*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
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_irom0_text_end = ABSOLUTE(.);
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} >irom0_0_seg :irom0_0_phdr
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}
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/* get ROM code address */
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INCLUDE "rom.ld"
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