register_phy_ops-0x8
register_phy_ops
register_get_phy_addr
phy_change_channel
phy_get_mactime
phy_init-0x44
phy_init
RFChannelSel
phy_delete_channel
phy_enable_agc
phy_disable_agc
phy_initialize_bb
phy_set_sense
ram_pbus_set_rxgain-0x4
ram_pbus_set_rxgain
ram_pbus_debugmode
ram_pbus_xpd_tx_on
set_rf_freq_offset
chip_v6_rxmax_ext_ana
ram_chip_v6_rx_init
tsen_meas
readvdd33
txpwr_offset
set_txcap_reg
ram_ana_inf_gating_en
ram_restart_cal
wait_rfpll_cal_end
ram_rfpll_set_freq
ram_set_channel_freq
chip_60_set_channel
chip_v6_set_chan_offset
chip_v6_set_chan
chip_v6_set_chan_wakeup
chip_v6_rf_init
low_power_set
test_tout
check_data_flag
phy_get_check_flag
phy_get_vdd33
.irom.text
ram_tx_mac_disable
ram_tx_mac_enable
rtc_mem_backup
rtc_mem_recovery
set_cal_rxdc
set_rx_gain_cal_iq
gen_rx_gain_table
pbus_set_rxbbgain
set_rx_gain_testchip_50
ram_get_corr_power
check_data_func
do_noisefloor_lsleep_v50
do_noisefloor
start_dig_rx
stop_dig_rx
chip_v6_set_chanfreq
tx_cap_init
target_power_add_backoff
tx_pwctrl_init_cal
tx_atten_set_interp
tx_pwctrl_init
ram_get_noisefloor
get_noisefloor_sat
ram_set_noise_floor
ram_start_noisefloor
read_hw_noisefloor
noise_check_loop
noise_init
target_power_backoff
sdt_on_noise_start
chip_v6_set_chan_rx_cmp
chip_v6_set_chan_misc
phy_dig_spur_set
phy_dig_spur_prot
chip_v6_rxmax_ext_dig
chip_v6_rxmax_ext
phy_bb_rx_cfg
uart_wait_idle
phy_pbus_soc_cfg
phy_gpio_cfg
tx_cont_en
tx_cont_dis
tx_cont_cfg
chip_v6_initialize_bb
periodic_cal
bbpll_cal
periodic_cal_top
register_chipv6_phy_init_param
change_bbpll160_sleep
change_bbpll160
set_crystal_uart
ant_switch_init
reduce_current_init
rtc_mem_check
phy_afterwake_set_rfoption
deep_sleep_set_option
register_chipv6_phy
set_dpd_bypass
set_rf_gain_stage10
get_vdd33_offset
get_phy_target_power
set_most_pwr_reg
phy_set_most_tpw
phy_vdd33_set_tpw
get_adc_rand
phy_get_rand
.irom.text
unsign_to_sign
phy_get_bb_freqoffset
txbbgain2dcoindex
dcoindex2txbbgain
init_cal_dcoffset
set_rfanagain_dc_reg
set_txdc_pbus
get_rf_gain_qdb
correct_rf_ana_gain
get_sar_dout
cal_rf_ana_gain
meas_tone_pwr_db
tx_pwr_backoff
get_fcc_1m2m_pwr_offset
ram_set_txbb_atten
txiq_get_mis_pwr
txiq_cover
ram_rfcal_txiq
rc_cal
get_target_power_offset
get_pwctrl_correct
tx_pwctrl_cal
tx_pwctrl_bg_init
tx_pwctrl_background
read_sar_dout
ram_get_fm_sar_dout
ram_cal_tos_v60
ram_get_bb_atten
ram_rfcal_txcap
ram_rfcal_pwrctrl
ram_rxiq_get_mis
ram_rxiq_cover_mg_mp
ram_rfcal_rxiq
dpd_scale_set
dpd_mem_write
.irom.text
chip_v6_set_sense
chip_v6_get_sense
chip_v6_unset_chanfreq
data_collect
operation_test
slop_wdt_feed
slop_test
wd_reset_cnt
.irom.text
pm_rtc_clock_cali-0x1c
pm_rtc_clock_cali
clockgate_watchdog
pm_usec2rtc-0x10
pm_usec2rtc
pm_rtc2usec
pm_set_sleep_cycles
pm_sleep_opt
pm_wakeup_opt
get_chip_version
pm_sleep_opt_bb_off
pm_sleep_opt_bb_on
pm_set_pll_xtal_wait_time
pm_prepare_to_sleep
pm_sdio_nidle
chg_lslp_mem_opt_8266
pm_goto_sleep
pm_wait4wakeup
pm_open_rf
pm_sleep_set_mac
pm_set_wakeup_mac
pm_check_mac_idle
pm_set_sleep_btco
pm_set_wakeup_btco
pm_set_sleep_mode
pm_unmask_bt
pm_wakeup_init
sleep_opt_8266
sleep_opt_bb_on_8266
sleep_reset_analog_rtcreg_8266