RODATA can be copied automatically by the bootrom, so no reason not to
allow its use for strings and constants in eboot.c
Revert to pfalcon's original uzlib since the single patch to remove
RODATA is not required.
Rationalize eboot.ld linker script, clean up BSS and init it in code.
Saves 112 bytes of space in the bootloader sector by removing the
extra code associated with literal loads.
* Move CRC out of bootload sector
We added protection to only erase the bootload sector when flashing an
image when the new sector != the old sector. This was intended to
minimize the chance of bricking (i.e. if there was a powerfail during
flashing of the boot sector the chip would be dead).
Unfortunately, by placing the CRC inside the eboot sector *every*
application will have a unique eboot sector (due to the crc/len), so
this protection doesn't work.
Move the CRC into the first 8 bytes of IROM itself. This frees up extra
space in the boot sector and ensures that eboot won't be reflashed
unless there really is an eboot change.
* PoC cache configuration control
Expaned boards.txt.py to allow new MMU options and create revised .ld's
Updated eboot to pass 48K IRAM segments.
Added Cache_Read_Enable intercept to modify call for 16K ICACHE
Update platform.txt to pass new mmu options through to compiler and linker preprocessor.
Added quick example: esp8266/MMU48K
* Style corrections
Added MMU_ qualifier to new defines.
Moved changes into their own file.
Don't know how to fix platformio issue.
* Added detailed description for Cache_Read_Enable.
Updated tools/sizes.py to report correct IRAM size and indicate ICACHE size.
Merged in earlephilhower's work on unaligned exception. Refactored and added
support for store operations and changed the name to be more closely aligned
with its function. Improved crash reporting path.
* Style and MMU_SEC_HEAP corrections.
* Improved asm register usage.
Added some inline functions to aid in byte and short access to iRAM.
* only byte read has been tested
Updated .ld file to work better with platform.io; however, I am still
missing some steps, so platformio will still fail.
* Interesting glitch in boards.txt after github merge. A new board in
master was missing new additions added by boards.txt.py in the PR.
Which the CI flags when it rebuilds boards.txt.
* Support for 2nd Heap, excess IRAM, through umm_malloc.
Adapted changes to umm_malloc, Esp.cpp, StackThunk.cpp,
WiFiClientSecureBearSSL.cpp, and virtualmem.ino to irammem.ino from
@earlephilhower PR #6994.
Reworked umm_malloc to use context pointers instead of copy context.
umm_malloc now supports allocations from IRAM. Added class
HeapSelectIram, ... to aid in selecting alternate heaps,
modeled after class InterruptLock.
Restrict alloc request from ISRs to DRAM.
Never ending improvements to debug printing.
Sec Heap option now pulls in free IRAM left over in the 1st 32K block.
Managed through umm_malloc with HeapSelectIram.
Updated examples.
* Post push CI cleanup.
* Cleanup part II
* Cleanup part III
* Updates to support platformio, maybe.
* Added exception C wrapper replacement.
* CI Cleanup
* CI Cleanup II
Don't know what to do with platformio it doesn't like my .S file.
ifdef out USE_ISR_SAFE_EXC_WRAPPER to block the new assemlby module
from building on platformio only.
* Changes to exc-c-wrapper-handler.S to assemble under platformio.
* For platformio, Correction to toolchain-xtensa include path.
@mcspr, Thankyou!
* Temporarily added --print-memory-usage to ld parameters for cross-checking IRAM size.
* undo change to platform.txt
* correct merge conflict. take 1
* Fixed #if... for building umm_get_oom_count. It was not building when UMM_STATS_FULL was used.
* Commented out XMC support. Compatibility issues with PoC when using 16K ICACHE.
* Corrected size.py, DRAM bracketing changed to not include ICACHE with DRAM total.
* Added additional _context for support of use of UMM_INLINE_METRICS.
Corrected some UMM_POSION missed edits.
* Changes to clear errors and warnings from toolchain 10.1
Several fixes and improvements to example MMU48K.
With the improved optimization in toolchain 10.1 The example divide by 0
exception was failing with a HWDT event instead of its exception handler.
The compiler saw the obscured divide by 0 and replaced it with a break point.
* Isolated incompatable definitions related to _xtos_set_exception_handler.
GDBSTUB definitions are different from the BootROM's.
* Update tools/platformio-build.py
Co-authored-by: Max Prokhorov <prokhorov.max@outlook.com>
* Requested changes
Changed mmu related usages of ETS_... defines to DBG_MMU_...
Cleanup in example MMU48K.ino. Removed stale memory reference macro
and mmu_status print statement. Cleanup printf '\n' to be '\r\n'.
Improved issolation of development debug prints from the rest of the debug prints.
* Corrected comment. And added missing include.
* Improve comment.
* style and comment correction
* Added draft mmu.rst file and updated index.
Updated example HeapMetric.ino to also illustrate use of IRAM
Improved comments in exc-c-wrapper-handler.S. Added insurance IRQ disable.
* Updated mmu.rst
Improved function name uniqueness for is_iram, is_dram, and is_icache by
adding prefix mmu_. Also, made them available outside of a debug build.
Made pointer precision width more specific.
Made some of the static inline functions in mmu_irm.h safe for ISRs by
setting then for always inline.
* Add a default MMU_IRAM_SIZE value for a new CI test to pass.
Extended use 'umm_heap_context_t *_context' argument in ..._core functions
and expanded its usage to reduce unnecessary repeated calls to
umm_info(NULL, false), also removed recursion from umm_info(NULL, true).
Fixed stack buffer length in umm_info_safe_printf_P and heap.cpp.
Added example for creating an IRAM reserve section.
Updated mmu.rst. Grammar and spelling corrections.
* CI appeasement
* CI appeasement with comment correction.
* Ensure SYS always runs with DRAM Heap selected.
* Add/move heap stack overflow/underflow check to Esp.cpp where the event was discarded.
* Improved comment clarity of purpose for IramReserve.ino. Clean up MMU48K.ino
* Added missing #include
* Corrected usage of warning
* CI appeasement and use #message not #pragma message
* Updated git version of eboot.elf to match build version.
Good test catch.
* Remove conditional build option USE_ISR_SAFE_EXC_WRAPPER, always install.
Use the replacement wrapper on non32xfer_exception_handler install.
Added comments to code describing some exception handling issues.
* Updated mmu.rst
* Expanded and clarified comments.
Limited access to some detailed typdefs/prototypes to .cpp
modules, to avoid future build conflicts.
Completed TODO for verifing that the "C" structure struct __exception_frame
matches the ASM version.
Fixed some typo's, code rot, and added some more cases in examaple irammem.ino.
Refactored a little and reordered printing to ease comparison between methods.
Corrected `#ifdef __cplusplus` coverage area. Cleaned up `extern "C" ...` usage.
Fixes issues with including mmu_iram.h or esp8266_undocumented.h in .c files.
* Style fixes and more cleanup
* Style fix
* Remove unnessasary IRAM_ATTR from install_non32xfer_exception_handler
Some comment tuning.
In the context of _xtos_set_exception_handler and the functions it registers,
changed to type int for exception cause type. This is also the type used by gdbstub
and some other Xtensa files I found.
Instead of using either a series of etc_putc or setting a series of bytes
one by one, use a simple macro to define 32b constants to build up strings.
Saves ~30 bytes of program code in eboot for #6538 to work with.
There is a window where the eboot sector is erased and
unwritten/partially written. If there's a power cycle at this time, the
chip will brick due to eboot being corrupted.
Avoid this by checking if the new eboot 4K sector is identical to the
one already in flash, and if so don't rewrite it.
* Comment out verify step in eboot.c
Meant for #7458 , but still requires a recompiled eboot.elf.
* Rebuild eboot.elf from changed source
Co-authored-by: Earle F. Philhower, III <earlephilhower@yahoo.com>
* Remove unnecessary XMC support from eboot
eboot is always run with the flash access speed set to 20MHz, so
there is no need for special treatment of XMC chips.
* After eboot copies the new firmware into place, verify the copy.
If the data written to flash is as expected, the line cmp:0 will be displayed
after the usual @cp:0 from eboot.
* Disable interrupts during the precached part of _SPICommand()
For some reason this was an issue during the reboot after an OTA update.
* Move the spi vendor list from Esp.h to its own header in eboot.
* Fix ifdef issue with spi_vendors.h
* Add initFlashQuirks() for any chip specific flash initialization.
Called from user_init().
* namespace experimental for initFlashQuirks()
* Slow down flash access during eboot firmware copy
Part 1 - still some work to do
* Slow down flash access during eboot firmware copy on XMC chips
Part 2 - Identify the chip type.
Note: there may still be issues with the access speed change.
This is very much experimental.
* Commit eboot.elf
Co-authored-by: Develo <deveyes@gmail.com>
Co-authored-by: Earle F. Philhower, III <earlephilhower@yahoo.com>
* Add documentation for compressed OTA, fix bug
Fixes#6923
Documents the user steps needed to do a compressed upload, and notes the
2-step process needed for deploying compressed uploads to the field for
the first time.
Fixes a bug in serial output formatting discovered by @AdrianEddy.
Adds additional contributors for uzlib, per @pfalcon.
* Update README for esptool.py, too
* Allow GZIP compressed flash updates
Modified the bootloader to be able to take stored updates in compressed
GZIP format (i.e. the output of "gzip -9 xxx.bin") and decompress them
on-the-fly to their final destination. This can work for apps and for
filesystems (when used with the 2-step update option).
Allow eboot to be built using -Os/2 optimizations by fixing some portions
which failed when any optimizations were used. Add -Wall and use data
and function sections to reduce size. Use -Os to minimize size.
Remove obsolete esptool-ck calls to build a .ROM image, we don't use it.
Move all uninitted variables to RAM from IRAM, allowing 8-bit access.
Hook in @d-a-v and @pfalcon's uzlib port to actually do the
decompression. Do not use any CRC checking which saves space. Since we
have overwritten all of flash by the time we know id the CRC matches,
there's nothing we could have done anyway.
Adjust the Updater class to support GZIP files and not attempt to patch
them.
Bootloader builds to 0xd90 out of 0xfff bytes.
* Add @d-a-v's patch for httpupdate
https://github.com/esp8266/Arduino/pull/6820#pullrequestreview-326541014
* Update uzlib to point to pfalcon++
For now, because there are some self-test failures with @d-a-v's esp8266
branch (whose cool new features we don't actually use in eboot now)
start with pfalcon's 2.9 release and add the 2 patches (clcidx to code
from IRAM/RODATA, and the Windows test file renaming) needed to build
and run successfully.
* Add (c) notice for uzlib to README
The eboot command was cleared from the rtc mem before the firmware copy
making it possible for a power failure during an OTA update to brick the
esp until the firmware was loaded via USB because of a partial firmware
copy that would never be restarted.
Moving the eboot_command_clear to after the copy ensures that any partial
copy is restarted at next power on.
