1
0
mirror of https://github.com/esp8266/Arduino.git synced 2025-06-13 13:01:55 +03:00

Merge remote-tracking branch 'remotes/esp8266/esp8266' into esp8266

Conflicts:
	hardware/esp8266com/esp8266/cores/esp8266/core_esp8266_main.cpp
This commit is contained in:
Markus Sattler
2015-06-23 13:08:05 +02:00
25 changed files with 1197 additions and 137 deletions

View File

@ -45,13 +45,22 @@ typedef enum {
#define cli() ets_intr_lock() // IRQ Disable
#define sei() ets_intr_unlock() // IRQ Enable
enum WakeMode {
WAKE_RF_DEFAULT = 0, // RF_CAL or not after deep-sleep wake up, depends on init data byte 108.
WAKE_RFCAL = 1, // RF_CAL after deep-sleep wake up, there will be large current.
WAKE_NO_RFCAL = 2, // no RF_CAL after deep-sleep wake up, there will only be small current.
WAKE_RF_DISABLED = 4 // disable RF after deep-sleep wake up, just like modem sleep, there will be the smallest current.
enum RFMode {
RF_DEFAULT = 0, // RF_CAL or not after deep-sleep wake up, depends on init data byte 108.
RF_CAL = 1, // RF_CAL after deep-sleep wake up, there will be large current.
RF_NO_CAL = 2, // no RF_CAL after deep-sleep wake up, there will only be small current.
RF_DISABLED = 4 // disable RF after deep-sleep wake up, just like modem sleep, there will be the smallest current.
};
#define RF_MODE(mode) extern "C" int __get_rf_mode() { return mode; }
// compatibility definitions
#define WakeMode RFMode
#define WAKE_RF_DEFAULT RF_DEFAULT
#define WAKE_RFCAL RF_CAL
#define WAKE_NO_RFCAL RF_NO_CAL
#define WAKE_RF_DISABLED RF_DISABLED
typedef enum {
FM_QIO = 0x00,
FM_QOUT = 0x01,
@ -72,7 +81,7 @@ class EspClass {
void wdtDisable();
void wdtFeed();
void deepSleep(uint32_t time_us, WakeMode mode = WAKE_RF_DEFAULT);
void deepSleep(uint32_t time_us, RFMode mode = RF_DEFAULT);
void reset();
void restart();

View File

@ -58,6 +58,14 @@ namespace std {
void __throw_bad_function_call() {
abort();
}
void __throw_length_error(char const*) {
abort();
}
void __throw_bad_alloc() {
abort();
}
}
// TODO: rebuild windows toolchain to make this unnecessary:

View File

@ -106,7 +106,7 @@ cont_resume:
cont_norm:
/* calculate pointer to cont_ctx.struct_start from sp */
l32i a2, a1, 8
l32i a2, a1, 4
/* sp <- cont_ctx.sp_ret */
l32i a1, a2, 4

View File

@ -33,6 +33,8 @@ typedef struct cont_ {
unsigned* sp_yield;
unsigned* stack_end;
unsigned unused1;
unsigned unused2;
unsigned stack_guard1;
unsigned stack[CONT_STACKSIZE / 4];

View File

@ -25,7 +25,7 @@
void cont_init(cont_t* cont) {
cont->stack_guard1 = CONT_STACKGUARD;
cont->stack_guard2 = CONT_STACKGUARD;
cont->stack_end = cont->stack + (sizeof(cont->stack) / 4 - 1);
cont->stack_end = cont->stack + (sizeof(cont->stack) / 4);
cont->struct_start = (unsigned*) cont;
}

View File

@ -59,7 +59,7 @@ void preloop_update_frequency() {
extern void (*__init_array_start)(void);
extern void (*__init_array_end)(void);
static cont_t g_cont;
cont_t g_cont __attribute__ ((aligned (16)));
static os_event_t g_loop_queue[LOOP_QUEUE_SIZE];
static uint32_t g_micros_at_task_start;
@ -114,31 +114,17 @@ static void do_global_ctors(void) {
}
void init_done() {
system_set_os_print(1);
do_global_ctors();
esp_schedule();
}
extern "C" {
void user_rf_pre_init() {
}
}
extern "C" {
void user_init(void) {
struct rst_info *rtc_info_ptr = system_get_rst_info();
memcpy((void *) &resetInfo, (void *) rtc_info_ptr, sizeof(resetInfo));
os_printf("Last reset reason: 0x%02X\n", resetInfo.reason);
if(resetInfo.reason == REASON_WDT_RST || resetInfo.reason == REASON_EXCEPTION_RST || resetInfo.reason == REASON_SOFT_WDT_RST) {
if(resetInfo.reason == REASON_EXCEPTION_RST) {
os_printf("Fatal exception (%d):\n", resetInfo.exccause);
}
os_printf("epc1=0x%08x, epc2=0x%08x, epc3=0x%08x, excvaddr=0x%08x, depc=0x%08x\n", resetInfo.epc1, resetInfo.epc2, resetInfo.epc3, resetInfo.excvaddr, resetInfo.depc);
}
uart_div_modify(0, UART_CLK_FREQ / (115200));

View File

@ -0,0 +1,248 @@
/*
phy.c - ESP8266 PHY initialization data
Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
This file is part of the esp8266 core for Arduino environment.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
static uint8_t phy_init_data[128] =
{
[0] = 5, // Reserved, do not change
[1] = 0, // Reserved, do not change
[2] = 4, // Reserved, do not change
[3] = 2, // Reserved, do not change
[4] = 5, // Reserved, do not change
[5] = 5, // Reserved, do not change
[6] = 5, // Reserved, do not change
[7] = 2, // Reserved, do not change
[8] = 5, // Reserved, do not change
[9] = 0, // Reserved, do not change
[10] = 4, // Reserved, do not change
[11] = 5, // Reserved, do not change
[12] = 5, // Reserved, do not change
[13] = 4, // Reserved, do not change
[14] = 5, // Reserved, do not change
[15] = 5, // Reserved, do not change
[16] = 4, // Reserved, do not change
[17] = -2, // Reserved, do not change
[18] = -3, // Reserved, do not change
[19] = -1, // Reserved, do not change
[20] = -16, // Reserved, do not change
[21] = -16, // Reserved, do not change
[22] = -16, // Reserved, do not change
[23] = -32, // Reserved, do not change
[24] = -32, // Reserved, do not change
[25] = -32, // Reserved, do not change
[26] = 225, // spur_freq_cfg, spur_freq=spur_freq_cfg/spur_freq_cfg_div
[27] = 10, // spur_freq_cfg_div
// each bit for 1 channel, 1 to select the spur_freq if in band, else 40
[28] = 0, // spur_freq_en_h
[29] = 0, // spur_freq_en_l
[30] = 0xf8, // Reserved, do not change
[31] = 0, // Reserved, do not change
[32] = 0xf8, // Reserved, do not change
[33] = 0xf8, // Reserved, do not change
[34] = 82, // target_power_qdb_0, 82 means target power is 82/4=20.5dbm
[35] = 78, // target_power_qdb_1, 78 means target power is 78/4=19.5dbm
[36] = 74, // target_power_qdb_2, 74 means target power is 74/4=18.5dbm
[37] = 68, // target_power_qdb_3, 68 means target power is 68/4=17dbm
[38] = 64, // target_power_qdb_4, 64 means target power is 64/4=16dbm
[39] = 56, // target_power_qdb_5, 56 means target power is 56/4=14dbm
[40] = 0, // target_power_index_mcs0
[41] = 0, // target_power_index_mcs1
[42] = 1, // target_power_index_mcs2
[43] = 1, // target_power_index_mcs3
[44] = 2, // target_power_index_mcs4
[45] = 3, // target_power_index_mcs5
[46] = 4, // target_power_index_mcs6
[47] = 5, // target_power_index_mcs7
// crystal_26m_en
// 0: 40MHz
// 1: 26MHz
// 2: 24MHz
[48] = 1,
// sdio_configure
// 0: Auto by pin strapping
// 1: SDIO dataoutput is at negative edges (SDIO V1.1)
// 2: SDIO dataoutput is at positive edges (SDIO V2.0)
[50] = 0,
// bt_configure
// 0: None,no bluetooth
// 1: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
// MTMS -> BT_ACTIVE
// MTCK -> BT_PRIORITY
// U0RXD -> ANT_SEL_BT
// 2: None, have bluetooth
// 3: GPIO0 -> WLAN_ACTIVE/ANT_SEL_WIFI
// MTMS -> BT_PRIORITY
// MTCK -> BT_ACTIVE
// U0RXD -> ANT_SEL_BT
[51] = 0,
// bt_protocol
// 0: WiFi-BT are not enabled. Antenna is for WiFi
// 1: WiFi-BT are not enabled. Antenna is for BT
// 2: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), independent ant
// 3: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), independent ant
// 4: WiFi-BT 2-wire are enabled, (only use BT_ACTIVE), share ant
// 5: WiFi-BT 3-wire are enabled, (when BT_ACTIVE = 0, BT_PRIORITY must be 0), share ant
[52] = 0,
// dual_ant_configure
// 0: None
// 1: dual_ant (antenna diversity for WiFi-only): GPIO0 + U0RXD
// 2: T/R switch for External PA/LNA: GPIO0 is high and U0RXD is low during Tx
// 3: T/R switch for External PA/LNA: GPIO0 is low and U0RXD is high during Tx
[53] = 0,
[54] = 2, // Reserved, do not change
// share_xtal
// This option is to share crystal clock for BT
// The state of Crystal during sleeping
// 0: Off
// 1: Forcely On
// 2: Automatically On according to XPD_DCDC
// 3: Automatically On according to GPIO2
[55] = 0,
[64] = 225, // spur_freq_cfg_2, spur_freq_2=spur_freq_cfg_2/spur_freq_cfg_div_2
[65] = 10, // spur_freq_cfg_div_2
[66] = 0, // spur_freq_en_h_2
[67] = 0, // spur_freq_en_l_2
[68] = 0, // spur_freq_cfg_msb
[69] = 0, // spur_freq_cfg_2_msb
[70] = 0, // spur_freq_cfg_3_low
[71] = 0, // spur_freq_cfg_3_high
[72] = 0, // spur_freq_cfg_4_low
[73] = 0, // spur_freq_cfg_4_high
[74] = 1, // Reserved, do not change
[75] = 0x93, // Reserved, do not change
[76] = 0x43, // Reserved, do not change
[77] = 0x00, // Reserved, do not change
// low_power_en
// 0: disable low power mode
// 1: enable low power mode
[93] = 0,
// lp_rf_stg10
// the attenuation of RF gain stage 0 and 1,
// 0xf: 0db,
// 0xe: -2.5db,
// 0xd: -6db,
// 0x9: -8.5db,
// 0xc: -11.5db,
// 0x8: -14db,
// 0x4: -17.5,
// 0x0: -23
[94] = 0x0f,
// lp_bb_att_ext
// the attenuation of BB gain,
// 0: 0db,
// 1: -0.25db,
// 2: -0.5db,
// 3: -0.75db,
// 4: -1db,
// 5: -1.25db,
// 6: -1.5db,
// 7: -1.75db,
// 8: -2db
// max valve is 24(-6db)
[95] = 0,
// pwr_ind_11b_en
// 0: 11b power is same as mcs0 and 6m
// 1: enable 11b power different with ofdm
[96] = 0,
// pwr_ind_11b_0
// 1m, 2m power index [0~5]
[97] = 0,
// pwr_ind_11b_1
// 5.5m, 11m power index [0~5]
[98] = 0,
// vdd33_const
// the voltage of PA_VDD
// x=0xff: it can measure VDD33,
// 18<=x<=36: use input voltage,
// the value is voltage*10, 33 is 3.3V, 30 is 3.0V,
// x<18 or x>36: default voltage is 3.3V
[107] = 33,
// disable RF calibration for certain number of times
[108] = 0,
// freq_correct_en
// bit[0]:0->do not correct frequency offset, 1->correct frequency offset.
// bit[1]:0->bbpll is 168M, it can correct + and - frequency offset, 1->bbpll is 160M, it only can correct + frequency offset
// bit[2]:0->auto measure frequency offset and correct it, 1->use 113 byte force_freq_offset to correct frequency offset.
// 0: do not correct frequency offset.
// 1: auto measure frequency offset and correct it, bbpll is 168M, it can correct + and - frequency offset.
// 3: auto measure frequency offset and correct it, bbpll is 160M, it only can correct + frequency offset.
// 5: use 113 byte force_freq_offset to correct frequency offset, bbpll is 168M, it can correct + and - frequency offset.
// 7: use 113 byte force_freq_offset to correct frequency offset, bbpll is 160M , it only can correct + frequency offset.
[112] = 0,
// force_freq_offset
// signed, unit is 8kHz
[113] = 0,
};
extern int __real_register_chipv6_phy(uint8_t* init_data);
extern int __wrap_register_chipv6_phy(uint8_t* unused) {
return __real_register_chipv6_phy(phy_init_data);
}
void user_rf_pre_init() {
// *((volatile uint32_t*) 0x60000710) = 0;
volatile uint32_t* rtc_reg = (volatile uint32_t*) 0x60001000;
rtc_reg[30] = 0;
system_set_os_print(0);
}
extern int __get_rf_mode() __attribute__((weak));
extern int __get_rf_mode()
{
return 0; // default mode
}

View File

@ -0,0 +1,130 @@
/*
postmortem.c - output of debug info on sketch crash
Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
This file is part of the esp8266 core for Arduino environment.
This library is free software; you can redistribute it and/or
modify it under the terms of the GNU Lesser General Public
License as published by the Free Software Foundation; either
version 2.1 of the License, or (at your option) any later version.
This library is distributed in the hope that it will be useful,
but WITHOUT ANY WARRANTY; without even the implied warranty of
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
Lesser General Public License for more details.
You should have received a copy of the GNU Lesser General Public
License along with this library; if not, write to the Free Software
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
*/
#include <stdint.h>
#include <stddef.h>
#include <stdbool.h>
#include "ets_sys.h"
#include "user_interface.h"
#include "esp8266_peri.h"
#include "cont.h"
extern void __real_system_restart_local();
extern cont_t g_cont;
static void uart0_write_char_d(char c);
static void print_stack(uint32_t start, uint32_t end);
static void print_pcs(uint32_t start, uint32_t end);
void __wrap_system_restart_local() {
register uint32_t sp asm("a1");
struct rst_info rst_info = {0};
system_rtc_mem_read(0, &rst_info, sizeof(rst_info));
if (rst_info.reason != REASON_SOFT_WDT_RST &&
rst_info.reason != REASON_EXCEPTION_RST &&
rst_info.reason != REASON_WDT_RST)
{
return;
}
ets_install_putc1(&uart0_write_char_d);
if (rst_info.reason == REASON_EXCEPTION_RST) {
ets_printf("\nException (%d):\nepc1=0x%08x epc2=0x%08x epc3=0x%08x excvaddr=0x%08x depc=0x%08x\n",
rst_info.exccause, rst_info.epc1, rst_info.epc2, rst_info.epc3, rst_info.excvaddr, rst_info.depc);
}
uint32_t cont_stack_start = (uint32_t) &(g_cont.stack);
uint32_t cont_stack_end = (uint32_t) g_cont.stack_end;
uint32_t stack_end;
// amount of stack taken by interrupt or exception handler
// and everything up to __wrap_system_restart_local
// (determined empirically, might break)
uint32_t offset = 0;
if (rst_info.reason == REASON_SOFT_WDT_RST) {
offset = 0x1b0;
}
else if (rst_info.reason == REASON_EXCEPTION_RST) {
offset = 0x1a0;
}
else if (rst_info.reason == REASON_WDT_RST) {
offset = 0x10;
}
if (sp > cont_stack_start && sp < cont_stack_end) {
ets_printf("\nctx: cont \n");
stack_end = cont_stack_end;
}
else {
ets_printf("\nctx: sys \n");
stack_end = 0x3fffffb0;
// it's actually 0x3ffffff0, but the stuff below ets_run
// is likely not really relevant to the crash
}
ets_printf("sp: %08x end: %08x offset: %04x\n", sp, stack_end, offset);
// print_pcs(sp + offset, stack_end);
print_stack(sp + offset, stack_end);
delayMicroseconds(10000);
__real_system_restart_local();
}
static void print_stack(uint32_t start, uint32_t end) {
ets_printf("\n>>>stack>>>\n");
for (uint32_t pos = start; pos < end; pos += 0x10) {
uint32_t* values = (uint32_t*)(pos);
// rough indicator: stack frames usually have SP saved as the second word
bool looksLikeStackFrame = (values[2] == pos + 0x10);
ets_printf("%08x: %08x %08x %08x %08x %c\n",
pos, values[0], values[1], values[2], values[3], (looksLikeStackFrame)?'<':' ');
}
ets_printf("<<<stack<<<\n");
}
static void print_pcs(uint32_t start, uint32_t end) {
uint32_t n = 0;
ets_printf("\n>>>pc>>>\n");
for (uint32_t pos = start; pos < end; pos += 16, ++n) {
uint32_t* sf = (uint32_t*) pos;
uint32_t pc_ret = sf[3];
uint32_t sp_ret = sf[2];
if (pc_ret < 0x40000000 || pc_ret > 0x40f00000 || sp_ret != pos + 16)
continue;
ets_printf("%08x\n", pc_ret);
}
ets_printf("<<<pc<<<\n");
}
void uart0_write_char_d(char c) {
while (((USS(0) >> USTXC) & 0xff) >= 0x7e) { }
if (c == '\n') {
USF(0) = '\r';
}
USF(0) = c;
}

View File

@ -5,7 +5,10 @@
// #define DEBUGV(...) ets_printf(__VA_ARGS__)
#define DEBUGV(...)
#ifdef __cplusplus
void hexdump(uint8_t *mem, uint32_t len, uint8_t cols = 16);
#else
void hexdump(uint8_t *mem, uint32_t len, uint8_t cols);
#endif
#endif//ARD_DEBUG_H

View File

@ -36,6 +36,7 @@
#include "osapi.h"
#include "mem.h"
#include "user_interface.h"
#include "debug.h"
void* malloc(size_t size) {
size = ((size + 3) & ~((size_t)0x3));
@ -471,75 +472,7 @@ int isblank(int c) {
static int errno_var = 0;
int* ICACHE_FLASH_ATTR __errno(void) {
os_printf("__errno is called last error: %d (not current)\n", errno_var);
DEBUGV("__errno is called last error: %d (not current)\n", errno_var);
return &errno_var;
}
// ##########################################################################
// __ieee754 functions
// ##########################################################################
double ICACHE_FLASH_ATTR __ieee754_sinh(double x) {
return sinh(x);
}
double ICACHE_FLASH_ATTR __ieee754_hypot(double x, double y) {
return hypot(x, y);
}
float ICACHE_FLASH_ATTR __ieee754_hypotf(float x, float y) {
return hypotf(x, y);
}
float ICACHE_FLASH_ATTR __ieee754_logf(float x) {
return logf(x);
}
double ICACHE_FLASH_ATTR __ieee754_log10(double x) {
return log10(x);
}
double ICACHE_FLASH_ATTR __ieee754_exp(double x) {
return exp(x);
}
double ICACHE_FLASH_ATTR __ieee754_cosh(double x) {
return cosh(x);
}
float ICACHE_FLASH_ATTR __ieee754_expf(float x) {
return expf(x);
}
float ICACHE_FLASH_ATTR __ieee754_log10f(float x) {
return log10f(x);
}
double ICACHE_FLASH_ATTR __ieee754_atan2(double x, double y) {
return atan2(x, y);
}
float ICACHE_FLASH_ATTR __ieee754_sqrtf(float x) {
return sqrtf(x);
}
float ICACHE_FLASH_ATTR __ieee754_sinhf(float x) {
return sinhf(x);
}
double ICACHE_FLASH_ATTR __ieee754_log(double x) {
return log(x);
}
double ICACHE_FLASH_ATTR __ieee754_sqrt(double x) {
return sqrt(x);
}
float ICACHE_FLASH_ATTR __ieee754_coshf(float x) {
return coshf(x);
}
float ICACHE_FLASH_ATTR __ieee754_atan2f(float x, float y) {
return atan2f(x, y);
}