From fd4215aa22f05828349eeaffc4c14c51eaac36e5 Mon Sep 17 00:00:00 2001
From: Sermus <andrey.v.filimonov@gmail.com>
Date: Thu, 2 Apr 2015 09:50:01 +0300
Subject: [PATCH] CS is now software controlled. Otherwise ESP has problems
 with receiving data over SPI

---
 libraries/SPI/HSPI.cpp                  | 13 ++++++-------
 libraries/SPI/include/HSPI.h            |  2 +-
 libraries/TFT_Touch_Shield_V2/TFTv2.cpp |  4 ++++
 libraries/TFT_Touch_Shield_V2/TFTv2.h   | 12 ++++++------
 4 files changed, 17 insertions(+), 14 deletions(-)

diff --git a/libraries/SPI/HSPI.cpp b/libraries/SPI/HSPI.cpp
index 755a40c1d..b3c2ee37c 100644
--- a/libraries/SPI/HSPI.cpp
+++ b/libraries/SPI/HSPI.cpp
@@ -11,13 +11,6 @@ void HSPI::begin()
 	PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDI_U, FUNC_HSPIQ_MISO);	// gpio12
 	PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTCK_U, FUNC_HSPID_MOSI);	// gpio13
 	PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, FUNC_HSPI_CLK);		// gpio14
-	PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_HSPI_CS0);		// gpio15
-
-	uint32_t regvalue = SPI_FLASH_DOUT;
-	regvalue |= SPI_DOUTDIN | SPI_CK_I_EDGE;
-	regvalue &= ~(BIT2 | SPI_FLASH_USR_ADDR | SPI_FLASH_USR_DUMMY | SPI_FLASH_USR_DIN | SPI_USR_COMMAND);
-
-	SET_PERI_REG_MASK(SPI_FLASH_USER(hspi_port), regvalue);
 
 	// SPI clock=CPU clock/8
 	WRITE_PERI_REG(SPI_FLASH_CLOCK(hspi_port), 
@@ -26,6 +19,12 @@ void HSPI::begin()
 		((1&SPI_CLKCNT_H)<<SPI_CLKCNT_H_S)|
 		((3&SPI_CLKCNT_L)<<SPI_CLKCNT_L_S)); //clear bit 31,set SPI clock div
 
+	uint32_t regvalue = SPI_FLASH_DOUT;
+	regvalue |= SPI_DOUTDIN | SPI_CK_I_EDGE;
+	regvalue &= ~(BIT2 | SPI_FLASH_USR_ADDR | SPI_FLASH_USR_DUMMY | SPI_FLASH_USR_DIN | SPI_USR_COMMAND);
+
+	WRITE_PERI_REG(SPI_FLASH_USER(hspi_port), regvalue);
+	WRITE_PERI_REG(SPI_FLASH_CTRL1(hspi_port), 0);
 }
 
 void HSPI::end()
diff --git a/libraries/SPI/include/HSPI.h b/libraries/SPI/include/HSPI.h
index 7d73d5a94..cf9125522 100644
--- a/libraries/SPI/include/HSPI.h
+++ b/libraries/SPI/include/HSPI.h
@@ -27,7 +27,7 @@ private:
 	uint32_t _clkDiv;
 	uint32_t *spi_fifo;
 	const uint32_t hspi_port = 1;
-	const uint32_t hspi_fifo_size = 32;
+	const uint32_t hspi_fifo_size = 16;
 
 private:
 	inline void hspi_wait_ready(void){while (READ_PERI_REG(SPI_FLASH_CMD(hspi_port))&SPI_FLASH_USR);}
diff --git a/libraries/TFT_Touch_Shield_V2/TFTv2.cpp b/libraries/TFT_Touch_Shield_V2/TFTv2.cpp
index 704b09c91..a8ba79f83 100644
--- a/libraries/TFT_Touch_Shield_V2/TFTv2.cpp
+++ b/libraries/TFT_Touch_Shield_V2/TFTv2.cpp
@@ -26,7 +26,11 @@
 
 void TFT::TFTinit (void)
 {
+    pinMode(2, OUTPUT);
+    pinMode(4, OUTPUT);
+    pinMode(15, OUTPUT);
     SPI.begin();
+    SPI.setClockDivider(2);
     
     TFT_CS_HIGH;
     TFT_DC_HIGH;
diff --git a/libraries/TFT_Touch_Shield_V2/TFTv2.h b/libraries/TFT_Touch_Shield_V2/TFTv2.h
index 09859534b..f40bad234 100644
--- a/libraries/TFT_Touch_Shield_V2/TFTv2.h
+++ b/libraries/TFT_Touch_Shield_V2/TFTv2.h
@@ -81,12 +81,12 @@ Modified by Sermus for ESP8266
 #define XP 21   // can be a digital pin, this is A3
 
 #else
-#define TFT_CS_LOW  //ESP8266 hspi has hardware controlled CS
-#define TFT_CS_HIGH 
-#define TFT_DC_LOW  pinMode(2, 0);
-#define TFT_DC_HIGH pinMode(2, 1);
-#define TFT_BL_OFF  pinMode(0, 0);
-#define TFT_BL_ON   pinMode(0, 1);
+#define TFT_CS_LOW  digitalWrite(15, 0);
+#define TFT_CS_HIGH digitalWrite(15, 1);
+#define TFT_DC_LOW  digitalWrite(2, 0);
+#define TFT_DC_HIGH digitalWrite(2, 1);
+#define TFT_BL_OFF  digitalWrite(4, 0);
+#define TFT_BL_ON   digitalWrite(4, 1);
 
 #define YP A2   // must be an analog pin, use "An" notation!
 #define XM A1   // must be an analog pin, use "An" notation!