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mirror of https://github.com/esp8266/Arduino.git synced 2025-06-12 01:53:07 +03:00

Add flash for vtable destination, make it default, and add build menu to control options (#4582)

* Add flash for vtable destination, make it default

Add an option for placing vtables in flash to complement the existing
iram and heap options.  "make flash"

Now that there is a way to change it, move to vtables in flash as default
as only users with interrupts which use vtables require the vtable to
be in RAM.  For those users, if the tables are small enough they can put
them in IRAM and save heap space for their app.  If not, then the vtables
can be placed in HEAP which supports much larger tables.

* Add VTable menu, FLASH as default, remove Makefile

Convert from manual "make" operated app.ld creation to runtime creation
whose options are selected from the build menu.

Use a prelink recipe to create the output app.ld file each run, without
need for any special tools.

Update the boards.txt.py script to generate this new config.
This commit is contained in:
Earle F. Philhower, III
2018-04-02 15:32:35 -07:00
committed by david gauchard
parent 8ae553d99e
commit f2c7256539
6 changed files with 172 additions and 45 deletions

View File

@ -1,17 +0,0 @@
CPP = ../../../tools/xtensa-lx106-elf/bin/xtensa-lx106-elf-cpp
COMMON = eagle.app.v6.common.ld
WARN = "\/\* warning: AUTOGENERATED from $(COMMON)\*.h \*\/"
all:
@echo "available rules:"
@echo " iram: move c++ vtables to iram (= default in git master repository)"
@echo " heap: move c++ vtables to heap"
heap:
@(echo "$(WARN)"; $(CPP) -CC -E -DVTABLES_IN_DRAM $(COMMON).h | grep -v '^#') > $(COMMON)
@echo "c++ vtables moved to heap"
iram:
@(echo "$(WARN)"; $(CPP) -CC -E -DVTABLES_IN_IRAM $(COMMON).h | grep -v '^#') > $(COMMON)
@echo "c++ vtables moved to iram"

View File

@ -1,7 +1,5 @@
/* warning: AUTOGENERATED from eagle.app.v6.common.ld*.h */
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
PHDRS
{
dport0_0_phdr PT_LOAD;
@ -10,8 +8,6 @@ PHDRS
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
@ -38,10 +34,8 @@ _memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
@ -49,7 +43,6 @@ SECTIONS
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
@ -57,7 +50,6 @@ SECTIONS
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
@ -65,7 +57,6 @@ SECTIONS
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
@ -84,17 +75,13 @@ SECTIONS
_Pri_3_HandlerAddress = ABSOLUTE(.);
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.ver_number)
*.c.o( EXCLUDE_FILE (umm_malloc.c.o) .literal*, EXCLUDE_FILE (umm_malloc.c.o) .text* )
*.cpp.o(.literal*, .text*)
*(.rodata._ZTV*) /* C++ vtables */
*libc.a:(.literal .text .literal.* .text.*)
*libm.a:(.literal .text .literal.* .text.*)
*libgcc.a:_umoddi3.o(.literal .text)
@ -123,7 +110,6 @@ SECTIONS
_irom0_text_end = ABSOLUTE(.);
_flash_code_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
.text : ALIGN(4)
{
_stext = .;
@ -158,17 +144,12 @@ SECTIONS
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*.cpp.o(.iram.text)
*.c.o(.iram.text)
*(.rodata._ZTV*) /* C++ vtables */
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
@ -210,7 +191,6 @@ SECTIONS
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
@ -234,8 +214,6 @@ SECTIONS
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
@ -244,9 +222,6 @@ SECTIONS
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
}
/* get ROM code address */
INCLUDE "../ld/eagle.rom.addr.v6.ld"

View File

@ -94,6 +94,9 @@ SECTIONS
*(.ver_number)
*.c.o( EXCLUDE_FILE (umm_malloc.c.o) .literal*, EXCLUDE_FILE (umm_malloc.c.o) .text* )
*.cpp.o(.literal*, .text*)
#ifdef VTABLES_IN_FLASH
*(.rodata._ZTV*) /* C++ vtables */
#endif
*libc.a:(.literal .text .literal.* .text.*)
*libm.a:(.literal .text .literal.* .text.*)
*libgcc.a:_umoddi3.o(.literal .text)
@ -167,7 +170,7 @@ SECTIONS
_etext = .;
} >iram1_0_seg :iram1_0_phdr
#ifdef VTABLES_IN_IRAM
#if defined(VTABLES_IN_IRAM) || defined(VTABLES_IN_FLASH)
#include "eagle.app.v6.common.ld.vtables.h"
#endif