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[sam] merging CMSIS with current internal dev

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This commit is contained in:
Thibaut VIARD
2011-10-11 20:46:18 +02:00
parent 2699d5d001
commit ee7177d68b
87 changed files with 955 additions and 1078 deletions
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33
hardware/sam/libraries/SPI/SPI.cpp
View File

@ -35,27 +35,48 @@ void SPIClass::begin()
SPCR |= _BV(SPE);
}
void SPIClass::end() {
void SPIClass::end()
{
SPCR &= ~_BV(SPE);
}
void SPIClass::setBitOrder(uint8_t bitOrder)
void SPIClass::setBitOrder( uint8_t bitOrder )
{
if(bitOrder == LSBFIRST) {
if(bitOrder == LSBFIRST)
{
SPCR |= _BV(DORD);
} else {
}
else
{
SPCR &= ~(_BV(DORD));
}
}
void SPIClass::setDataMode(uint8_t mode)
void SPIClass::setDataMode( uint8_t mode )
{
SPCR = (SPCR & ~SPI_MODE_MASK) | mode;
}
void SPIClass::setClockDivider(uint8_t rate)
void SPIClass::setClockDivider( uint8_t rate )
{
SPCR = (SPCR & ~SPI_CLOCK_MASK) | (rate & SPI_CLOCK_MASK);
SPSR = (SPSR & ~SPI_2XCLOCK_MASK) | ((rate >> 2) & SPI_2XCLOCK_MASK);
}
byte SPIClass::transfer( byte _data )
{
SPDR = _data;
while (!(SPSR & _BV(SPIF)))
;
return SPDR;
}
void SPIClass::attachInterrupt( void )
{
SPCR |= _BV(SPIE) ;
}
void SPIClass::detachInterrupt( void )
{
SPCR &= ~_BV(SPIE) ;
}

63
hardware/sam/libraries/SPI/SPI.h
View File

@ -14,56 +14,43 @@
#include "variant.h"
#include <stdio.h>
#define SPI_CLOCK_DIV4 0x00
#define SPI_CLOCK_DIV16 0x01
#define SPI_CLOCK_DIV64 0x02
#define SPI_CLOCK_DIV4 0x00
#define SPI_CLOCK_DIV16 0x01
#define SPI_CLOCK_DIV64 0x02
#define SPI_CLOCK_DIV128 0x03
#define SPI_CLOCK_DIV2 0x04
#define SPI_CLOCK_DIV8 0x05
#define SPI_CLOCK_DIV32 0x06
#define SPI_CLOCK_DIV64 0x07
#define SPI_CLOCK_DIV2 0x04
#define SPI_CLOCK_DIV8 0x05
#define SPI_CLOCK_DIV32 0x06
#define SPI_CLOCK_DIV64 0x07
#define SPI_MODE0 0x00
#define SPI_MODE1 0x04
#define SPI_MODE2 0x08
#define SPI_MODE3 0x0C
#define SPI_MODE1 0x02
#define SPI_MODE2 0x01
#define SPI_MODE3 0x03
#define SPI_MODE_MASK 0x0C // CPOL = bit 3, CPHA = bit 2 on SPCR
#define SPI_CLOCK_MASK 0x03 // SPR1 = bit 1, SPR0 = bit 0 on SPCR
#define SPI_MODE_MASK 0x03 // CPOL = bit 3, CPHA = bit 2 on SPCR
#define SPI_CLOCK_MASK 0x03 // SPR1 = bit 1, SPR0 = bit 0 on SPCR
#define SPI_2XCLOCK_MASK 0x01 // SPI2X = bit 0 on SPSR
class SPIClass {
public:
inline static byte transfer(byte _data);
class SPIClass
{
public:
static byte transfer( byte _data ) ;
// SPI Configuration methods
// SPI Configuration methods
inline static void attachInterrupt();
inline static void detachInterrupt(); // Default
static void attachInterrupt( void ) ;
static void detachInterrupt( void ) ; // Default
static void begin(); // Default
static void end();
static void begin( void ) ; // Default
static void end( void ) ;
static void setBitOrder(uint8_t);
static void setDataMode(uint8_t);
static void setClockDivider(uint8_t);
};
static void setBitOrder( uint8_t ) ;
static void setDataMode( uint8_t ) ;
static void setClockDivider( uint8_t ) ;
} ;
extern SPIClass SPI;
byte SPIClass::transfer(byte _data) {
SPDR = _data;
while (!(SPSR & _BV(SPIF)))
;
return SPDR;
}
void SPIClass::attachInterrupt() {
SPCR |= _BV(SPIE);
}
void SPIClass::detachInterrupt() {
SPCR &= ~_BV(SPIE);
}
#endif