mirror of
https://github.com/esp8266/Arduino.git
synced 2025-04-19 23:22:16 +03:00
commit
bca0997046
@ -195,6 +195,7 @@ Libraries that don't rely on low-level access to AVR registers should work well.
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|||||||
- [NeoPixelBus](https://github.com/Makuna/NeoPixelBus) - Arduino NeoPixel library compatible with esp8266.
|
- [NeoPixelBus](https://github.com/Makuna/NeoPixelBus) - Arduino NeoPixel library compatible with esp8266.
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||||||
- [RTC](https://github.com/Makuna/Rtc) - Arduino Library for Ds1307 & Ds3231 compatible with esp8266.
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- [RTC](https://github.com/Makuna/Rtc) - Arduino Library for Ds1307 & Ds3231 compatible with esp8266.
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||||||
- [Blynk](https://github.com/blynkkk/blynk-library) - easy IoT framework for Makers (check out the [Kickstarter page](http://tiny.cc/blynk-kick)).
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- [Blynk](https://github.com/blynkkk/blynk-library) - easy IoT framework for Makers (check out the [Kickstarter page](http://tiny.cc/blynk-kick)).
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||||||
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- [arduinoWebSockets](https://github.com/Links2004/arduinoWebSockets) - WebSocket Server and Client compatible with esp8266 (RFC6455)
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||||||
|
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||||||
#### Upload via serial port ####
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#### Upload via serial port ####
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||||||
Pick the correct serial port.
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Pick the correct serial port.
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||||||
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70
boards.txt
70
boards.txt
@ -9,7 +9,7 @@ generic.name=Generic ESP8266 Module
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generic.upload.tool=esptool
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generic.upload.tool=esptool
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generic.upload.speed=115200
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generic.upload.speed=115200
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generic.upload.resetmethod=ck
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generic.upload.resetmethod=ck
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||||||
generic.upload.maximum_size=372736
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generic.upload.maximum_size=434160
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generic.upload.maximum_data_size=81920
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generic.upload.maximum_data_size=81920
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generic.upload.wait_for_upload_port=true
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generic.upload.wait_for_upload_port=true
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generic.serial.disableDTR=true
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generic.serial.disableDTR=true
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||||||
@ -59,31 +59,31 @@ generic.menu.FlashSize.512K.build.flash_ld=eagle.flash.512k.ld
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generic.menu.FlashSize.512K.build.spiffs_start=0x6B000
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generic.menu.FlashSize.512K.build.spiffs_start=0x6B000
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||||||
generic.menu.FlashSize.512K.build.spiffs_end=0x7B000
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generic.menu.FlashSize.512K.build.spiffs_end=0x7B000
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generic.menu.FlashSize.512K.build.spiffs_blocksize=4096
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generic.menu.FlashSize.512K.build.spiffs_blocksize=4096
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generic.menu.FlashSize.512K.upload.maximum_size=372736
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generic.menu.FlashSize.512K.upload.maximum_size=434160
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|
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generic.menu.FlashSize.1M512=1M (512K SPIFFS)
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generic.menu.FlashSize.1M512=1M (512K SPIFFS)
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generic.menu.FlashSize.1M512.build.flash_size=1M
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generic.menu.FlashSize.1M512.build.flash_size=1M
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generic.menu.FlashSize.1M512.build.flash_ld=eagle.flash.1m512.ld
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generic.menu.FlashSize.1M512.build.flash_ld=eagle.flash.1m512.ld
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generic.menu.FlashSize.1M512.build.spiffs_start=0x6B000
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generic.menu.FlashSize.1M512.build.spiffs_start=0x7B000
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generic.menu.FlashSize.1M512.build.spiffs_end=0xFB000
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generic.menu.FlashSize.1M512.build.spiffs_end=0xFB000
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generic.menu.FlashSize.1M512.build.spiffs_blocksize=8192
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generic.menu.FlashSize.1M512.build.spiffs_blocksize=8192
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generic.menu.FlashSize.1M512.upload.maximum_size=438272
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generic.menu.FlashSize.1M512.upload.maximum_size=499696
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generic.menu.FlashSize.1M256=1M (256K SPIFFS)
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generic.menu.FlashSize.1M256=1M (256K SPIFFS)
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generic.menu.FlashSize.1M256.build.flash_size=1M
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generic.menu.FlashSize.1M256.build.flash_size=1M
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generic.menu.FlashSize.1M256.build.flash_ld=eagle.flash.1m256.ld
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generic.menu.FlashSize.1M256.build.flash_ld=eagle.flash.1m256.ld
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generic.menu.FlashSize.1M256.build.spiffs_start=0xAB000
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generic.menu.FlashSize.1M256.build.spiffs_start=0xBB000
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generic.menu.FlashSize.1M256.build.spiffs_end=0xFB000
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generic.menu.FlashSize.1M256.build.spiffs_end=0xFB000
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generic.menu.FlashSize.1M256.build.spiffs_blocksize=4096
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generic.menu.FlashSize.1M256.build.spiffs_blocksize=4096
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generic.menu.FlashSize.1M256.upload.maximum_size=700416
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generic.menu.FlashSize.1M256.upload.maximum_size=761840
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generic.menu.FlashSize.1M128=1M (128K SPIFFS)
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generic.menu.FlashSize.1M128=1M (128K SPIFFS)
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generic.menu.FlashSize.1M128.build.flash_size=1M
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generic.menu.FlashSize.1M128.build.flash_size=1M
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generic.menu.FlashSize.1M128.build.flash_ld=eagle.flash.1m128.ld
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generic.menu.FlashSize.1M128.build.flash_ld=eagle.flash.1m128.ld
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generic.menu.FlashSize.1M128.build.spiffs_start=0xCB000
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generic.menu.FlashSize.1M128.build.spiffs_start=0xDB000
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generic.menu.FlashSize.1M128.build.spiffs_end=0xFB000
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generic.menu.FlashSize.1M128.build.spiffs_end=0xFB000
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generic.menu.FlashSize.1M128.build.spiffs_blocksize=4096
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generic.menu.FlashSize.1M128.build.spiffs_blocksize=4096
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generic.menu.FlashSize.1M128.upload.maximum_size=831488
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generic.menu.FlashSize.1M128.upload.maximum_size=892912
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|
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generic.menu.FlashSize.1M64=1M (64K SPIFFS)
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generic.menu.FlashSize.1M64=1M (64K SPIFFS)
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generic.menu.FlashSize.1M64.build.flash_size=1M
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generic.menu.FlashSize.1M64.build.flash_size=1M
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@ -91,7 +91,7 @@ generic.menu.FlashSize.1M64.build.flash_ld=eagle.flash.1m64.ld
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generic.menu.FlashSize.1M64.build.spiffs_start=0xEB000
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generic.menu.FlashSize.1M64.build.spiffs_start=0xEB000
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generic.menu.FlashSize.1M64.build.spiffs_end=0xFB000
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generic.menu.FlashSize.1M64.build.spiffs_end=0xFB000
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generic.menu.FlashSize.1M64.build.spiffs_blocksize=4096
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generic.menu.FlashSize.1M64.build.spiffs_blocksize=4096
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generic.menu.FlashSize.1M64.upload.maximum_size=897024
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generic.menu.FlashSize.1M64.upload.maximum_size=958448
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generic.menu.FlashSize.2M=2M (1M SPIFFS)
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generic.menu.FlashSize.2M=2M (1M SPIFFS)
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generic.menu.FlashSize.2M.build.flash_size=2M
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generic.menu.FlashSize.2M.build.flash_size=2M
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@ -99,7 +99,7 @@ generic.menu.FlashSize.2M.build.flash_ld=eagle.flash.2m.ld
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generic.menu.FlashSize.2M.build.spiffs_start=0x100000
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generic.menu.FlashSize.2M.build.spiffs_start=0x100000
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generic.menu.FlashSize.2M.build.spiffs_end=0x1FB000
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generic.menu.FlashSize.2M.build.spiffs_end=0x1FB000
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generic.menu.FlashSize.2M.build.spiffs_blocksize=8192
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generic.menu.FlashSize.2M.build.spiffs_blocksize=8192
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generic.menu.FlashSize.2M.upload.maximum_size=983040
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generic.menu.FlashSize.2M.upload.maximum_size=1044464
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generic.menu.FlashSize.4M=4M (3M SPIFFS)
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generic.menu.FlashSize.4M=4M (3M SPIFFS)
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generic.menu.FlashSize.4M.build.flash_size=4M
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generic.menu.FlashSize.4M.build.flash_size=4M
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@ -107,7 +107,7 @@ generic.menu.FlashSize.4M.build.flash_ld=eagle.flash.4m.ld
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generic.menu.FlashSize.4M.build.spiffs_start=0x100000
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generic.menu.FlashSize.4M.build.spiffs_start=0x100000
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generic.menu.FlashSize.4M.build.spiffs_end=0x3FB000
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generic.menu.FlashSize.4M.build.spiffs_end=0x3FB000
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generic.menu.FlashSize.4M.build.spiffs_blocksize=8192
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generic.menu.FlashSize.4M.build.spiffs_blocksize=8192
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generic.menu.FlashSize.4M.upload.maximum_size=983040
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generic.menu.FlashSize.4M.upload.maximum_size=1044464
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# disabled because espressif's bootloader refuses to write above 4M
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# disabled because espressif's bootloader refuses to write above 4M
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# generic.menu.FlashSize.8M=8M (7M SPIFFS)
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# generic.menu.FlashSize.8M=8M (7M SPIFFS)
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@ -134,7 +134,7 @@ modwifi.name=Olimex MOD-WIFI-ESP8266(-DEV)
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modwifi.upload.tool=esptool
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modwifi.upload.tool=esptool
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modwifi.upload.speed=115200
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modwifi.upload.speed=115200
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modwifi.upload.resetmethod=ck
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modwifi.upload.resetmethod=ck
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modwifi.upload.maximum_size=983040
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modwifi.upload.maximum_size=1044464
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modwifi.upload.maximum_data_size=81920
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modwifi.upload.maximum_data_size=81920
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modwifi.upload.wait_for_upload_port=true
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modwifi.upload.wait_for_upload_port=true
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modwifi.serial.disableDTR=true
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modwifi.serial.disableDTR=true
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@ -186,7 +186,7 @@ nodemcu.name=NodeMCU 0.9 (ESP-12 Module)
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nodemcu.upload.tool=esptool
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nodemcu.upload.tool=esptool
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nodemcu.upload.speed=115200
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nodemcu.upload.speed=115200
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nodemcu.upload.resetmethod=ck
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nodemcu.upload.resetmethod=ck
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nodemcu.upload.maximum_size=983040
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nodemcu.upload.maximum_size=1044464
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nodemcu.upload.maximum_data_size=81920
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nodemcu.upload.maximum_data_size=81920
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nodemcu.upload.wait_for_upload_port=true
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nodemcu.upload.wait_for_upload_port=true
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nodemcu.serial.disableDTR=true
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nodemcu.serial.disableDTR=true
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@ -237,7 +237,7 @@ nodemcuv2.name=NodeMCU 1.0 (ESP-12E Module)
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nodemcuv2.upload.tool=esptool
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nodemcuv2.upload.tool=esptool
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nodemcuv2.upload.speed=115200
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nodemcuv2.upload.speed=115200
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nodemcuv2.upload.resetmethod=ck
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nodemcuv2.upload.resetmethod=ck
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nodemcuv2.upload.maximum_size=983040
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nodemcuv2.upload.maximum_size=1044464
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nodemcuv2.upload.maximum_data_size=81920
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nodemcuv2.upload.maximum_data_size=81920
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nodemcuv2.upload.wait_for_upload_port=true
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nodemcuv2.upload.wait_for_upload_port=true
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nodemcuv2.serial.disableDTR=true
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nodemcuv2.serial.disableDTR=true
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@ -282,6 +282,48 @@ nodemcuv2.menu.UploadSpeed.512000.upload.speed=512000
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nodemcuv2.menu.UploadSpeed.921600=921600
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nodemcuv2.menu.UploadSpeed.921600=921600
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nodemcuv2.menu.UploadSpeed.921600.upload.speed=921600
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nodemcuv2.menu.UploadSpeed.921600.upload.speed=921600
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##############################################################
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huzzah.name=Adafruit HUZZAH ESP8266
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huzzah.upload.tool=esptool
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huzzah.upload.speed=115200
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huzzah.upload.resetmethod=ck
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huzzah.upload.maximum_size=1044464
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huzzah.upload.maximum_data_size=81920
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huzzah.upload.wait_for_upload_port=true
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|
huzzah.serial.disableDTR=true
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|
huzzah.serial.disableRTS=true
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|
|
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|
huzzah.build.mcu=esp8266
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|
huzzah.build.f_cpu=80000000L
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|
huzzah.build.board=ESP8266_ESP12
|
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|
huzzah.build.core=esp8266
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||||||
|
huzzah.build.variant=adafruit
|
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|
huzzah.build.flash_mode=qio
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huzzah.build.flash_size=4M
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|
huzzah.build.flash_freq=40
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huzzah.build.flash_ld=eagle.flash.4m.ld
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|
huzzah.build.spiffs_start=0x100000
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|
huzzah.build.spiffs_end=0x3FB000
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|
huzzah.build.spiffs_pagesize=256
|
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|
huzzah.build.spiffs_blocksize=8192
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|
|
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|
huzzah.menu.CpuFrequency.80=80 MHz
|
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|
huzzah.menu.CpuFrequency.80.build.f_cpu=80000000L
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|
huzzah.menu.CpuFrequency.160=160 MHz
|
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huzzah.menu.CpuFrequency.160.build.f_cpu=160000000L
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|
|
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|
huzzah.menu.UploadSpeed.115200=115200
|
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|
huzzah.menu.UploadSpeed.115200.upload.speed=115200
|
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|
huzzah.menu.UploadSpeed.9600=9600
|
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|
huzzah.menu.UploadSpeed.9600.upload.speed=9600
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|
huzzah.menu.UploadSpeed.57600=57600
|
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|
huzzah.menu.UploadSpeed.57600.upload.speed=57600
|
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|
huzzah.menu.UploadSpeed.256000=256000
|
||||||
|
huzzah.menu.UploadSpeed.256000.upload.speed=256000
|
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|
huzzah.menu.UploadSpeed.921600=921600
|
||||||
|
huzzah.menu.UploadSpeed.921600.upload.speed=921600
|
||||||
|
|
||||||
##############################################################
|
##############################################################
|
||||||
# wifio.name=Wifio
|
# wifio.name=Wifio
|
||||||
#
|
#
|
||||||
|
26
bootloaders/eboot/LICENSE
Normal file
26
bootloaders/eboot/LICENSE
Normal file
@ -0,0 +1,26 @@
|
|||||||
|
Copyright (c) 2015 Ivan Grokhotkov
|
||||||
|
All rights reserved.
|
||||||
|
|
||||||
|
Redistribution and use in source and binary forms, with or without modification,
|
||||||
|
are permitted provided that the following conditions are met:
|
||||||
|
|
||||||
|
1. Redistributions of source code must retain the above copyright notice,
|
||||||
|
this list of conditions and the following disclaimer.
|
||||||
|
2. Redistributions in binary form must reproduce the above copyright notice,
|
||||||
|
this list of conditions and the following disclaimer in the documentation
|
||||||
|
and/or other materials provided with the distribution.
|
||||||
|
3. The name of the authors may not be used to endorse or promote products
|
||||||
|
derived from this software without specific prior written permission.
|
||||||
|
|
||||||
|
THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
|
||||||
|
WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
||||||
|
MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
|
||||||
|
SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
|
||||||
|
EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
|
||||||
|
OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
|
||||||
|
INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
|
||||||
|
CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
|
||||||
|
IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
|
||||||
|
OF SUCH DAMAGE.
|
||||||
|
|
||||||
|
Authors: Ivan Grokhotkov
|
50
bootloaders/eboot/Makefile
Normal file
50
bootloaders/eboot/Makefile
Normal file
@ -0,0 +1,50 @@
|
|||||||
|
XTENSA_TOOCHAIN ?=
|
||||||
|
|
||||||
|
BIN_DIR := ./
|
||||||
|
TARGET_DIR := ./
|
||||||
|
|
||||||
|
TARGET_OBJ_FILES := \
|
||||||
|
eboot.o \
|
||||||
|
|
||||||
|
TARGET_OBJ_PATHS := $(addprefix $(TARGET_DIR)/,$(TARGET_OBJ_FILES))
|
||||||
|
|
||||||
|
CC := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-gcc
|
||||||
|
CXX := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-g++
|
||||||
|
AR := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-ar
|
||||||
|
LD := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-gcc
|
||||||
|
OBJDUMP := $(XTENSA_TOOCHAIN)xtensa-lx106-elf-objdump
|
||||||
|
|
||||||
|
|
||||||
|
CFLAGS += -std=gnu99
|
||||||
|
|
||||||
|
CFLAGS += -O0 -g -Wpointer-arith -Wno-implicit-function-declaration -Wl,-EL -fno-inline-functions -nostdlib -mlongcalls -mno-text-section-literals
|
||||||
|
|
||||||
|
LDFLAGS += -nostdlib -Wl,--no-check-sections -umain
|
||||||
|
|
||||||
|
LD_SCRIPT := -Teboot.ld
|
||||||
|
|
||||||
|
APP_OUT:= eboot.elf
|
||||||
|
APP_AR := eboot.a
|
||||||
|
APP_FW := eboot.bin
|
||||||
|
|
||||||
|
all: $(APP_FW)
|
||||||
|
|
||||||
|
$(APP_AR): $(TARGET_OBJ_PATHS)
|
||||||
|
$(AR) cru $@ $^
|
||||||
|
|
||||||
|
|
||||||
|
$(APP_OUT): $(APP_AR)
|
||||||
|
$(LD) $(LD_SCRIPT) $(LDFLAGS) -Wl,--start-group -Wl,--whole-archive $(APP_AR) -Wl,--end-group -o $@
|
||||||
|
|
||||||
|
$(APP_FW): $(APP_OUT)
|
||||||
|
$(ESPTOOL) -vvv -eo $(APP_OUT) -bo $@ -bs .text -bs .data -bs .rodata -bc -ec || true
|
||||||
|
|
||||||
|
|
||||||
|
clean:
|
||||||
|
rm -f *.o
|
||||||
|
rm -f $(APP_AR)
|
||||||
|
rm -f $(APP_OUT)
|
||||||
|
|
||||||
|
|
||||||
|
.PHONY: all clean default
|
||||||
|
|
86
bootloaders/eboot/eboot.c
Normal file
86
bootloaders/eboot/eboot.c
Normal file
@ -0,0 +1,86 @@
|
|||||||
|
/* Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
|
||||||
|
* This file is part of eboot bootloader.
|
||||||
|
*
|
||||||
|
* Redistribution and use is permitted according to the conditions of the
|
||||||
|
* 3-clause BSD license to be found in the LICENSE file.
|
||||||
|
*/
|
||||||
|
|
||||||
|
|
||||||
|
#include <stddef.h>
|
||||||
|
#include <stdint.h>
|
||||||
|
#include <stdbool.h>
|
||||||
|
#include "eboot.h"
|
||||||
|
extern void* flashchip;
|
||||||
|
|
||||||
|
#define SWRST do { (*((volatile uint32_t*) 0x60000700)) |= 0x80000000; } while(0);
|
||||||
|
|
||||||
|
|
||||||
|
int load_app_from_flash_raw(const uint32_t flash_addr)
|
||||||
|
{
|
||||||
|
image_header_t image_header;
|
||||||
|
uint32_t pos = flash_addr + APP_START_OFFSET;
|
||||||
|
|
||||||
|
if (SPIRead(pos, &image_header, sizeof(image_header))) {
|
||||||
|
return 1;
|
||||||
|
}
|
||||||
|
pos += sizeof(image_header);
|
||||||
|
|
||||||
|
|
||||||
|
for (uint32_t section_index = 0;
|
||||||
|
section_index < image_header.num_segments;
|
||||||
|
++section_index)
|
||||||
|
{
|
||||||
|
section_header_t section_header = {0};
|
||||||
|
if (SPIRead(pos, §ion_header, sizeof(section_header))) {
|
||||||
|
return 2;
|
||||||
|
}
|
||||||
|
pos += sizeof(section_header);
|
||||||
|
|
||||||
|
const uint32_t address = section_header.address;
|
||||||
|
|
||||||
|
bool load = false;
|
||||||
|
|
||||||
|
if (address < 0x40000000) {
|
||||||
|
load = true;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (address >= 0x40100000 && address < 0x40108000) {
|
||||||
|
load = true;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (address >= 0x60000000) {
|
||||||
|
load = true;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (!load) {
|
||||||
|
pos += section_header.size;
|
||||||
|
continue;
|
||||||
|
}
|
||||||
|
|
||||||
|
if (SPIRead(pos, (void*)address, section_header.size))
|
||||||
|
return 3;
|
||||||
|
|
||||||
|
pos += section_header.size;
|
||||||
|
}
|
||||||
|
|
||||||
|
register uint32_t sp asm("a1") = 0x3ffffff0;
|
||||||
|
register uint32_t pc asm("a3") = image_header.entry;
|
||||||
|
__asm__ __volatile__ ("jx a3");
|
||||||
|
|
||||||
|
return 0;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
void main()
|
||||||
|
{
|
||||||
|
int res = load_app_from_flash_raw(0);
|
||||||
|
if (res) {
|
||||||
|
ets_putc('\n');
|
||||||
|
ets_putc('#');
|
||||||
|
ets_putc('0' + res);
|
||||||
|
ets_putc('\n');
|
||||||
|
SWRST;
|
||||||
|
}
|
||||||
|
|
||||||
|
while(true){}
|
||||||
|
}
|
BIN
bootloaders/eboot/eboot.elf
Executable file
BIN
bootloaders/eboot/eboot.elf
Executable file
Binary file not shown.
41
bootloaders/eboot/eboot.h
Normal file
41
bootloaders/eboot/eboot.h
Normal file
@ -0,0 +1,41 @@
|
|||||||
|
/* Copyright (c) 2015 Ivan Grokhotkov. All rights reserved.
|
||||||
|
* This file is part of eboot bootloader.
|
||||||
|
*
|
||||||
|
* Redistribution and use is permitted according to the conditions of the
|
||||||
|
* 3-clause BSD license to be found in the LICENSE file.
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef EBOOT_H
|
||||||
|
#define EBOOT_H
|
||||||
|
|
||||||
|
|
||||||
|
int SPIEraseBlock(uint32_t block);
|
||||||
|
int SPIEraseSector(uint32_t sector);
|
||||||
|
int SPIRead(uint32_t addr, void *dest, size_t size);
|
||||||
|
int SPIWrite(uint32_t addr, void *src, size_t size);
|
||||||
|
|
||||||
|
#define APP_START_OFFSET 0x1000
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
unsigned char magic;
|
||||||
|
unsigned char num_segments;
|
||||||
|
|
||||||
|
/* SPI Flash Interface (0 = QIO, 1 = QOUT, 2 = DIO, 0x3 = DOUT) */
|
||||||
|
unsigned char flash_mode;
|
||||||
|
|
||||||
|
/* High four bits: 0 = 512K, 1 = 256K, 2 = 1M, 3 = 2M, 4 = 4M,
|
||||||
|
Low four bits: 0 = 40MHz, 1= 26MHz, 2 = 20MHz, 0xf = 80MHz */
|
||||||
|
unsigned char flash_size_freq;
|
||||||
|
|
||||||
|
uint32_t entry;
|
||||||
|
} image_header_t;
|
||||||
|
|
||||||
|
|
||||||
|
typedef struct {
|
||||||
|
uint32_t address;
|
||||||
|
uint32_t size;
|
||||||
|
} section_header_t;
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
|
#endif //EBOOT_H
|
176
bootloaders/eboot/eboot.ld
Normal file
176
bootloaders/eboot/eboot.ld
Normal file
@ -0,0 +1,176 @@
|
|||||||
|
/* This linker script generated from xt-genldscripts.tpp for LSP . */
|
||||||
|
/* Linker Script for ld -N */
|
||||||
|
MEMORY
|
||||||
|
{
|
||||||
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
|
iram1_0_seg : org = 0x4010f800, len = 0x800
|
||||||
|
irom0_0_seg : org = 0x40240000, len = 0x32000
|
||||||
|
}
|
||||||
|
|
||||||
|
PHDRS
|
||||||
|
{
|
||||||
|
dport0_0_phdr PT_LOAD;
|
||||||
|
dram0_0_phdr PT_LOAD;
|
||||||
|
dram0_0_bss_phdr PT_LOAD;
|
||||||
|
iram1_0_phdr PT_LOAD;
|
||||||
|
irom0_0_phdr PT_LOAD;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
/* Default entry point: */
|
||||||
|
ENTRY(main)
|
||||||
|
PROVIDE(_memmap_vecbase_reset = 0x40000000);
|
||||||
|
/* Various memory-map dependent cache attribute settings: */
|
||||||
|
_memmap_cacheattr_wb_base = 0x00000110;
|
||||||
|
_memmap_cacheattr_wt_base = 0x00000110;
|
||||||
|
_memmap_cacheattr_bp_base = 0x00000220;
|
||||||
|
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
|
||||||
|
_memmap_cacheattr_wb_trapnull = 0x2222211F;
|
||||||
|
_memmap_cacheattr_wba_trapnull = 0x2222211F;
|
||||||
|
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
|
||||||
|
_memmap_cacheattr_wt_trapnull = 0x2222211F;
|
||||||
|
_memmap_cacheattr_bp_trapnull = 0x2222222F;
|
||||||
|
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
|
||||||
|
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
|
||||||
|
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
|
||||||
|
_memmap_cacheattr_wb_allvalid = 0x22222112;
|
||||||
|
_memmap_cacheattr_wt_allvalid = 0x22222112;
|
||||||
|
_memmap_cacheattr_bp_allvalid = 0x22222222;
|
||||||
|
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
|
||||||
|
|
||||||
|
SECTIONS
|
||||||
|
{
|
||||||
|
|
||||||
|
.dport0.rodata : ALIGN(4)
|
||||||
|
{
|
||||||
|
_dport0_rodata_start = ABSOLUTE(.);
|
||||||
|
*(.dport0.rodata)
|
||||||
|
*(.dport.rodata)
|
||||||
|
_dport0_rodata_end = ABSOLUTE(.);
|
||||||
|
} >dport0_0_seg :dport0_0_phdr
|
||||||
|
|
||||||
|
.dport0.literal : ALIGN(4)
|
||||||
|
{
|
||||||
|
_dport0_literal_start = ABSOLUTE(.);
|
||||||
|
*(.dport0.literal)
|
||||||
|
*(.dport.literal)
|
||||||
|
_dport0_literal_end = ABSOLUTE(.);
|
||||||
|
} >dport0_0_seg :dport0_0_phdr
|
||||||
|
|
||||||
|
.dport0.data : ALIGN(4)
|
||||||
|
{
|
||||||
|
_dport0_data_start = ABSOLUTE(.);
|
||||||
|
*(.dport0.data)
|
||||||
|
*(.dport.data)
|
||||||
|
_dport0_data_end = ABSOLUTE(.);
|
||||||
|
} >dport0_0_seg :dport0_0_phdr
|
||||||
|
|
||||||
|
.data : ALIGN(4)
|
||||||
|
{
|
||||||
|
_heap_start = ABSOLUTE(.);
|
||||||
|
/* _stack_sentry = ALIGN(0x8); */
|
||||||
|
} >dram0_0_seg :dram0_0_bss_phdr
|
||||||
|
/* __stack = 0x3ffc8000; */
|
||||||
|
|
||||||
|
.text : ALIGN(4)
|
||||||
|
{
|
||||||
|
_stext = .;
|
||||||
|
_text_start = ABSOLUTE(.);
|
||||||
|
*(.entry.text)
|
||||||
|
*(.init.literal)
|
||||||
|
*(.init)
|
||||||
|
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||||
|
*(.fini.literal)
|
||||||
|
*(.fini)
|
||||||
|
*(.gnu.version)
|
||||||
|
_text_end = ABSOLUTE(.);
|
||||||
|
_etext = .;
|
||||||
|
. = ALIGN (8);
|
||||||
|
_data_start = ABSOLUTE(.);
|
||||||
|
*(.data)
|
||||||
|
*(.data.*)
|
||||||
|
*(.gnu.linkonce.d.*)
|
||||||
|
*(.data1)
|
||||||
|
*(.sdata)
|
||||||
|
*(.sdata.*)
|
||||||
|
*(.gnu.linkonce.s.*)
|
||||||
|
*(.sdata2)
|
||||||
|
*(.sdata2.*)
|
||||||
|
*(.gnu.linkonce.s2.*)
|
||||||
|
*(.jcr)
|
||||||
|
_data_end = ABSOLUTE(.);
|
||||||
|
. = ALIGN (8);
|
||||||
|
_rodata_start = ABSOLUTE(.);
|
||||||
|
*(.rodata)
|
||||||
|
*(.rodata.*)
|
||||||
|
*(.gnu.linkonce.r.*)
|
||||||
|
*(.rodata1)
|
||||||
|
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
|
||||||
|
*(.xt_except_table)
|
||||||
|
*(.gcc_except_table)
|
||||||
|
*(.gnu.linkonce.e.*)
|
||||||
|
*(.gnu.version_r)
|
||||||
|
*(.eh_frame)
|
||||||
|
/* C++ constructor and destructor tables, properly ordered: */
|
||||||
|
KEEP (*crtbegin.o(.ctors))
|
||||||
|
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||||
|
KEEP (*(SORT(.ctors.*)))
|
||||||
|
KEEP (*(.ctors))
|
||||||
|
KEEP (*crtbegin.o(.dtors))
|
||||||
|
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||||
|
KEEP (*(SORT(.dtors.*)))
|
||||||
|
KEEP (*(.dtors))
|
||||||
|
/* C++ exception handlers table: */
|
||||||
|
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
|
||||||
|
*(.xt_except_desc)
|
||||||
|
*(.gnu.linkonce.h.*)
|
||||||
|
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||||
|
*(.xt_except_desc_end)
|
||||||
|
*(.dynamic)
|
||||||
|
*(.gnu.version_d)
|
||||||
|
. = ALIGN(4); /* this table MUST be 4-byte aligned */
|
||||||
|
_bss_table_start = ABSOLUTE(.);
|
||||||
|
LONG(_bss_start)
|
||||||
|
LONG(_bss_end)
|
||||||
|
_bss_table_end = ABSOLUTE(.);
|
||||||
|
_rodata_end = ABSOLUTE(.);
|
||||||
|
|
||||||
|
. = ALIGN (8);
|
||||||
|
_bss_start = ABSOLUTE(.);
|
||||||
|
*(.dynsbss)
|
||||||
|
*(.sbss)
|
||||||
|
*(.sbss.*)
|
||||||
|
*(.gnu.linkonce.sb.*)
|
||||||
|
*(.scommon)
|
||||||
|
*(.sbss2)
|
||||||
|
*(.sbss2.*)
|
||||||
|
*(.gnu.linkonce.sb2.*)
|
||||||
|
*(.dynbss)
|
||||||
|
*(.bss)
|
||||||
|
*(.bss.*)
|
||||||
|
*(.gnu.linkonce.b.*)
|
||||||
|
*(COMMON)
|
||||||
|
. = ALIGN (8);
|
||||||
|
_bss_end = ABSOLUTE(.);
|
||||||
|
} >iram1_0_seg :iram1_0_phdr
|
||||||
|
|
||||||
|
.lit4 : ALIGN(4)
|
||||||
|
{
|
||||||
|
_lit4_start = ABSOLUTE(.);
|
||||||
|
*(*.lit4)
|
||||||
|
*(.lit4.*)
|
||||||
|
*(.gnu.linkonce.lit4.*)
|
||||||
|
_lit4_end = ABSOLUTE(.);
|
||||||
|
} >iram1_0_seg :iram1_0_phdr
|
||||||
|
|
||||||
|
.irom0.text : ALIGN(4)
|
||||||
|
{
|
||||||
|
_irom0_text_start = ABSOLUTE(.);
|
||||||
|
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
|
||||||
|
_irom0_text_end = ABSOLUTE(.);
|
||||||
|
} >irom0_0_seg :irom0_0_phdr
|
||||||
|
}
|
||||||
|
|
||||||
|
/* get ROM code address */
|
||||||
|
INCLUDE "rom.ld"
|
344
bootloaders/eboot/rom.ld
Executable file
344
bootloaders/eboot/rom.ld
Executable file
@ -0,0 +1,344 @@
|
|||||||
|
PROVIDE ( Cache_Read_Disable = 0x400047f0 );
|
||||||
|
PROVIDE ( Cache_Read_Enable = 0x40004678 );
|
||||||
|
PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 );
|
||||||
|
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c );
|
||||||
|
PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 );
|
||||||
|
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 );
|
||||||
|
PROVIDE ( GetUartDevice = 0x40003f4c );
|
||||||
|
PROVIDE ( MD5Final = 0x40009900 );
|
||||||
|
PROVIDE ( MD5Init = 0x40009818 );
|
||||||
|
PROVIDE ( MD5Update = 0x40009834 );
|
||||||
|
PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 );
|
||||||
|
PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c );
|
||||||
|
PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 );
|
||||||
|
PROVIDE ( RcvMsg = 0x40003eac );
|
||||||
|
PROVIDE ( SHA1Final = 0x4000b648 );
|
||||||
|
PROVIDE ( SHA1Init = 0x4000b584 );
|
||||||
|
PROVIDE ( SHA1Transform = 0x4000a364 );
|
||||||
|
PROVIDE ( SHA1Update = 0x4000b5a8 );
|
||||||
|
PROVIDE ( Wait_SPI_Idle = 0x4000448c );
|
||||||
|
PROVIDE ( SPIEraseArea = 0x40004b44 );
|
||||||
|
PROVIDE ( SPIEraseBlock = 0x400049b4 );
|
||||||
|
PROVIDE ( SPIEraseChip = 0x40004984 );
|
||||||
|
PROVIDE ( SPIEraseSector = 0x40004a00 );
|
||||||
|
PROVIDE ( SPILock = 0x400048a8 );
|
||||||
|
PROVIDE ( SPIParamCfg = 0x40004c2c );
|
||||||
|
PROVIDE ( SPIRead = 0x40004b1c );
|
||||||
|
PROVIDE ( SPIReadModeCnfig = 0x400048ec );
|
||||||
|
PROVIDE ( SPIUnlock = 0x40004878 );
|
||||||
|
PROVIDE ( SPIWrite = 0x40004a4c );
|
||||||
|
PROVIDE ( SelectSpiFunction = 0x40003f58 );
|
||||||
|
PROVIDE ( SendMsg = 0x40003cf4 );
|
||||||
|
PROVIDE ( UartConnCheck = 0x40003230 );
|
||||||
|
PROVIDE ( UartConnectProc = 0x400037a0 );
|
||||||
|
PROVIDE ( UartDwnLdProc = 0x40003368 );
|
||||||
|
PROVIDE ( UartGetCmdLn = 0x40003ef4 );
|
||||||
|
PROVIDE ( UartRegReadProc = 0x4000381c );
|
||||||
|
PROVIDE ( UartRegWriteProc = 0x400037ac );
|
||||||
|
PROVIDE ( UartRxString = 0x40003c30 );
|
||||||
|
PROVIDE ( Uart_Init = 0x40003a14 );
|
||||||
|
PROVIDE ( _DebugExceptionVector = 0x40000010 );
|
||||||
|
PROVIDE ( _DoubleExceptionVector = 0x40000070 );
|
||||||
|
PROVIDE ( _KernelExceptionVector = 0x40000030 );
|
||||||
|
PROVIDE ( _NMIExceptionVector = 0x40000020 );
|
||||||
|
PROVIDE ( _ResetHandler = 0x400000a4 );
|
||||||
|
PROVIDE ( _ResetVector = 0x40000080 );
|
||||||
|
PROVIDE ( _UserExceptionVector = 0x40000050 );
|
||||||
|
PROVIDE ( __adddf3 = 0x4000c538 );
|
||||||
|
PROVIDE ( __addsf3 = 0x4000c180 );
|
||||||
|
PROVIDE ( __divdf3 = 0x4000cb94 );
|
||||||
|
PROVIDE ( __divdi3 = 0x4000ce60 );
|
||||||
|
PROVIDE ( __divsi3 = 0x4000dc88 );
|
||||||
|
PROVIDE ( __extendsfdf2 = 0x4000cdfc );
|
||||||
|
PROVIDE ( __fixdfsi = 0x4000ccb8 );
|
||||||
|
PROVIDE ( __fixunsdfsi = 0x4000cd00 );
|
||||||
|
PROVIDE ( __fixunssfsi = 0x4000c4c4 );
|
||||||
|
PROVIDE ( __floatsidf = 0x4000e2f0 );
|
||||||
|
PROVIDE ( __floatsisf = 0x4000e2ac );
|
||||||
|
PROVIDE ( __floatunsidf = 0x4000e2e8 );
|
||||||
|
PROVIDE ( __floatunsisf = 0x4000e2a4 );
|
||||||
|
PROVIDE ( __muldf3 = 0x4000c8f0 );
|
||||||
|
PROVIDE ( __muldi3 = 0x40000650 );
|
||||||
|
PROVIDE ( __mulsf3 = 0x4000c3dc );
|
||||||
|
PROVIDE ( __subdf3 = 0x4000c688 );
|
||||||
|
PROVIDE ( __subsf3 = 0x4000c268 );
|
||||||
|
PROVIDE ( __truncdfsf2 = 0x4000cd5c );
|
||||||
|
PROVIDE ( __udivdi3 = 0x4000d310 );
|
||||||
|
PROVIDE ( __udivsi3 = 0x4000e21c );
|
||||||
|
PROVIDE ( __umoddi3 = 0x4000d770 );
|
||||||
|
PROVIDE ( __umodsi3 = 0x4000e268 );
|
||||||
|
PROVIDE ( __umulsidi3 = 0x4000dcf0 );
|
||||||
|
PROVIDE ( _rom_store = 0x4000e388 );
|
||||||
|
PROVIDE ( _rom_store_table = 0x4000e328 );
|
||||||
|
PROVIDE ( _start = 0x4000042c );
|
||||||
|
PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 );
|
||||||
|
PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 );
|
||||||
|
PROVIDE ( _xtos_cause3_handler = 0x40000590 );
|
||||||
|
PROVIDE ( _xtos_ints_off = 0x4000bda4 );
|
||||||
|
PROVIDE ( _xtos_ints_on = 0x4000bd84 );
|
||||||
|
PROVIDE ( _xtos_l1int_handler = 0x4000048c );
|
||||||
|
PROVIDE ( _xtos_p_none = 0x4000dbf8 );
|
||||||
|
PROVIDE ( _xtos_restore_intlevel = 0x4000056c );
|
||||||
|
PROVIDE ( _xtos_return_from_exc = 0x4000dc54 );
|
||||||
|
PROVIDE ( _xtos_set_exception_handler = 0x40000454 );
|
||||||
|
PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 );
|
||||||
|
PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 );
|
||||||
|
PROVIDE ( _xtos_set_intlevel = 0x4000dbfc );
|
||||||
|
PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 );
|
||||||
|
PROVIDE ( _xtos_set_vpri = 0x40000574 );
|
||||||
|
PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 );
|
||||||
|
PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 );
|
||||||
|
PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c );
|
||||||
|
PROVIDE ( aes_decrypt = 0x400092d4 );
|
||||||
|
PROVIDE ( aes_decrypt_deinit = 0x400092e4 );
|
||||||
|
PROVIDE ( aes_decrypt_init = 0x40008ea4 );
|
||||||
|
PROVIDE ( aes_unwrap = 0x40009410 );
|
||||||
|
PROVIDE ( base64_decode = 0x40009648 );
|
||||||
|
PROVIDE ( base64_encode = 0x400094fc );
|
||||||
|
PROVIDE ( bzero = 0x4000de84 );
|
||||||
|
PROVIDE ( cmd_parse = 0x40000814 );
|
||||||
|
PROVIDE ( conv_str_decimal = 0x40000b24 );
|
||||||
|
PROVIDE ( conv_str_hex = 0x40000cb8 );
|
||||||
|
PROVIDE ( convert_para_str = 0x40000a60 );
|
||||||
|
PROVIDE ( dtm_get_intr_mask = 0x400026d0 );
|
||||||
|
PROVIDE ( dtm_params_init = 0x4000269c );
|
||||||
|
PROVIDE ( dtm_set_intr_mask = 0x400026c8 );
|
||||||
|
PROVIDE ( dtm_set_params = 0x400026dc );
|
||||||
|
PROVIDE ( eprintf = 0x40001d14 );
|
||||||
|
PROVIDE ( eprintf_init_buf = 0x40001cb8 );
|
||||||
|
PROVIDE ( eprintf_to_host = 0x40001d48 );
|
||||||
|
PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 );
|
||||||
|
PROVIDE ( est_reset_printf_buf_len = 0x4000249c );
|
||||||
|
PROVIDE ( ets_bzero = 0x40002ae8 );
|
||||||
|
PROVIDE ( ets_char2xdigit = 0x40002b74 );
|
||||||
|
PROVIDE ( ets_delay_us = 0x40002ecc );
|
||||||
|
PROVIDE ( ets_enter_sleep = 0x400027b8 );
|
||||||
|
PROVIDE ( ets_external_printf = 0x40002578 );
|
||||||
|
PROVIDE ( ets_get_cpu_frequency = 0x40002f0c );
|
||||||
|
PROVIDE ( ets_getc = 0x40002bcc );
|
||||||
|
PROVIDE ( ets_install_external_printf = 0x40002450 );
|
||||||
|
PROVIDE ( ets_install_putc1 = 0x4000242c );
|
||||||
|
PROVIDE ( ets_install_putc2 = 0x4000248c );
|
||||||
|
PROVIDE ( ets_install_uart_printf = 0x40002438 );
|
||||||
|
PROVIDE ( ets_intr_lock = 0x40000f74 );
|
||||||
|
PROVIDE ( ets_intr_unlock = 0x40000f80 );
|
||||||
|
PROVIDE ( ets_isr_attach = 0x40000f88 );
|
||||||
|
PROVIDE ( ets_isr_mask = 0x40000f98 );
|
||||||
|
PROVIDE ( ets_isr_unmask = 0x40000fa8 );
|
||||||
|
PROVIDE ( ets_memcmp = 0x400018d4 );
|
||||||
|
PROVIDE ( ets_memcpy = 0x400018b4 );
|
||||||
|
PROVIDE ( ets_memmove = 0x400018c4 );
|
||||||
|
PROVIDE ( ets_memset = 0x400018a4 );
|
||||||
|
PROVIDE ( ets_post = 0x40000e24 );
|
||||||
|
PROVIDE ( ets_printf = 0x400024cc );
|
||||||
|
PROVIDE ( ets_putc = 0x40002be8 );
|
||||||
|
PROVIDE ( ets_rtc_int_register = 0x40002a40 );
|
||||||
|
PROVIDE ( ets_run = 0x40000e04 );
|
||||||
|
PROVIDE ( ets_set_idle_cb = 0x40000dc0 );
|
||||||
|
PROVIDE ( ets_set_user_start = 0x40000fbc );
|
||||||
|
PROVIDE ( ets_str2macaddr = 0x40002af8 );
|
||||||
|
PROVIDE ( ets_strcmp = 0x40002aa8 );
|
||||||
|
PROVIDE ( ets_strcpy = 0x40002a88 );
|
||||||
|
PROVIDE ( ets_strlen = 0x40002ac8 );
|
||||||
|
PROVIDE ( ets_strncmp = 0x40002ab8 );
|
||||||
|
PROVIDE ( ets_strncpy = 0x40002a98 );
|
||||||
|
PROVIDE ( ets_strstr = 0x40002ad8 );
|
||||||
|
PROVIDE ( ets_task = 0x40000dd0 );
|
||||||
|
PROVIDE ( ets_timer_arm = 0x40002cc4 );
|
||||||
|
PROVIDE ( ets_timer_disarm = 0x40002d40 );
|
||||||
|
PROVIDE ( ets_timer_done = 0x40002d80 );
|
||||||
|
PROVIDE ( ets_timer_handler_isr = 0x40002da8 );
|
||||||
|
PROVIDE ( ets_timer_init = 0x40002e68 );
|
||||||
|
PROVIDE ( ets_timer_setfn = 0x40002c48 );
|
||||||
|
PROVIDE ( ets_uart_printf = 0x40002544 );
|
||||||
|
PROVIDE ( ets_update_cpu_frequency = 0x40002f04 );
|
||||||
|
PROVIDE ( ets_vprintf = 0x40001f00 );
|
||||||
|
PROVIDE ( ets_wdt_disable = 0x400030f0 );
|
||||||
|
PROVIDE ( ets_wdt_enable = 0x40002fa0 );
|
||||||
|
PROVIDE ( ets_wdt_get_mode = 0x40002f34 );
|
||||||
|
PROVIDE ( ets_wdt_init = 0x40003170 );
|
||||||
|
PROVIDE ( ets_wdt_restore = 0x40003158 );
|
||||||
|
PROVIDE ( ets_write_char = 0x40001da0 );
|
||||||
|
PROVIDE ( get_first_seg = 0x4000091c );
|
||||||
|
PROVIDE ( gpio_init = 0x40004c50 );
|
||||||
|
PROVIDE ( gpio_input_get = 0x40004cf0 );
|
||||||
|
PROVIDE ( gpio_intr_ack = 0x40004dcc );
|
||||||
|
PROVIDE ( gpio_intr_handler_register = 0x40004e28 );
|
||||||
|
PROVIDE ( gpio_intr_pending = 0x40004d88 );
|
||||||
|
PROVIDE ( gpio_intr_test = 0x40004efc );
|
||||||
|
PROVIDE ( gpio_output_set = 0x40004cd0 );
|
||||||
|
PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 );
|
||||||
|
PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 );
|
||||||
|
PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 );
|
||||||
|
PROVIDE ( gpio_register_get = 0x40004d5c );
|
||||||
|
PROVIDE ( gpio_register_set = 0x40004d04 );
|
||||||
|
PROVIDE ( hmac_md5 = 0x4000a2cc );
|
||||||
|
PROVIDE ( hmac_md5_vector = 0x4000a160 );
|
||||||
|
PROVIDE ( hmac_sha1 = 0x4000ba28 );
|
||||||
|
PROVIDE ( hmac_sha1_vector = 0x4000b8b4 );
|
||||||
|
PROVIDE ( lldesc_build_chain = 0x40004f40 );
|
||||||
|
PROVIDE ( lldesc_num2link = 0x40005050 );
|
||||||
|
PROVIDE ( lldesc_set_owner = 0x4000507c );
|
||||||
|
PROVIDE ( main = 0x40000fec );
|
||||||
|
PROVIDE ( md5_vector = 0x400097ac );
|
||||||
|
PROVIDE ( mem_calloc = 0x40001c2c );
|
||||||
|
PROVIDE ( mem_free = 0x400019e0 );
|
||||||
|
PROVIDE ( mem_init = 0x40001998 );
|
||||||
|
PROVIDE ( mem_malloc = 0x40001b40 );
|
||||||
|
PROVIDE ( mem_realloc = 0x40001c6c );
|
||||||
|
PROVIDE ( mem_trim = 0x40001a14 );
|
||||||
|
PROVIDE ( mem_zalloc = 0x40001c58 );
|
||||||
|
PROVIDE ( memcmp = 0x4000dea8 );
|
||||||
|
PROVIDE ( memcpy = 0x4000df48 );
|
||||||
|
PROVIDE ( memmove = 0x4000e04c );
|
||||||
|
PROVIDE ( memset = 0x4000e190 );
|
||||||
|
PROVIDE ( multofup = 0x400031c0 );
|
||||||
|
PROVIDE ( pbkdf2_sha1 = 0x4000b840 );
|
||||||
|
PROVIDE ( phy_get_romfuncs = 0x40006b08 );
|
||||||
|
PROVIDE ( rand = 0x40000600 );
|
||||||
|
PROVIDE ( rc4_skip = 0x4000dd68 );
|
||||||
|
PROVIDE ( recv_packet = 0x40003d08 );
|
||||||
|
PROVIDE ( remove_head_space = 0x40000a04 );
|
||||||
|
PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 );
|
||||||
|
PROVIDE ( rijndaelKeySetupEnc = 0x40009300 );
|
||||||
|
PROVIDE ( rom_abs_temp = 0x400060c0 );
|
||||||
|
PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 );
|
||||||
|
PROVIDE ( rom_cal_tos_v50 = 0x40007a28 );
|
||||||
|
PROVIDE ( rom_chip_50_set_channel = 0x40006f84 );
|
||||||
|
PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 );
|
||||||
|
PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec );
|
||||||
|
PROVIDE ( rom_chip_v5_rx_init = 0x4000711c );
|
||||||
|
PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c );
|
||||||
|
PROVIDE ( rom_chip_v5_tx_init = 0x4000718c );
|
||||||
|
PROVIDE ( rom_dc_iq_est = 0x4000615c );
|
||||||
|
PROVIDE ( rom_en_pwdet = 0x400061b8 );
|
||||||
|
PROVIDE ( rom_get_bb_atten = 0x40006238 );
|
||||||
|
PROVIDE ( rom_get_corr_power = 0x40006260 );
|
||||||
|
PROVIDE ( rom_get_fm_sar_dout = 0x400062dc );
|
||||||
|
PROVIDE ( rom_get_noisefloor = 0x40006394 );
|
||||||
|
PROVIDE ( rom_get_power_db = 0x400063b0 );
|
||||||
|
PROVIDE ( rom_i2c_readReg = 0x40007268 );
|
||||||
|
PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c );
|
||||||
|
PROVIDE ( rom_i2c_writeReg = 0x400072d8 );
|
||||||
|
PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c );
|
||||||
|
PROVIDE ( rom_iq_est_disable = 0x40006400 );
|
||||||
|
PROVIDE ( rom_iq_est_enable = 0x40006430 );
|
||||||
|
PROVIDE ( rom_linear_to_db = 0x40006484 );
|
||||||
|
PROVIDE ( rom_mhz2ieee = 0x400065a4 );
|
||||||
|
PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 );
|
||||||
|
PROVIDE ( rom_pbus_debugmode = 0x4000737c );
|
||||||
|
PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 );
|
||||||
|
PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 );
|
||||||
|
PROVIDE ( rom_pbus_force_test = 0x4000747c );
|
||||||
|
PROVIDE ( rom_pbus_rd = 0x400074d8 );
|
||||||
|
PROVIDE ( rom_pbus_set_rxgain = 0x4000754c );
|
||||||
|
PROVIDE ( rom_pbus_set_txgain = 0x40007610 );
|
||||||
|
PROVIDE ( rom_pbus_workmode = 0x40007648 );
|
||||||
|
PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 );
|
||||||
|
PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc );
|
||||||
|
PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc );
|
||||||
|
PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 );
|
||||||
|
PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 );
|
||||||
|
PROVIDE ( rom_phy_reset_req = 0x40007804 );
|
||||||
|
PROVIDE ( rom_restart_cal = 0x4000781c );
|
||||||
|
PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 );
|
||||||
|
PROVIDE ( rom_rfcal_rxiq = 0x4000804c );
|
||||||
|
PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 );
|
||||||
|
PROVIDE ( rom_rfcal_txcap = 0x40008388 );
|
||||||
|
PROVIDE ( rom_rfcal_txiq = 0x40008610 );
|
||||||
|
PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 );
|
||||||
|
PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 );
|
||||||
|
PROVIDE ( rom_rfpll_reset = 0x40007868 );
|
||||||
|
PROVIDE ( rom_rfpll_set_freq = 0x40007968 );
|
||||||
|
PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c );
|
||||||
|
PROVIDE ( rom_rxiq_get_mis = 0x40006628 );
|
||||||
|
PROVIDE ( rom_sar_init = 0x40006738 );
|
||||||
|
PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c );
|
||||||
|
PROVIDE ( rom_set_channel_freq = 0x40006c50 );
|
||||||
|
PROVIDE ( rom_set_loopback_gain = 0x400067c8 );
|
||||||
|
PROVIDE ( rom_set_noise_floor = 0x40006830 );
|
||||||
|
PROVIDE ( rom_set_rxclk_en = 0x40006550 );
|
||||||
|
PROVIDE ( rom_set_txbb_atten = 0x40008c6c );
|
||||||
|
PROVIDE ( rom_set_txclk_en = 0x4000650c );
|
||||||
|
PROVIDE ( rom_set_txiq_cal = 0x40008d34 );
|
||||||
|
PROVIDE ( rom_start_noisefloor = 0x40006874 );
|
||||||
|
PROVIDE ( rom_start_tx_tone = 0x400068b4 );
|
||||||
|
PROVIDE ( rom_stop_tx_tone = 0x4000698c );
|
||||||
|
PROVIDE ( rom_tx_mac_disable = 0x40006a98 );
|
||||||
|
PROVIDE ( rom_tx_mac_enable = 0x40006ad4 );
|
||||||
|
PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c );
|
||||||
|
PROVIDE ( rom_write_rfpll_sdm = 0x400078dc );
|
||||||
|
PROVIDE ( roundup2 = 0x400031b4 );
|
||||||
|
PROVIDE ( rtc_enter_sleep = 0x40002870 );
|
||||||
|
PROVIDE ( rtc_get_reset_reason = 0x400025e0 );
|
||||||
|
PROVIDE ( rtc_intr_handler = 0x400029ec );
|
||||||
|
PROVIDE ( rtc_set_sleep_mode = 0x40002668 );
|
||||||
|
PROVIDE ( save_rxbcn_mactime = 0x400027a4 );
|
||||||
|
PROVIDE ( save_tsf_us = 0x400027ac );
|
||||||
|
PROVIDE ( send_packet = 0x40003c80 );
|
||||||
|
PROVIDE ( sha1_prf = 0x4000ba48 );
|
||||||
|
PROVIDE ( sha1_vector = 0x4000a2ec );
|
||||||
|
PROVIDE ( sip_alloc_to_host_evt = 0x40005180 );
|
||||||
|
PROVIDE ( sip_get_ptr = 0x400058a8 );
|
||||||
|
PROVIDE ( sip_get_state = 0x40005668 );
|
||||||
|
PROVIDE ( sip_init_attach = 0x4000567c );
|
||||||
|
PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c );
|
||||||
|
PROVIDE ( sip_install_rx_data_cb = 0x4000545c );
|
||||||
|
PROVIDE ( sip_post = 0x400050fc );
|
||||||
|
PROVIDE ( sip_post_init = 0x400056c4 );
|
||||||
|
PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c );
|
||||||
|
PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 );
|
||||||
|
PROVIDE ( sip_send = 0x40005808 );
|
||||||
|
PROVIDE ( sip_to_host_chain_append = 0x40005864 );
|
||||||
|
PROVIDE ( sip_to_host_evt_send_done = 0x40005234 );
|
||||||
|
PROVIDE ( slc_add_credits = 0x400060ac );
|
||||||
|
PROVIDE ( slc_enable = 0x40005d90 );
|
||||||
|
PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 );
|
||||||
|
PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 );
|
||||||
|
PROVIDE ( slc_init_attach = 0x40005c50 );
|
||||||
|
PROVIDE ( slc_init_credit = 0x4000608c );
|
||||||
|
PROVIDE ( slc_pause_from_host = 0x40006014 );
|
||||||
|
PROVIDE ( slc_reattach = 0x40005c1c );
|
||||||
|
PROVIDE ( slc_resume_from_host = 0x4000603c );
|
||||||
|
PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 );
|
||||||
|
PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 );
|
||||||
|
PROVIDE ( slc_send_to_host_chain = 0x40005de4 );
|
||||||
|
PROVIDE ( slc_set_host_io_max_window = 0x40006068 );
|
||||||
|
PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 );
|
||||||
|
PROVIDE ( software_reset = 0x4000264c );
|
||||||
|
PROVIDE ( spi_flash_attach = 0x40004644 );
|
||||||
|
PROVIDE ( srand = 0x400005f0 );
|
||||||
|
PROVIDE ( strcmp = 0x4000bdc8 );
|
||||||
|
PROVIDE ( strcpy = 0x4000bec8 );
|
||||||
|
PROVIDE ( strlen = 0x4000bf4c );
|
||||||
|
PROVIDE ( strncmp = 0x4000bfa8 );
|
||||||
|
PROVIDE ( strncpy = 0x4000c0a0 );
|
||||||
|
PROVIDE ( strstr = 0x4000e1e0 );
|
||||||
|
PROVIDE ( timer_insert = 0x40002c64 );
|
||||||
|
PROVIDE ( uartAttach = 0x4000383c );
|
||||||
|
PROVIDE ( uart_baudrate_detect = 0x40003924 );
|
||||||
|
PROVIDE ( uart_buff_switch = 0x400038a4 );
|
||||||
|
PROVIDE ( uart_div_modify = 0x400039d8 );
|
||||||
|
PROVIDE ( uart_rx_intr_handler = 0x40003bbc );
|
||||||
|
PROVIDE ( uart_rx_one_char = 0x40003b8c );
|
||||||
|
PROVIDE ( uart_rx_one_char_block = 0x40003b64 );
|
||||||
|
PROVIDE ( uart_rx_readbuff = 0x40003ec8 );
|
||||||
|
PROVIDE ( uart_tx_one_char = 0x40003b30 );
|
||||||
|
PROVIDE ( wepkey_128 = 0x4000bc40 );
|
||||||
|
PROVIDE ( wepkey_64 = 0x4000bb3c );
|
||||||
|
PROVIDE ( xthal_bcopy = 0x40000688 );
|
||||||
|
PROVIDE ( xthal_copy123 = 0x4000074c );
|
||||||
|
PROVIDE ( xthal_get_ccompare = 0x4000dd4c );
|
||||||
|
PROVIDE ( xthal_get_ccount = 0x4000dd38 );
|
||||||
|
PROVIDE ( xthal_get_interrupt = 0x4000dd58 );
|
||||||
|
PROVIDE ( xthal_get_intread = 0x4000dd58 );
|
||||||
|
PROVIDE ( xthal_memcpy = 0x400006c4 );
|
||||||
|
PROVIDE ( xthal_set_ccompare = 0x4000dd40 );
|
||||||
|
PROVIDE ( xthal_set_intclear = 0x4000dd60 );
|
||||||
|
PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 );
|
||||||
|
PROVIDE ( xthal_window_spill = 0x4000e324 );
|
||||||
|
PROVIDE ( xthal_window_spill_nw = 0x4000e320 );
|
||||||
|
|
||||||
|
PROVIDE ( Te0 = 0x3fffccf0 );
|
||||||
|
PROVIDE ( UartDev = 0x3fffde10 );
|
||||||
|
PROVIDE ( flashchip = 0x3fffc714);
|
@ -35,7 +35,6 @@ extern "C" {
|
|||||||
|
|
||||||
#include "stdlib_noniso.h"
|
#include "stdlib_noniso.h"
|
||||||
#include "binary.h"
|
#include "binary.h"
|
||||||
#include "pgmspace.h"
|
|
||||||
#include "esp8266_peri.h"
|
#include "esp8266_peri.h"
|
||||||
#include "twi.h"
|
#include "twi.h"
|
||||||
|
|
||||||
@ -107,20 +106,6 @@ void timer1_attachInterrupt(void (*userFunc)(void));
|
|||||||
void timer1_detachInterrupt(void);
|
void timer1_detachInterrupt(void);
|
||||||
void timer1_write(uint32_t ticks); //maximum ticks 8388607
|
void timer1_write(uint32_t ticks); //maximum ticks 8388607
|
||||||
|
|
||||||
// timer0 is a special CPU timer that has very high resolution but with
|
|
||||||
// limited control.
|
|
||||||
// it uses CCOUNT (ESP.GetCycleCount()) as the non-resetable timer counter
|
|
||||||
// it does not support divide, type, or reload flags
|
|
||||||
// it is auto-disabled when the compare value matches CCOUNT
|
|
||||||
// it is auto-enabled when the compare value changes
|
|
||||||
#define timer0_interrupted() (ETS_INTR_PENDING() & (_BV(ETS_COMPARE0_INUM)))
|
|
||||||
#define timer0_read() ((__extension__({uint32_t count;__asm__ __volatile__("esync; rsr %0,ccompare0":"=a" (count));count;})))
|
|
||||||
#define timer0_write(count) __asm__ __volatile__("wsr %0,ccompare0; esync"::"a" (count) : "memory")
|
|
||||||
|
|
||||||
void timer0_isr_init(void);
|
|
||||||
void timer0_attachInterrupt(void(*userFunc)(void));
|
|
||||||
void timer0_detachInterrupt(void);
|
|
||||||
|
|
||||||
// undefine stdlib's abs if encountered
|
// undefine stdlib's abs if encountered
|
||||||
#ifdef abs
|
#ifdef abs
|
||||||
#undef abs
|
#undef abs
|
||||||
@ -140,13 +125,13 @@ void ets_intr_unlock();
|
|||||||
// level 15 will disable ALL interrupts,
|
// level 15 will disable ALL interrupts,
|
||||||
// level 0 will disable most software interrupts
|
// level 0 will disable most software interrupts
|
||||||
//
|
//
|
||||||
#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) : "=a" (state))
|
#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) "; esync; isync; dsync" : "=a" (state))
|
||||||
#define xt_enable_interrupts(state) __asm__ __volatile__("wsr %0,ps; esync" :: "a" (state) : "memory")
|
#define xt_enable_interrupts(state) __asm__ __volatile__("wsr %0,ps; esync" :: "a" (state) : "memory")
|
||||||
|
|
||||||
extern uint32_t interruptsState;
|
extern uint32_t interruptsState;
|
||||||
|
|
||||||
#define interrupts() xt_enable_interrupts(interruptsState)
|
#define interrupts() xt_enable_interrupts(interruptsState)
|
||||||
#define noInterrupts() __asm__ __volatile__("rsil %0,15" : "=a" (interruptsState))
|
#define noInterrupts() __asm__ __volatile__("rsil %0,15; esync; isync; dsync" : "=a" (interruptsState))
|
||||||
|
|
||||||
#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
|
#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
|
||||||
#define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() )
|
#define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() )
|
||||||
@ -219,6 +204,8 @@ void loop(void);
|
|||||||
|
|
||||||
#ifdef __cplusplus
|
#ifdef __cplusplus
|
||||||
|
|
||||||
|
#include "pgmspace.h"
|
||||||
|
|
||||||
#include "WCharacter.h"
|
#include "WCharacter.h"
|
||||||
#include "WString.h"
|
#include "WString.h"
|
||||||
|
|
||||||
|
@ -22,6 +22,8 @@
|
|||||||
|
|
||||||
extern "C" {
|
extern "C" {
|
||||||
#include "user_interface.h"
|
#include "user_interface.h"
|
||||||
|
|
||||||
|
extern struct rst_info resetInfo;
|
||||||
}
|
}
|
||||||
|
|
||||||
//extern "C" void ets_wdt_init(uint32_t val);
|
//extern "C" void ets_wdt_init(uint32_t val);
|
||||||
@ -279,3 +281,38 @@ uint32_t EspClass::getFlashChipSizeByChipId(void) {
|
|||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
String EspClass::getResetInfo(void) {
|
||||||
|
if(resetInfo.reason != 0) {
|
||||||
|
char buff[150];
|
||||||
|
sprintf(&buff[0], "Fatal exception:%d flag:%d epc1:0x%08x epc2:0x%08x epc3:0x%08x excvaddr:0x%08x depc:0x%08x", resetInfo.exccause, resetInfo.reason, resetInfo.epc1, resetInfo.epc2, resetInfo.epc3, resetInfo.excvaddr, resetInfo.depc);
|
||||||
|
return String(buff);
|
||||||
|
}
|
||||||
|
return String("flag: 0");
|
||||||
|
}
|
||||||
|
|
||||||
|
struct rst_info * EspClass::getResetInfoPtr(void) {
|
||||||
|
return &resetInfo;
|
||||||
|
}
|
||||||
|
|
||||||
|
bool EspClass::eraseESPconfig(void) {
|
||||||
|
bool ret = true;
|
||||||
|
size_t cfgAddr = (ESP.getFlashChipSize() - 0x4000);
|
||||||
|
size_t cfgSize = (8*1024);
|
||||||
|
|
||||||
|
noInterrupts();
|
||||||
|
while(cfgSize) {
|
||||||
|
|
||||||
|
if(spi_flash_erase_sector((cfgAddr / SPI_FLASH_SEC_SIZE)) != SPI_FLASH_RESULT_OK) {
|
||||||
|
ret = false;
|
||||||
|
}
|
||||||
|
|
||||||
|
cfgSize -= SPI_FLASH_SEC_SIZE;
|
||||||
|
cfgAddr += SPI_FLASH_SEC_SIZE;
|
||||||
|
}
|
||||||
|
interrupts();
|
||||||
|
|
||||||
|
return ret;
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
|
@ -98,13 +98,18 @@ class EspClass {
|
|||||||
FlashMode_t getFlashChipMode(void);
|
FlashMode_t getFlashChipMode(void);
|
||||||
uint32_t getFlashChipSizeByChipId(void);
|
uint32_t getFlashChipSizeByChipId(void);
|
||||||
|
|
||||||
|
String getResetInfo(void);
|
||||||
|
struct rst_info * getResetInfoPtr(void);
|
||||||
|
|
||||||
|
bool eraseESPconfig(void);
|
||||||
|
|
||||||
inline uint32_t getCycleCount(void);
|
inline uint32_t getCycleCount(void);
|
||||||
};
|
};
|
||||||
|
|
||||||
uint32_t EspClass::getCycleCount(void)
|
uint32_t EspClass::getCycleCount(void)
|
||||||
{
|
{
|
||||||
uint32_t ccount;
|
uint32_t ccount;
|
||||||
__asm__ __volatile__("esync; rsr %0,ccount":"=a" (ccount));
|
__asm__ __volatile__("rsr %0,ccount":"=a" (ccount));
|
||||||
return ccount;
|
return ccount;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
@ -63,7 +63,7 @@ class Print {
|
|||||||
return write((const uint8_t *) buffer, size);
|
return write((const uint8_t *) buffer, size);
|
||||||
}
|
}
|
||||||
|
|
||||||
size_t printf(const char * format, ...);
|
size_t printf(const char * format, ...) __attribute__ ((format (printf, 2, 3)));
|
||||||
size_t print(const __FlashStringHelper *);
|
size_t print(const __FlashStringHelper *);
|
||||||
size_t print(const String &);
|
size_t print(const String &);
|
||||||
size_t print(const char[]);
|
size_t print(const char[]);
|
||||||
|
@ -34,6 +34,8 @@ extern "C" {
|
|||||||
#define LOOP_TASK_PRIORITY 0
|
#define LOOP_TASK_PRIORITY 0
|
||||||
#define LOOP_QUEUE_SIZE 1
|
#define LOOP_QUEUE_SIZE 1
|
||||||
|
|
||||||
|
struct rst_info resetInfo;
|
||||||
|
|
||||||
int atexit(void (*func)()) {
|
int atexit(void (*func)()) {
|
||||||
return 0;
|
return 0;
|
||||||
}
|
}
|
||||||
@ -124,6 +126,15 @@ void user_rf_pre_init() {
|
|||||||
|
|
||||||
extern "C" {
|
extern "C" {
|
||||||
void user_init(void) {
|
void user_init(void) {
|
||||||
|
uart_div_modify(0, UART_CLK_FREQ / (74480));
|
||||||
|
|
||||||
|
system_rtc_mem_read(0, &resetInfo, sizeof(struct rst_info));
|
||||||
|
if(resetInfo.reason == WDT_RST_FLAG || resetInfo.reason == EXCEPTION_RST_FLAG) {
|
||||||
|
os_printf("Last Reset:\n - flag=%d\n - Fatal exception (%d):\n - epc1=0x%08x,epc2=0x%08x,epc3=0x%08x,excvaddr=0x%08x,depc=0x%08x\n", resetInfo.reason, resetInfo.exccause, resetInfo.epc1, resetInfo.epc2, resetInfo.epc3, resetInfo.excvaddr, resetInfo.depc);
|
||||||
|
}
|
||||||
|
struct rst_info info = { 0 };
|
||||||
|
system_rtc_mem_write(0, &info, sizeof(struct rst_info));
|
||||||
|
|
||||||
uart_div_modify(0, UART_CLK_FREQ / (115200));
|
uart_div_modify(0, UART_CLK_FREQ / (115200));
|
||||||
|
|
||||||
init();
|
init();
|
||||||
|
@ -21,10 +21,9 @@
|
|||||||
#include "wiring_private.h"
|
#include "wiring_private.h"
|
||||||
#include "pins_arduino.h"
|
#include "pins_arduino.h"
|
||||||
#include "c_types.h"
|
#include "c_types.h"
|
||||||
|
#include "ets_sys.h"
|
||||||
|
|
||||||
typedef void(*_timercallback)(void);
|
void (*timer1_user_cb)(void);
|
||||||
|
|
||||||
static volatile _timercallback timer1_user_cb = NULL;
|
|
||||||
|
|
||||||
void timer1_isr_handler(void *para){
|
void timer1_isr_handler(void *para){
|
||||||
if((T1C & ((1 << TCAR) | (1 << TCIT))) == 0) TEIE &= ~TEIE1;//edge int disable
|
if((T1C & ((1 << TCAR) | (1 << TCIT))) == 0) TEIE &= ~TEIE1;//edge int disable
|
||||||
@ -61,25 +60,3 @@ void timer1_disable(){
|
|||||||
T1C = 0;
|
T1C = 0;
|
||||||
T1I = 0;
|
T1I = 0;
|
||||||
}
|
}
|
||||||
|
|
||||||
static volatile _timercallback timer0_user_cb = NULL;
|
|
||||||
|
|
||||||
void timer0_isr_handler(void *para){
|
|
||||||
if (timer0_user_cb) {
|
|
||||||
timer0_user_cb();
|
|
||||||
}
|
|
||||||
}
|
|
||||||
|
|
||||||
void timer0_isr_init(){
|
|
||||||
ETS_CCOMPARE0_INTR_ATTACH(timer0_isr_handler, NULL);
|
|
||||||
}
|
|
||||||
|
|
||||||
void timer0_attachInterrupt(void(*userFunc)(void)) {
|
|
||||||
timer0_user_cb = userFunc;
|
|
||||||
ETS_CCOMPARE0_ENABLE();
|
|
||||||
}
|
|
||||||
|
|
||||||
void timer0_detachInterrupt() {
|
|
||||||
timer0_user_cb = NULL;
|
|
||||||
ETS_CCOMPARE0_DISABLE();
|
|
||||||
}
|
|
@ -22,10 +22,10 @@
|
|||||||
#include "debug.h"
|
#include "debug.h"
|
||||||
|
|
||||||
void ICACHE_RAM_ATTR hexdump(uint8_t *mem, uint32_t len, uint8_t cols) {
|
void ICACHE_RAM_ATTR hexdump(uint8_t *mem, uint32_t len, uint8_t cols) {
|
||||||
os_printf("\n[HEXDUMP] Address: 0x%08X len: 0x%X (%d)", mem, len, len);
|
os_printf("\n[HEXDUMP] Address: 0x%08X len: 0x%X (%d)", (size_t)mem, len, len);
|
||||||
for(uint32_t i = 0; i < len; i++) {
|
for(uint32_t i = 0; i < len; i++) {
|
||||||
if(i % cols == 0) {
|
if(i % cols == 0) {
|
||||||
os_printf("\n[0x%08X] 0x%08X: ", mem, i);
|
os_printf("\n[0x%08X] 0x%08X: ", (size_t)mem, i);
|
||||||
yield();
|
yield();
|
||||||
}
|
}
|
||||||
os_printf("%02X ", *mem);
|
os_printf("%02X ", *mem);
|
||||||
|
@ -169,60 +169,65 @@ char* ICACHE_FLASH_ATTR strncat(char * dest, const char * src, size_t n) {
|
|||||||
return dest;
|
return dest;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
char* ICACHE_FLASH_ATTR strtok_r(char* s, const char* delim, char** last) {
|
||||||
|
const char* spanp;
|
||||||
|
char* tok;
|
||||||
|
char c;
|
||||||
|
char sc;
|
||||||
|
|
||||||
char* ICACHE_FLASH_ATTR strtok_r(char * str, const char * delimiters, char ** temp) {
|
if (s == NULL && (s = *last) == NULL) {
|
||||||
static char * ret = NULL;
|
return (NULL);
|
||||||
char * start = NULL;
|
|
||||||
char * end = NULL;
|
|
||||||
uint32_t size = 0;
|
|
||||||
|
|
||||||
if(str == NULL) {
|
|
||||||
if(temp == NULL) {
|
|
||||||
return NULL;
|
|
||||||
}
|
|
||||||
start = *temp;
|
|
||||||
} else {
|
|
||||||
start = str;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
if(start == NULL) {
|
|
||||||
return NULL;
|
|
||||||
}
|
|
||||||
|
|
||||||
if(delimiters == NULL) {
|
// Skip (span) leading delimiters
|
||||||
return NULL;
|
//
|
||||||
}
|
cont:
|
||||||
|
c = *s++;
|
||||||
end = start;
|
for (spanp = delim; (sc = *spanp++) != 0;) {
|
||||||
|
if (c == sc) {
|
||||||
while(1) {
|
goto cont;
|
||||||
for(uint16_t i = 0; i < strlen(delimiters); i++) {
|
|
||||||
if(*end == *(delimiters + i)) {
|
|
||||||
break;
|
|
||||||
}
|
|
||||||
}
|
|
||||||
end++;
|
|
||||||
if(*end == 0x00) {
|
|
||||||
break;
|
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
*temp = end;
|
// check for no delimiters left
|
||||||
|
//
|
||||||
if(ret != NULL) {
|
if (c == '\0') {
|
||||||
free(ret);
|
*last = NULL;
|
||||||
|
return (NULL);
|
||||||
}
|
}
|
||||||
|
|
||||||
size = (end - start);
|
tok = s - 1;
|
||||||
ret = (char *) malloc(size);
|
|
||||||
strncpy(ret, start, size);
|
|
||||||
return ret;
|
// Scan token
|
||||||
|
// Note that delim must have one NUL; we stop if we see that, too.
|
||||||
|
//
|
||||||
|
for (;;) {
|
||||||
|
c = *s++;
|
||||||
|
spanp = (char *)delim;
|
||||||
|
do {
|
||||||
|
if ((sc = *spanp++) == c) {
|
||||||
|
if (c == 0) {
|
||||||
|
s = NULL;
|
||||||
|
}
|
||||||
|
else {
|
||||||
|
s[-1] = '\0';
|
||||||
|
}
|
||||||
|
*last = s;
|
||||||
|
return (tok);
|
||||||
|
}
|
||||||
|
|
||||||
|
} while (sc != 0);
|
||||||
|
}
|
||||||
|
|
||||||
|
// NOTREACHED EVER
|
||||||
}
|
}
|
||||||
|
|
||||||
char* ICACHE_FLASH_ATTR strtok(char * str, const char * delimiters) {
|
char* ICACHE_FLASH_ATTR strtok(char* s, const char* delim) {
|
||||||
static char * ret = NULL;
|
static char* last;
|
||||||
ret = strtok_r(str, delimiters, &ret);
|
|
||||||
return ret;
|
return (strtok_r(s, delim, &last));
|
||||||
}
|
}
|
||||||
|
|
||||||
int ICACHE_FLASH_ATTR strcasecmp(const char * str1, const char * str2) {
|
int ICACHE_FLASH_ATTR strcasecmp(const char * str1, const char * str2) {
|
||||||
|
@ -1,32 +1,32 @@
|
|||||||
/*
|
/*
|
||||||
pgmspace.cpp - string functions that support PROGMEM
|
pgmspace.cpp - string functions that support PROGMEM
|
||||||
Copyright (c) 2015 Michael C. Miller. All right reserved.
|
Copyright (c) 2015 Michael C. Miller. All right reserved.
|
||||||
|
|
||||||
This library is free software; you can redistribute it and/or
|
This library is free software; you can redistribute it and/or
|
||||||
modify it under the terms of the GNU Lesser General Public
|
modify it under the terms of the GNU Lesser General Public
|
||||||
License as published by the Free Software Foundation; either
|
License as published by the Free Software Foundation; either
|
||||||
version 2.1 of the License, or (at your option) any later version.
|
version 2.1 of the License, or (at your option) any later version.
|
||||||
|
|
||||||
This library is distributed in the hope that it will be useful,
|
This library is distributed in the hope that it will be useful,
|
||||||
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
Lesser General Public License for more details.
|
Lesser General Public License for more details.
|
||||||
|
|
||||||
You should have received a copy of the GNU Lesser General Public
|
You should have received a copy of the GNU Lesser General Public
|
||||||
License along with this library; if not, write to the Free Software
|
License along with this library; if not, write to the Free Software
|
||||||
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
|
||||||
*/
|
*/
|
||||||
|
|
||||||
#include <ctype.h>
|
#include <ctype.h>
|
||||||
#include "pgmspace.h"
|
#include "pgmspace.h"
|
||||||
|
|
||||||
size_t ICACHE_FLASH_ATTR strnlen_P(const char* s, size_t size) {
|
size_t strnlen_P(const char* s, size_t size) {
|
||||||
const char* cp;
|
const char* cp;
|
||||||
for (cp = s; size != 0 && pgm_read_byte(cp) != '\0'; cp++, size--);
|
for (cp = s; size != 0 && pgm_read_byte(cp) != '\0'; cp++, size--);
|
||||||
return (size_t)(cp - s);
|
return (size_t) (cp - s);
|
||||||
}
|
}
|
||||||
|
|
||||||
void* ICACHE_FLASH_ATTR memcpy_P(void* dest, const void* src, size_t count) {
|
void* memcpy_P(void* dest, const void* src, size_t count) {
|
||||||
const uint8_t* read = reinterpret_cast<const uint8_t*>(src);
|
const uint8_t* read = reinterpret_cast<const uint8_t*>(src);
|
||||||
uint8_t* write = reinterpret_cast<uint8_t*>(dest);
|
uint8_t* write = reinterpret_cast<uint8_t*>(dest);
|
||||||
|
|
||||||
@ -39,7 +39,7 @@ void* ICACHE_FLASH_ATTR memcpy_P(void* dest, const void* src, size_t count) {
|
|||||||
return dest;
|
return dest;
|
||||||
}
|
}
|
||||||
|
|
||||||
char* ICACHE_FLASH_ATTR strncpy_P(char* dest, const char* src, size_t size) {
|
char* strncpy_P(char* dest, const char* src, size_t size) {
|
||||||
const char* read = src;
|
const char* read = src;
|
||||||
char* write = dest;
|
char* write = dest;
|
||||||
char ch = '.';
|
char ch = '.';
|
||||||
@ -53,7 +53,7 @@ char* ICACHE_FLASH_ATTR strncpy_P(char* dest, const char* src, size_t size) {
|
|||||||
return dest;
|
return dest;
|
||||||
}
|
}
|
||||||
|
|
||||||
char* ICACHE_FLASH_ATTR strncat_P(char* dest, const char* src, size_t size) {
|
char* strncat_P(char* dest, const char* src, size_t size) {
|
||||||
char* write = dest;
|
char* write = dest;
|
||||||
|
|
||||||
while (*write != '\0')
|
while (*write != '\0')
|
||||||
@ -80,7 +80,7 @@ char* ICACHE_FLASH_ATTR strncat_P(char* dest, const char* src, size_t size) {
|
|||||||
return dest;
|
return dest;
|
||||||
}
|
}
|
||||||
|
|
||||||
int ICACHE_FLASH_ATTR strncmp_P(const char* str1, const char* str2P, size_t size) {
|
int strncmp_P(const char* str1, const char* str2P, size_t size) {
|
||||||
int result = 0;
|
int result = 0;
|
||||||
|
|
||||||
while (size > 0)
|
while (size > 0)
|
||||||
@ -99,7 +99,7 @@ int ICACHE_FLASH_ATTR strncmp_P(const char* str1, const char* str2P, size_t size
|
|||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
int ICACHE_FLASH_ATTR strncasecmp_P(const char* str1, const char* str2P, size_t size) {
|
int strncasecmp_P(const char* str1, const char* str2P, size_t size) {
|
||||||
int result = 0;
|
int result = 0;
|
||||||
|
|
||||||
while (size > 0)
|
while (size > 0)
|
||||||
@ -118,7 +118,7 @@ int ICACHE_FLASH_ATTR strncasecmp_P(const char* str1, const char* str2P, size_t
|
|||||||
return result;
|
return result;
|
||||||
}
|
}
|
||||||
|
|
||||||
int ICACHE_FLASH_ATTR printf_P(const char* formatP, ...) {
|
int printf_P(const char* formatP, ...) {
|
||||||
int ret;
|
int ret;
|
||||||
va_list arglist;
|
va_list arglist;
|
||||||
va_start(arglist, formatP);
|
va_start(arglist, formatP);
|
||||||
@ -129,13 +129,13 @@ int ICACHE_FLASH_ATTR printf_P(const char* formatP, ...) {
|
|||||||
|
|
||||||
ret = os_printf(format, arglist);
|
ret = os_printf(format, arglist);
|
||||||
|
|
||||||
delete [] format;
|
delete[] format;
|
||||||
|
|
||||||
va_end(arglist);
|
va_end(arglist);
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int ICACHE_FLASH_ATTR snprintf_P(char* str, size_t strSize, const char* formatP, ...) {
|
int snprintf_P(char* str, size_t strSize, const char* formatP, ...) {
|
||||||
int ret;
|
int ret;
|
||||||
va_list arglist;
|
va_list arglist;
|
||||||
va_start(arglist, formatP);
|
va_start(arglist, formatP);
|
||||||
@ -146,7 +146,7 @@ int ICACHE_FLASH_ATTR snprintf_P(char* str, size_t strSize, const char* formatP,
|
|||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
||||||
|
|
||||||
int ICACHE_FLASH_ATTR vsnprintf_P(char* str, size_t strSize, const char* formatP, va_list ap) {
|
int vsnprintf_P(char* str, size_t strSize, const char* formatP, va_list ap) {
|
||||||
int ret;
|
int ret;
|
||||||
|
|
||||||
size_t fmtLen = strlen_P(formatP);
|
size_t fmtLen = strlen_P(formatP);
|
||||||
@ -155,7 +155,7 @@ int ICACHE_FLASH_ATTR vsnprintf_P(char* str, size_t strSize, const char* formatP
|
|||||||
|
|
||||||
ret = ets_vsnprintf(str, strSize, format, ap);
|
ret = ets_vsnprintf(str, strSize, format, ap);
|
||||||
|
|
||||||
delete [] format;
|
delete[] format;
|
||||||
|
|
||||||
return ret;
|
return ret;
|
||||||
}
|
}
|
@ -32,26 +32,26 @@ typedef uint32_t prog_uint32_t;
|
|||||||
|
|
||||||
#define SIZE_IRRELEVANT 0x7fffffff
|
#define SIZE_IRRELEVANT 0x7fffffff
|
||||||
|
|
||||||
extern void* memcpy_P(void* dest, const void* src, size_t count);
|
void* memcpy_P(void* dest, const void* src, size_t count);
|
||||||
|
|
||||||
extern char* strncpy_P(char* dest, const char* src, size_t size);
|
char* strncpy_P(char* dest, const char* src, size_t size);
|
||||||
#define strcpy_P(dest, src) strncpy_P((dest), (src), SIZE_IRRELEVANT)
|
#define strcpy_P(dest, src) strncpy_P((dest), (src), SIZE_IRRELEVANT)
|
||||||
|
|
||||||
extern char* strncat_P(char* dest, const char* src, size_t size);
|
char* strncat_P(char* dest, const char* src, size_t size);
|
||||||
#define strcat_P(dest, src) strncat_P((dest), (src), SIZE_IRRELEVANT)
|
#define strcat_P(dest, src) strncat_P((dest), (src), SIZE_IRRELEVANT)
|
||||||
|
|
||||||
extern int strncmp_P(const char* str1, const char* str2P, size_t size);
|
int strncmp_P(const char* str1, const char* str2P, size_t size);
|
||||||
#define strcmp_P(str1, str2P) strncmp_P((str1), (str2P), SIZE_IRRELEVANT)
|
#define strcmp_P(str1, str2P) strncmp_P((str1), (str2P), SIZE_IRRELEVANT)
|
||||||
|
|
||||||
extern int strncasecmp_P(const char* str1, const char* str2P, size_t size);
|
int strncasecmp_P(const char* str1, const char* str2P, size_t size);
|
||||||
#define strcasecmp_P(str1, str2P) strncasecmp_P((str1), (str2P), SIZE_IRRELEVANT)
|
#define strcasecmp_P(str1, str2P) strncasecmp_P((str1), (str2P), SIZE_IRRELEVANT)
|
||||||
|
|
||||||
extern size_t strnlen_P(const char *s, size_t size);
|
size_t strnlen_P(const char *s, size_t size);
|
||||||
#define strlen_P(strP) strnlen_P((strP), SIZE_IRRELEVANT)
|
#define strlen_P(strP) strnlen_P((strP), SIZE_IRRELEVANT)
|
||||||
|
|
||||||
extern int printf_P(const char *formatP, ...);
|
int printf_P(const char *formatP, ...) __attribute__ ((format (printf, 1, 2)));
|
||||||
extern int snprintf_P(char *str, size_t strSize, const char *formatP, ...);
|
int snprintf_P(char *str, size_t strSize, const char *formatP, ...) __attribute__ ((format (printf, 3, 4)));
|
||||||
extern int vsnprintf_P(char *str, size_t strSize, const char *formatP, va_list ap);
|
int vsnprintf_P(char *str, size_t strSize, const char *formatP, va_list ap) __attribute__ ((format (printf, 3, 0)));
|
||||||
|
|
||||||
// flash memory must be read using 32 bit aligned addresses else a processor
|
// flash memory must be read using 32 bit aligned addresses else a processor
|
||||||
// exception will be triggered
|
// exception will be triggered
|
||||||
|
@ -27,7 +27,11 @@ char pass[] = "********"; // your network password
|
|||||||
|
|
||||||
unsigned int localPort = 2390; // local port to listen for UDP packets
|
unsigned int localPort = 2390; // local port to listen for UDP packets
|
||||||
|
|
||||||
IPAddress timeServer(129, 6, 15, 28); // time.nist.gov NTP server
|
/* Don't hardwire the IP address or we won't get the benefits of the pool.
|
||||||
|
* Lookup the IP address for the host name instead */
|
||||||
|
//IPAddress timeServer(129, 6, 15, 28); // time.nist.gov NTP server
|
||||||
|
IPAddress timeServerIP; // time.nist.gov NTP server address
|
||||||
|
const char* ntpServerName = "time.nist.gov";
|
||||||
|
|
||||||
const int NTP_PACKET_SIZE = 48; // NTP time stamp is in the first 48 bytes of the message
|
const int NTP_PACKET_SIZE = 48; // NTP time stamp is in the first 48 bytes of the message
|
||||||
|
|
||||||
@ -65,6 +69,9 @@ void setup()
|
|||||||
|
|
||||||
void loop()
|
void loop()
|
||||||
{
|
{
|
||||||
|
//get a random server from the pool
|
||||||
|
WiFi.hostByName(ntpServerName, timeServerIP);
|
||||||
|
|
||||||
sendNTPpacket(timeServer); // send an NTP packet to a time server
|
sendNTPpacket(timeServer); // send an NTP packet to a time server
|
||||||
// wait to see if a reply is available
|
// wait to see if a reply is available
|
||||||
delay(1000);
|
delay(1000);
|
||||||
|
@ -203,12 +203,32 @@ uint8_t* ESP8266WiFiClass::macAddress(uint8_t* mac)
|
|||||||
return mac;
|
return mac;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
String ESP8266WiFiClass::macAddress(void)
|
||||||
|
{
|
||||||
|
uint8_t mac[6];
|
||||||
|
char macStr[18] = {0};
|
||||||
|
wifi_get_macaddr(STATION_IF, mac);
|
||||||
|
|
||||||
|
sprintf(macStr, "%02X:%02X:%02X:%02X:%02X:%02X", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
|
||||||
|
return String(macStr);
|
||||||
|
}
|
||||||
|
|
||||||
uint8_t* ESP8266WiFiClass::softAPmacAddress(uint8_t* mac)
|
uint8_t* ESP8266WiFiClass::softAPmacAddress(uint8_t* mac)
|
||||||
{
|
{
|
||||||
wifi_get_macaddr(SOFTAP_IF, mac);
|
wifi_get_macaddr(SOFTAP_IF, mac);
|
||||||
return mac;
|
return mac;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
String ESP8266WiFiClass::softAPmacAddress(void)
|
||||||
|
{
|
||||||
|
uint8_t mac[6];
|
||||||
|
char macStr[18] = {0};
|
||||||
|
wifi_get_macaddr(SOFTAP_IF, mac);
|
||||||
|
|
||||||
|
sprintf(macStr, "%02X:%02X:%02X:%02X:%02X:%02X", mac[0], mac[1], mac[2], mac[3], mac[4], mac[5]);
|
||||||
|
return String(macStr);
|
||||||
|
}
|
||||||
|
|
||||||
IPAddress ESP8266WiFiClass::localIP()
|
IPAddress ESP8266WiFiClass::localIP()
|
||||||
{
|
{
|
||||||
struct ip_info ip;
|
struct ip_info ip;
|
||||||
@ -251,10 +271,25 @@ uint8_t* ESP8266WiFiClass::BSSID(void)
|
|||||||
return reinterpret_cast<uint8_t*>(conf.bssid);
|
return reinterpret_cast<uint8_t*>(conf.bssid);
|
||||||
}
|
}
|
||||||
|
|
||||||
|
String ESP8266WiFiClass::BSSIDstr(void)
|
||||||
|
{
|
||||||
|
static struct station_config conf;
|
||||||
|
char mac[18] = {0};
|
||||||
|
wifi_station_get_config(&conf);
|
||||||
|
sprintf(mac,"%02X:%02X:%02X:%02X:%02X:%02X", conf.bssid[0], conf.bssid[1], conf.bssid[2], conf.bssid[3], conf.bssid[4], conf.bssid[5]);
|
||||||
|
return String(mac);
|
||||||
|
}
|
||||||
|
|
||||||
|
|
||||||
int32_t ESP8266WiFiClass::channel(void) {
|
int32_t ESP8266WiFiClass::channel(void) {
|
||||||
return wifi_get_channel();
|
return wifi_get_channel();
|
||||||
}
|
}
|
||||||
|
|
||||||
|
|
||||||
|
int32_t ESP8266WiFiClass::RSSI(void) {
|
||||||
|
return wifi_station_get_rssi();
|
||||||
|
}
|
||||||
|
|
||||||
extern "C"
|
extern "C"
|
||||||
{
|
{
|
||||||
typedef STAILQ_HEAD(, bss_info) bss_info_head_t;
|
typedef STAILQ_HEAD(, bss_info) bss_info_head_t;
|
||||||
@ -353,6 +388,17 @@ uint8_t * ESP8266WiFiClass::BSSID(uint8_t i)
|
|||||||
return it->bssid;
|
return it->bssid;
|
||||||
}
|
}
|
||||||
|
|
||||||
|
String ESP8266WiFiClass::BSSIDstr(uint8_t i)
|
||||||
|
{
|
||||||
|
char mac[18] = {0};
|
||||||
|
struct bss_info* it = reinterpret_cast<struct bss_info*>(_getScanInfoByIndex(i));
|
||||||
|
if (!it)
|
||||||
|
return String("");
|
||||||
|
|
||||||
|
sprintf(mac,"%02X:%02X:%02X:%02X:%02X:%02X", it->bssid[0], it->bssid[1], it->bssid[2], it->bssid[3], it->bssid[4], it->bssid[5]);
|
||||||
|
return String(mac);
|
||||||
|
}
|
||||||
|
|
||||||
int32_t ESP8266WiFiClass::channel(uint8_t i)
|
int32_t ESP8266WiFiClass::channel(uint8_t i)
|
||||||
{
|
{
|
||||||
struct bss_info* it = reinterpret_cast<struct bss_info*>(_getScanInfoByIndex(i));
|
struct bss_info* it = reinterpret_cast<struct bss_info*>(_getScanInfoByIndex(i));
|
||||||
|
@ -103,15 +103,19 @@ public:
|
|||||||
* Get the station interface MAC address.
|
* Get the station interface MAC address.
|
||||||
*
|
*
|
||||||
* return: pointer to uint8_t array with length WL_MAC_ADDR_LENGTH
|
* return: pointer to uint8_t array with length WL_MAC_ADDR_LENGTH
|
||||||
|
* return: String
|
||||||
*/
|
*/
|
||||||
uint8_t* macAddress(uint8_t* mac);
|
uint8_t* macAddress(uint8_t* mac);
|
||||||
|
String macAddress(void);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Get the softAP interface MAC address.
|
* Get the softAP interface MAC address.
|
||||||
*
|
*
|
||||||
* return: pointer to uint8_t array with length WL_MAC_ADDR_LENGTH
|
* return: pointer to uint8_t array with length WL_MAC_ADDR_LENGTH
|
||||||
|
* return: String
|
||||||
*/
|
*/
|
||||||
uint8_t* softAPmacAddress(uint8_t* mac);
|
uint8_t* softAPmacAddress(uint8_t* mac);
|
||||||
|
String softAPmacAddress(void);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Get the station interface IP address.
|
* Get the station interface IP address.
|
||||||
@ -151,10 +155,17 @@ public:
|
|||||||
/*
|
/*
|
||||||
* Return the current bssid / mac associated with the network if configured
|
* Return the current bssid / mac associated with the network if configured
|
||||||
*
|
*
|
||||||
* return: bssid string
|
* return: bssid uint8_t *
|
||||||
*/
|
*/
|
||||||
uint8_t * BSSID(void);
|
uint8_t * BSSID(void);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* Return the current bssid / mac associated with the network if configured
|
||||||
|
*
|
||||||
|
* return: bssid string
|
||||||
|
*/
|
||||||
|
String BSSIDstr(void);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Return the current channel associated with the network
|
* Return the current channel associated with the network
|
||||||
*
|
*
|
||||||
@ -163,13 +174,12 @@ public:
|
|||||||
int32_t channel(void);
|
int32_t channel(void);
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Return the current network RSSI. Note: this is just a stub, there is no way to
|
* Return the current network RSSI.
|
||||||
* get the RSSI in the Espressif SDK yet.
|
|
||||||
*
|
*
|
||||||
* return: RSSI value (currently 0)
|
* return: RSSI value
|
||||||
*/
|
*/
|
||||||
|
|
||||||
int32_t RSSI() { return 0; }
|
int32_t RSSI();
|
||||||
|
|
||||||
/*
|
/*
|
||||||
* Start scan WiFi networks available
|
* Start scan WiFi networks available
|
||||||
@ -209,10 +219,17 @@ public:
|
|||||||
/**
|
/**
|
||||||
* return MAC / BSSID of scanned wifi
|
* return MAC / BSSID of scanned wifi
|
||||||
* @param networkItem specify from which network item want to get the information
|
* @param networkItem specify from which network item want to get the information
|
||||||
* @return uint8_t * to MAC / BSSID of scanned wifi
|
* @return uint8_t * MAC / BSSID of scanned wifi
|
||||||
*/
|
*/
|
||||||
uint8_t * BSSID(uint8_t networkItem);
|
uint8_t * BSSID(uint8_t networkItem);
|
||||||
|
|
||||||
|
/**
|
||||||
|
* return MAC / BSSID of scanned wifi
|
||||||
|
* @param networkItem specify from which network item want to get the information
|
||||||
|
* @return String MAC / BSSID of scanned wifi
|
||||||
|
*/
|
||||||
|
String BSSIDstr(uint8_t networkItem);
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* return channel of scanned wifi
|
* return channel of scanned wifi
|
||||||
* @param networkItem specify from which network item want to get the information
|
* @param networkItem specify from which network item want to get the information
|
||||||
|
@ -47,6 +47,10 @@ wl_status_t ESP8266WiFiMulti::run(void) {
|
|||||||
uint8 bestBSSID[6];
|
uint8 bestBSSID[6];
|
||||||
int32_t bestChannel;
|
int32_t bestChannel;
|
||||||
|
|
||||||
|
DEBUG_WIFI_MULTI("[WIFI] delete old wifi config...\n");
|
||||||
|
WiFi.disconnect();
|
||||||
|
|
||||||
|
DEBUG_WIFI_MULTI("[WIFI] start scan\n");
|
||||||
// WiFi.scanNetworks will return the number of networks found
|
// WiFi.scanNetworks will return the number of networks found
|
||||||
int8_t n = WiFi.scanNetworks();
|
int8_t n = WiFi.scanNetworks();
|
||||||
|
|
||||||
@ -93,7 +97,7 @@ wl_status_t ESP8266WiFiMulti::run(void) {
|
|||||||
DEBUG_WIFI_MULTI(" ");
|
DEBUG_WIFI_MULTI(" ");
|
||||||
}
|
}
|
||||||
|
|
||||||
DEBUG_WIFI_MULTI(" %d: [%d][%02X:%02X:%02X:%02X:%02X:%02X] %s (%d) %c\n", i, chan_scan, BSSID_scan[0], BSSID_scan[1], BSSID_scan[2], BSSID_scan[3], BSSID_scan[4], BSSID_scan[5], ssid_scan, rssi_scan, (sec_scan == ENC_TYPE_NONE) ? ' ' : '*');
|
DEBUG_WIFI_MULTI(" %d: [%d][%02X:%02X:%02X:%02X:%02X:%02X] %s (%d) %c\n", i, chan_scan, BSSID_scan[0], BSSID_scan[1], BSSID_scan[2], BSSID_scan[3], BSSID_scan[4], BSSID_scan[5], ssid_scan.c_str(), rssi_scan, (sec_scan == ENC_TYPE_NONE) ? ' ' : '*');
|
||||||
delay(0);
|
delay(0);
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
@ -32,7 +32,7 @@
|
|||||||
#undef max
|
#undef max
|
||||||
#include <vector>
|
#include <vector>
|
||||||
|
|
||||||
//#define DEBUG_WIFI_MULTI(...) os_printf( __VA_ARGS__ )
|
//#define DEBUG_WIFI_MULTI(...) Serial1.printf( __VA_ARGS__ )
|
||||||
|
|
||||||
#ifndef DEBUG_WIFI_MULTI
|
#ifndef DEBUG_WIFI_MULTI
|
||||||
#define DEBUG_WIFI_MULTI(...)
|
#define DEBUG_WIFI_MULTI(...)
|
||||||
|
@ -74,11 +74,11 @@ recipe.objcopy.eep.pattern=
|
|||||||
## Create hex
|
## Create hex
|
||||||
#recipe.objcopy.hex.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.flags} {compiler.elf2hex.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.hex"
|
#recipe.objcopy.hex.pattern="{compiler.path}{compiler.elf2hex.cmd}" {compiler.elf2hex.flags} {compiler.elf2hex.extra_flags} "{build.path}/{build.project_name}.elf" "{build.path}/{build.project_name}.hex"
|
||||||
|
|
||||||
recipe.objcopy.hex.pattern="{runtime.tools.esptool.path}/{compiler.esptool.cmd}" -eo "{build.path}/{build.project_name}.elf" -bo "{build.path}/{build.project_name}_00000.bin" -bm {build.flash_mode} -bf {build.flash_freq} -bz {build.flash_size} -bs .text -bs .data -bs .rodata -bc -ec -eo "{build.path}/{build.project_name}.elf" -es .irom0.text "{build.path}/{build.project_name}_10000.bin" -ec
|
recipe.objcopy.hex.pattern="{runtime.tools.esptool.path}/{compiler.esptool.cmd}" -eo "{runtime.platform.path}/bootloaders/eboot/eboot.elf" -bo "{build.path}/{build.project_name}.bin" -bm {build.flash_mode} -bf {build.flash_freq} -bz {build.flash_size} -bs .text -bp 4096 -ec -eo "{build.path}/{build.project_name}.elf" -bs .irom0.text -bs .text -bs .data -bs .rodata -bc -ec
|
||||||
|
|
||||||
## Compute size
|
## Compute size
|
||||||
recipe.size.pattern="{compiler.path}{compiler.size.cmd}" -A "{build.path}/{build.project_name}.elf"
|
recipe.size.pattern="{compiler.path}{compiler.size.cmd}" -A "{build.path}/{build.project_name}.elf"
|
||||||
recipe.size.regex=^(?:\.irom0\.text|)\s+([0-9]+).*
|
recipe.size.regex=^(?:\.irom0\.text|\.text|\.data|\.rodata|\.bss|)\s+([0-9]+).*
|
||||||
recipe.size.regex.data=^(?:\.data|\.rodata|\.bss)\s+([0-9]+).*
|
recipe.size.regex.data=^(?:\.data|\.rodata|\.bss)\s+([0-9]+).*
|
||||||
#recipe.size.regex.eeprom=^(?:\.eeprom)\s+([0-9]+).*
|
#recipe.size.regex.eeprom=^(?:\.eeprom)\s+([0-9]+).*
|
||||||
|
|
||||||
@ -91,4 +91,4 @@ tools.esptool.path={runtime.platform.path}/tools
|
|||||||
tools.esptool.upload.protocol=esp
|
tools.esptool.upload.protocol=esp
|
||||||
tools.esptool.upload.params.verbose=-vv
|
tools.esptool.upload.params.verbose=-vv
|
||||||
tools.esptool.upload.params.quiet=
|
tools.esptool.upload.params.quiet=
|
||||||
tools.esptool.upload.pattern="{path}/{cmd}" {upload.verbose} -cd {upload.resetmethod} -cb {upload.speed} -cp "{serial.port}" -ca 0x00000 -cf "{build.path}/{build.project_name}_00000.bin" -ca 0x10000 -cf "{build.path}/{build.project_name}_10000.bin"
|
tools.esptool.upload.pattern="{path}/{cmd}" {upload.verbose} -cd {upload.resetmethod} -cb {upload.speed} -cp "{serial.port}" -ca 0x00000 -cf "{build.path}/{build.project_name}.bin"
|
||||||
|
@ -1,3 +1,13 @@
|
|||||||
|
esp_iot_sdk_v1.1.0_15_05_27_p1 Release Note
|
||||||
|
-------------------------------------------
|
||||||
|
|
||||||
|
Here is a patch based on SDK_v1.1.0 resolved issues below:
|
||||||
|
1. SDK 1.1.0 may boot fail if SPI Flash speed is 80MHz.
|
||||||
|
2. Memory Leak in libssl when SSL connection fail.
|
||||||
|
3. Update smartconfig, please using it with the latest Espressif APP https://github.com/EspressifApp
|
||||||
|
|
||||||
|
Sorry for the inconvenience.
|
||||||
|
|
||||||
esp_iot_sdk_v1.1.0_15_05_22 Release Note
|
esp_iot_sdk_v1.1.0_15_05_22 Release Note
|
||||||
----------------------------------------
|
----------------------------------------
|
||||||
Resolved Issues(Bugs below are eligible for Bug Bounty Program):
|
Resolved Issues(Bugs below are eligible for Bug Bounty Program):
|
||||||
|
@ -43,7 +43,6 @@ typedef void (*int_handler_t)(void*);
|
|||||||
#define ETS_GPIO_INUM 4
|
#define ETS_GPIO_INUM 4
|
||||||
#define ETS_UART_INUM 5
|
#define ETS_UART_INUM 5
|
||||||
#define ETS_UART1_INUM 5
|
#define ETS_UART1_INUM 5
|
||||||
#define ETS_CCOMPARE0_INUM 6
|
|
||||||
#define ETS_FRC_TIMER1_INUM 9 /* use edge*/
|
#define ETS_FRC_TIMER1_INUM 9 /* use edge*/
|
||||||
|
|
||||||
#define ETS_INTR_LOCK() \
|
#define ETS_INTR_LOCK() \
|
||||||
@ -52,9 +51,6 @@ typedef void (*int_handler_t)(void*);
|
|||||||
#define ETS_INTR_UNLOCK() \
|
#define ETS_INTR_UNLOCK() \
|
||||||
ets_intr_unlock()
|
ets_intr_unlock()
|
||||||
|
|
||||||
#define ETS_CCOMPARE0_INTR_ATTACH(func, arg) \
|
|
||||||
ets_isr_attach(ETS_CCOMPARE0_INUM, (int_handler_t)(func), (void *)(arg))
|
|
||||||
|
|
||||||
#define ETS_FRC_TIMER1_INTR_ATTACH(func, arg) \
|
#define ETS_FRC_TIMER1_INTR_ATTACH(func, arg) \
|
||||||
ets_isr_attach(ETS_FRC_TIMER1_INUM, (int_handler_t)(func), (void *)(arg))
|
ets_isr_attach(ETS_FRC_TIMER1_INUM, (int_handler_t)(func), (void *)(arg))
|
||||||
|
|
||||||
@ -73,20 +69,6 @@ typedef void (*int_handler_t)(void*);
|
|||||||
#define ETS_INTR_DISABLE(inum) \
|
#define ETS_INTR_DISABLE(inum) \
|
||||||
ets_isr_mask((1<<inum))
|
ets_isr_mask((1<<inum))
|
||||||
|
|
||||||
inline uint32_t ETS_INTR_ENABLED(void)
|
|
||||||
{
|
|
||||||
uint32_t enabled;
|
|
||||||
__asm__ __volatile__("esync; rsr %0,intenable":"=a" (enabled));
|
|
||||||
return enabled;
|
|
||||||
}
|
|
||||||
|
|
||||||
inline uint32_t ETS_INTR_PENDING(void)
|
|
||||||
{
|
|
||||||
uint32_t pending;
|
|
||||||
__asm__ __volatile__("esync; rsr %0,interrupt":"=a" (pending));
|
|
||||||
return pending;
|
|
||||||
}
|
|
||||||
|
|
||||||
#define ETS_SPI_INTR_ENABLE() \
|
#define ETS_SPI_INTR_ENABLE() \
|
||||||
ETS_INTR_ENABLE(ETS_SPI_INUM)
|
ETS_INTR_ENABLE(ETS_SPI_INUM)
|
||||||
|
|
||||||
@ -96,12 +78,6 @@ inline uint32_t ETS_INTR_PENDING(void)
|
|||||||
#define ETS_UART_INTR_DISABLE() \
|
#define ETS_UART_INTR_DISABLE() \
|
||||||
ETS_INTR_DISABLE(ETS_UART_INUM)
|
ETS_INTR_DISABLE(ETS_UART_INUM)
|
||||||
|
|
||||||
#define ETS_CCOMPARE0_ENABLE() \
|
|
||||||
ETS_INTR_ENABLE(ETS_CCOMPARE0_INUM)
|
|
||||||
|
|
||||||
#define ETS_CCOMPARE0_DISABLE() \
|
|
||||||
ETS_INTR_DISABLE(ETS_CCOMPARE0_INUM)
|
|
||||||
|
|
||||||
#define ETS_FRC1_INTR_ENABLE() \
|
#define ETS_FRC1_INTR_ENABLE() \
|
||||||
ETS_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
|
ETS_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
|
||||||
|
|
||||||
@ -142,7 +118,7 @@ void ets_isr_unmask(int intr);
|
|||||||
void ets_isr_attach(int intr, int_handler_t handler, void *arg);
|
void ets_isr_attach(int intr, int_handler_t handler, void *arg);
|
||||||
void ets_intr_lock();
|
void ets_intr_lock();
|
||||||
void ets_intr_unlock();
|
void ets_intr_unlock();
|
||||||
int ets_vsnprintf(char * s, size_t n, const char * format, va_list arg);
|
int ets_vsnprintf(char * s, size_t n, const char * format, va_list arg) __attribute__ ((format (printf, 3, 0)));
|
||||||
int ets_vprintf(const char * format, va_list arg);
|
int ets_vprintf(const char * format, va_list arg) __attribute__ ((format (printf, 1, 0)));
|
||||||
|
|
||||||
#endif /* _ETS_SYS_H */
|
#endif /* _ETS_SYS_H */
|
||||||
|
@ -30,7 +30,7 @@ enum rst_reason {
|
|||||||
DEEP_SLEEP_AWAKE_FLAG = 4
|
DEEP_SLEEP_AWAKE_FLAG = 4
|
||||||
};
|
};
|
||||||
|
|
||||||
struct rst_info{
|
struct rst_info {
|
||||||
uint32 reason;
|
uint32 reason;
|
||||||
uint32 exccause;
|
uint32 exccause;
|
||||||
uint32 epc1;
|
uint32 epc1;
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 16M chips */
|
/* Flash Split for 16M chips */
|
||||||
/* irom0 940KB */
|
/* sketch 1019KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
/* spiffs 15MB */
|
/* spiffs 15MB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0xEB000
|
irom0_0_seg : org = 0x40201010, len = 0xfeff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x40300000 );
|
PROVIDE ( _SPIFFS_start = 0x40300000 );
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 1M chips */
|
/* Flash Split for 1M chips */
|
||||||
/* irom0 812KB */
|
/* sketch 871KB */
|
||||||
/* spiffs 128KB */
|
/* spiffs 128KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0xCB000
|
irom0_0_seg : org = 0x40201010, len = 0xd9ff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x402DB000 );
|
PROVIDE ( _SPIFFS_start = 0x402DB000 );
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 1M chips */
|
/* Flash Split for 1M chips */
|
||||||
/* irom0 684KB */
|
/* sketch 743KB */
|
||||||
/* spiffs 256KB */
|
/* spiffs 256KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0xAB000
|
irom0_0_seg : org = 0x40201010, len = 0xb9ff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x402BB000 );
|
PROVIDE ( _SPIFFS_start = 0x402BB000 );
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 1M chips */
|
/* Flash Split for 1M chips */
|
||||||
/* irom0 428KB */
|
/* sketch 487KB */
|
||||||
/* spiffs 512KB */
|
/* spiffs 512KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0x6B000
|
irom0_0_seg : org = 0x40201010, len = 0x79ff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x4027B000 );
|
PROVIDE ( _SPIFFS_start = 0x4027B000 );
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 1M chips */
|
/* Flash Split for 1M chips */
|
||||||
/* irom0 876KB */
|
/* sketch 935KB */
|
||||||
/* spiffs 64KB */
|
/* spiffs 64KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0xDB000
|
irom0_0_seg : org = 0x40201010, len = 0xe9ff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x402EB000 );
|
PROVIDE ( _SPIFFS_start = 0x402EB000 );
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 2M chips */
|
/* Flash Split for 2M chips */
|
||||||
/* irom0 960KB */
|
/* sketch 1019KB */
|
||||||
/* spiffs 1004KB */
|
/* spiffs 1004KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0xF0000
|
irom0_0_seg : org = 0x40201010, len = 0xfeff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x40300000 );
|
PROVIDE ( _SPIFFS_start = 0x40300000 );
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 4M chips */
|
/* Flash Split for 4M chips */
|
||||||
/* irom0 960KB */
|
/* sketch 1019KB */
|
||||||
/* spiffs 3052KB */
|
/* spiffs 3052KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0xF0000
|
irom0_0_seg : org = 0x40201010, len = 0xfeff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x40300000 );
|
PROVIDE ( _SPIFFS_start = 0x40300000 );
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 512K chips */
|
/* Flash Split for 512K chips */
|
||||||
/* irom0 364KB */
|
/* sketch 423KB */
|
||||||
/* spiffs 64KB */
|
/* spiffs 64KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0x5B000
|
irom0_0_seg : org = 0x40201010, len = 0x69ff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x4026B000 );
|
PROVIDE ( _SPIFFS_start = 0x4026B000 );
|
||||||
|
@ -1,5 +1,5 @@
|
|||||||
/* Flash Split for 8M chips */
|
/* Flash Split for 8M chips */
|
||||||
/* irom0 940KB */
|
/* sketch 1019KB */
|
||||||
/* eeprom 20KB */
|
/* eeprom 20KB */
|
||||||
/* spiffs 7MB */
|
/* spiffs 7MB */
|
||||||
|
|
||||||
@ -8,7 +8,7 @@ MEMORY
|
|||||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||||
irom0_0_seg : org = 0x40210000, len = 0xEB000
|
irom0_0_seg : org = 0x40201010, len = 0xfeff0
|
||||||
}
|
}
|
||||||
|
|
||||||
PROVIDE ( _SPIFFS_start = 0x40300000 );
|
PROVIDE ( _SPIFFS_start = 0x40300000 );
|
||||||
|
Binary file not shown.
Binary file not shown.
Binary file not shown.
@ -1 +1 @@
|
|||||||
1.1.0
|
1.1.0_15_05_27_p1
|
70
variants/adafruit/pins_arduino.h
Normal file
70
variants/adafruit/pins_arduino.h
Normal file
@ -0,0 +1,70 @@
|
|||||||
|
/*
|
||||||
|
pins_arduino.h - Pin definition functions for Arduino
|
||||||
|
Part of Arduino - http://www.arduino.cc/
|
||||||
|
|
||||||
|
Copyright (c) 2007 David A. Mellis
|
||||||
|
Modified for ESP8266 platform by Ivan Grokhotkov, 2014-2015.
|
||||||
|
|
||||||
|
This library is free software; you can redistribute it and/or
|
||||||
|
modify it under the terms of the GNU Lesser General Public
|
||||||
|
License as published by the Free Software Foundation; either
|
||||||
|
version 2.1 of the License, or (at your option) any later version.
|
||||||
|
|
||||||
|
This library is distributed in the hope that it will be useful,
|
||||||
|
but WITHOUT ANY WARRANTY; without even the implied warranty of
|
||||||
|
MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
||||||
|
Lesser General Public License for more details.
|
||||||
|
|
||||||
|
You should have received a copy of the GNU Lesser General
|
||||||
|
Public License along with this library; if not, write to the
|
||||||
|
Free Software Foundation, Inc., 59 Temple Place, Suite 330,
|
||||||
|
Boston, MA 02111-1307 USA
|
||||||
|
|
||||||
|
$Id: wiring.h 249 2007-02-03 16:52:51Z mellis $
|
||||||
|
*/
|
||||||
|
|
||||||
|
#ifndef Pins_Arduino_h
|
||||||
|
#define Pins_Arduino_h
|
||||||
|
|
||||||
|
#define EXTERNAL_NUM_INTERRUPTS 16
|
||||||
|
#define NUM_DIGITAL_PINS 17
|
||||||
|
#define NUM_ANALOG_INPUTS 1
|
||||||
|
|
||||||
|
#define analogInputToDigitalPin(p) ((p > 0)?NOT_A_PIN:0)
|
||||||
|
#define digitalPinToInterrupt(p) (((p) < EXTERNAL_NUM_INTERRUPTS)?p:NOT_A_PIN)
|
||||||
|
#define digitalPinHasPWM(p) (((p) < NUM_DIGITAL_PINS)?p:NOT_A_PIN)
|
||||||
|
|
||||||
|
static const uint8_t SDA = 4;
|
||||||
|
static const uint8_t SCL = 5;
|
||||||
|
|
||||||
|
static const uint8_t SS = 15;
|
||||||
|
static const uint8_t MOSI = 13;
|
||||||
|
static const uint8_t MISO = 12;
|
||||||
|
static const uint8_t SCK = 14;
|
||||||
|
|
||||||
|
static const uint8_t BUILTIN_LED = 0;
|
||||||
|
|
||||||
|
static const uint8_t A0 = 17;
|
||||||
|
|
||||||
|
// These serial port names are intended to allow libraries and architecture-neutral
|
||||||
|
// sketches to automatically default to the correct port name for a particular type
|
||||||
|
// of use. For example, a GPS module would normally connect to SERIAL_PORT_HARDWARE_OPEN,
|
||||||
|
// the first hardware serial port whose RX/TX pins are not dedicated to another use.
|
||||||
|
//
|
||||||
|
// SERIAL_PORT_MONITOR Port which normally prints to the Arduino Serial Monitor
|
||||||
|
//
|
||||||
|
// SERIAL_PORT_USBVIRTUAL Port which is USB virtual serial
|
||||||
|
//
|
||||||
|
// SERIAL_PORT_LINUXBRIDGE Port which connects to a Linux system via Bridge library
|
||||||
|
//
|
||||||
|
// SERIAL_PORT_HARDWARE Hardware serial port, physical RX & TX pins.
|
||||||
|
//
|
||||||
|
// SERIAL_PORT_HARDWARE_OPEN Hardware serial ports which are open for use. Their RX & TX
|
||||||
|
// pins are NOT connected to anything by default.
|
||||||
|
#define SERIAL_PORT_MONITOR Serial
|
||||||
|
#define SERIAL_PORT_USBVIRTUAL Serial
|
||||||
|
#define SERIAL_PORT_HARDWARE Serial
|
||||||
|
#define SERIAL_PORT_HARDWARE_OPEN Serial
|
||||||
|
|
||||||
|
#endif /* Pins_Arduino_h */
|
||||||
|
|
Loading…
x
Reference in New Issue
Block a user