mirror of
https://github.com/esp8266/Arduino.git
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[sam] PIO and PMC drivers adapted to enable SAM3U compilation, makefiles prepared for SAM3U-EK and Due
This commit is contained in:
@ -1,8 +1,8 @@
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# Makefile for compiling libArduino
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# Makefile for compiling libArduino
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.SUFFIXES: .o .a .c .s
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.SUFFIXES: .o .a .c .s
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CHIP=__SAM3S4C__
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CHIP=__SAM3U4E__
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VARIANT=sam3s_ek
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VARIANT=arduino_due
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LIBNAME=libarduino_$(VARIANT)
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LIBNAME=libarduino_$(VARIANT)
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TOOLCHAIN=gcc
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TOOLCHAIN=gcc
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@ -1,8 +1,8 @@
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# Makefile for compiling libArduino
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# Makefile for compiling libArduino
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.SUFFIXES: .o .a .c .s
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.SUFFIXES: .o .a .c .s
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CHIP=__SAM3S4C__
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CHIP=__SAM3U4E__
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VARIANT=sam3s_ek
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VARIANT=sam3u_ek
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LIBNAME=libarduino_$(VARIANT)
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LIBNAME=libarduino_$(VARIANT)
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TOOLCHAIN=gcc
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TOOLCHAIN=gcc
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@ -11,22 +11,34 @@ all: libsam_sam3s4c_gcc_dbg.a libsam_sam3u4e_gcc_dbg.a
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.PHONY: libsam_sam3s4c_gcc_dbg.a
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.PHONY: libsam_sam3s4c_gcc_dbg.a
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libsam_sam3s4c_gcc_dbg.a:
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libsam_sam3s4c_gcc_dbg.a:
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@echo ---
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@echo ---
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@echo --- Making $@
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@echo --- Making $@
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@echo ---
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@$(MAKE) CHIP=__SAM3S4C__ DEBUG=1 $(SUBMAKE_OPTIONS) -f sam3.mk
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@$(MAKE) CHIP=__SAM3S4C__ DEBUG=1 $(SUBMAKE_OPTIONS) -f sam3.mk
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.PHONY: libsam_sam3s4c_gcc_rel.a
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.PHONY: libsam_sam3s4c_gcc_rel.a
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libsam_sam3s4c_gcc_rel.a:
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libsam_sam3s4c_gcc_rel.a:
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@echo ---
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@echo ---
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@echo --- Making $@
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@echo --- Making $@
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@echo ---
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@$(MAKE) CHIP=__SAM3S4C__ $(SUBMAKE_OPTIONS) -f sam3.mk
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@$(MAKE) CHIP=__SAM3S4C__ $(SUBMAKE_OPTIONS) -f sam3.mk
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.PHONY: libsam_sam3u4e_gcc_dbg.a
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.PHONY: libsam_sam3u4e_gcc_dbg.a
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libsam_sam3u4e_gcc_dbg.a:
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libsam_sam3u4e_gcc_dbg.a:
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@echo ---
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@echo ---
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@echo --- Making $@
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@echo --- Making $@
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@echo ---
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@$(MAKE) CHIP=__SAM3U4E__ DEBUG=1 $(SUBMAKE_OPTIONS) -f sam3.mk
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@$(MAKE) CHIP=__SAM3U4E__ DEBUG=1 $(SUBMAKE_OPTIONS) -f sam3.mk
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.PHONY: libsam_sam3u4e_gcc_rel.a
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.PHONY: libsam_sam3u4e_gcc_rel.a
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libsam_sam3u4e_gcc_rel.a:
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libsam_sam3u4e_gcc_rel.a:
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@echo ---
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@echo ---
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@echo --- Making $@
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@echo --- Making $@
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@echo ---
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@$(MAKE) CHIP=__SAM3U4E__ $(SUBMAKE_OPTIONS) -f sam3.mk
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@$(MAKE) CHIP=__SAM3U4E__ $(SUBMAKE_OPTIONS) -f sam3.mk
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.PHONY: clean
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.PHONY: clean
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@ -94,7 +94,7 @@ C_SRC+=$(wildcard $(CMSIS_CHIP_PATH)/source/templates/gcc/*.c)
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C_OBJ_TEMP=$(patsubst %.c, %.o, $(notdir $(C_SRC)))
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C_OBJ_TEMP=$(patsubst %.c, %.o, $(notdir $(C_SRC)))
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# during development, remove some files
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# during development, remove some files
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C_OBJ_FILTER=pio_it.o
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C_OBJ_FILTER=pio_it.o adc.o
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C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP))
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C_OBJ=$(filter-out $(C_OBJ_FILTER), $(C_OBJ_TEMP))
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@ -15,9 +15,7 @@
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/* $asf_license$ */
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/* $asf_license$ */
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#include "system_sam3u.h"
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#include "sam3.h"
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#include "sam3u.h"
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#include "sam3u_ek.h"
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/* @cond 0 */
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/* @cond 0 */
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/**INDENT-OFF**/
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/**INDENT-OFF**/
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@ -21,8 +21,10 @@ typedef enum _EPioType
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PIO_NOT_A_PIN, /* The pin is controlled by the associated signal of peripheral A. */
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PIO_NOT_A_PIN, /* The pin is controlled by the associated signal of peripheral A. */
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PIO_PERIPH_A, /* The pin is controlled by the associated signal of peripheral A. */
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PIO_PERIPH_A, /* The pin is controlled by the associated signal of peripheral A. */
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PIO_PERIPH_B, /* The pin is controlled by the associated signal of peripheral B. */
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PIO_PERIPH_B, /* The pin is controlled by the associated signal of peripheral B. */
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#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
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PIO_PERIPH_C, /* The pin is controlled by the associated signal of peripheral C. */
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PIO_PERIPH_C, /* The pin is controlled by the associated signal of peripheral C. */
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PIO_PERIPH_D, /* The pin is controlled by the associated signal of peripheral D. */
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PIO_PERIPH_D, /* The pin is controlled by the associated signal of peripheral D. */
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#endif /* (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_) */
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PIO_INPUT, /* The pin is an input. */
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PIO_INPUT, /* The pin is an input. */
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PIO_OUTPUT_0, /* The pin is an output and has a default level of 0. */
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PIO_OUTPUT_0, /* The pin is an output and has a default level of 0. */
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PIO_OUTPUT_1 /* The pin is an output and has a default level of 1. */
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PIO_OUTPUT_1 /* The pin is an output and has a default level of 1. */
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@ -21,9 +21,6 @@
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extern void PMC_EnablePeripheral( uint32_t dwId ) ;
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extern void PMC_EnablePeripheral( uint32_t dwId ) ;
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extern void PMC_DisablePeripheral( uint32_t dwId ) ;
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extern void PMC_DisablePeripheral( uint32_t dwId ) ;
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extern void PMC_EnableAllPeripherals( void ) ;
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extern void PMC_DisableAllPeripherals( void ) ;
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extern uint32_t PMC_IsPeriphEnabled( uint32_t dwId ) ;
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extern uint32_t PMC_IsPeriphEnabled( uint32_t dwId ) ;
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#ifdef __cplusplus
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#ifdef __cplusplus
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@ -50,7 +50,13 @@ extern void PIO_PullUp( Pio *pPio, const uint32_t dwMask, const uint32_t dwPullU
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*/
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*/
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extern void PIO_SetDebounceFilter( Pio* pPio, const uint32_t dwMask, const uint32_t dwCuttOff )
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extern void PIO_SetDebounceFilter( Pio* pPio, const uint32_t dwMask, const uint32_t dwCuttOff )
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{
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{
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#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
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pPio->PIO_IFSCER = dwMask ; /* set Debouncing, 0 bit field no effect */
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pPio->PIO_IFSCER = dwMask ; /* set Debouncing, 0 bit field no effect */
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#elif (defined _SAM3XA_) || (defined _SAM3U_)
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pPio->PIO_DIFSR = dwMask ; /* set Debouncing, 0 bit field no effect */
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#else
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#error "The specified chip is not supported."
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#endif
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pPio->PIO_SCDR = ((32678/(2*(dwCuttOff))) - 1) & 0x3FFF; /* the lowest 14 bits work */
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pPio->PIO_SCDR = ((32678/(2*(dwCuttOff))) - 1) & 0x3FFF; /* the lowest 14 bits work */
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}
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}
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@ -121,7 +127,7 @@ extern void PIO_Clear( Pio* pPio, const uint32_t dwMask )
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*/
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*/
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extern void PIO_SetPeripheral( Pio* pPio, EPioType dwType, uint32_t dwMask )
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extern void PIO_SetPeripheral( Pio* pPio, EPioType dwType, uint32_t dwMask )
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{
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{
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uint32_t dwABCDSR ;
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uint32_t dwSR ;
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/* Disable interrupts on the pin(s) */
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/* Disable interrupts on the pin(s) */
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pPio->PIO_IDR = dwMask ;
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pPio->PIO_IDR = dwMask ;
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@ -129,36 +135,52 @@ extern void PIO_SetPeripheral( Pio* pPio, EPioType dwType, uint32_t dwMask )
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switch ( dwType )
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switch ( dwType )
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{
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{
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case PIO_PERIPH_A :
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case PIO_PERIPH_A :
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dwABCDSR = pPio->PIO_ABCDSR[0] ;
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#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
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pPio->PIO_ABCDSR[0] &= (~dwMask & dwABCDSR) ;
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dwSR = pPio->PIO_ABCDSR[0] ;
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pPio->PIO_ABCDSR[0] &= (~dwMask & dwSR) ;
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dwABCDSR = pPio->PIO_ABCDSR[1];
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dwSR = pPio->PIO_ABCDSR[1];
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pPio->PIO_ABCDSR[1] &= (~dwMask & dwABCDSR) ;
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pPio->PIO_ABCDSR[1] &= (~dwMask & dwSR) ;
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#endif /* (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_) */
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#if (defined _SAM3U_) || (defined _SAM3XA_)
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dwSR = pPio->PIO_ABSR ;
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pPio->PIO_ABSR &= (~dwMask & dwSR) ;
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#endif /* (defined _SAM3U_) || (defined _SAM3XA_) */
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break ;
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break ;
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case PIO_PERIPH_B :
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case PIO_PERIPH_B :
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dwABCDSR = pPio->PIO_ABCDSR[0] ;
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#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
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pPio->PIO_ABCDSR[0] = (dwMask | dwABCDSR) ;
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dwSR = pPio->PIO_ABCDSR[0] ;
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pPio->PIO_ABCDSR[0] = (dwMask | dwSR) ;
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dwABCDSR = pPio->PIO_ABCDSR[1] ;
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dwSR = pPio->PIO_ABCDSR[1] ;
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pPio->PIO_ABCDSR[1] &= (~dwMask & dwABCDSR) ;
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pPio->PIO_ABCDSR[1] &= (~dwMask & dwSR) ;
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#endif /* (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_) */
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#if (defined _SAM3U_) || (defined _SAM3XA_)
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dwSR = pPio->PIO_ABSR ;
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pPio->PIO_ABSR = (dwMask | dwSR) ;
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#endif /* (defined _SAM3U_) || (defined _SAM3XA_) */
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break ;
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break ;
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#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
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case PIO_PERIPH_C :
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case PIO_PERIPH_C :
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dwABCDSR = pPio->PIO_ABCDSR[0] ;
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dwSR = pPio->PIO_ABCDSR[0] ;
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pPio->PIO_ABCDSR[0] &= (~dwMask & dwABCDSR) ;
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pPio->PIO_ABCDSR[0] &= (~dwMask & dwSR) ;
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dwABCDSR = pPio->PIO_ABCDSR[1] ;
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dwSR = pPio->PIO_ABCDSR[1] ;
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pPio->PIO_ABCDSR[1] = (dwMask | dwABCDSR) ;
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pPio->PIO_ABCDSR[1] = (dwMask | dwSR) ;
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break ;
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break ;
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case PIO_PERIPH_D :
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case PIO_PERIPH_D :
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dwABCDSR = pPio->PIO_ABCDSR[0] ;
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dwSR = pPio->PIO_ABCDSR[0] ;
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pPio->PIO_ABCDSR[0] = (dwMask | dwABCDSR) ;
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pPio->PIO_ABCDSR[0] = (dwMask | dwSR) ;
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dwABCDSR = pPio->PIO_ABCDSR[1] ;
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dwSR = pPio->PIO_ABCDSR[1] ;
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pPio->PIO_ABCDSR[1] = (dwMask | dwABCDSR) ;
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pPio->PIO_ABCDSR[1] = (dwMask | dwSR) ;
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break ;
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break ;
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#endif /* (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_) */
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// other types are invalid in this function
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// other types are invalid in this function
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case PIO_INPUT :
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case PIO_INPUT :
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@ -196,6 +218,7 @@ extern void PIO_SetInput( Pio* pPio, uint32_t dwMask, uint32_t dwAttribute )
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}
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}
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/* Enable de-glitch or de-bounce if necessary */
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/* Enable de-glitch or de-bounce if necessary */
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#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
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if ( dwAttribute & PIO_DEGLITCH )
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if ( dwAttribute & PIO_DEGLITCH )
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{
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{
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pPio->PIO_IFSCDR = dwMask ;
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pPio->PIO_IFSCDR = dwMask ;
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@ -207,6 +230,21 @@ extern void PIO_SetInput( Pio* pPio, uint32_t dwMask, uint32_t dwAttribute )
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pPio->PIO_IFSCER = dwMask ;
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pPio->PIO_IFSCER = dwMask ;
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}
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}
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}
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}
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#elif (defined _SAM3U_) || (defined _SAM3XA_)
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if ( dwAttribute & PIO_DEGLITCH )
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{
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pPio->PIO_SCIFSR = dwMask ;
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}
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else
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{
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if ( dwAttribute & PIO_DEBOUNCE )
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{
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pPio->PIO_SCIFSR = dwMask ;
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}
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}
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#else
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#error "The specified chip is not supported."
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#endif
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/* Configure pin as input */
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/* Configure pin as input */
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pPio->PIO_ODR = dwMask ;
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pPio->PIO_ODR = dwMask ;
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@ -266,8 +304,10 @@ extern uint32_t PIO_Configure( Pio* pPio, const EPioType dwType, const uint32_t
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{
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{
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case PIO_PERIPH_A :
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case PIO_PERIPH_A :
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case PIO_PERIPH_B :
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case PIO_PERIPH_B :
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#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_)
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case PIO_PERIPH_C :
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case PIO_PERIPH_C :
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case PIO_PERIPH_D :
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case PIO_PERIPH_D :
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||||||
|
#endif /* (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3N_) */
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/* Put the pin under control of peripheral */
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/* Put the pin under control of peripheral */
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PIO_SetPeripheral( pPio, dwType, dwMask ) ;
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PIO_SetPeripheral( pPio, dwType, dwMask ) ;
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||||||
/* Disable interrupts on the pin(s) */
|
/* Disable interrupts on the pin(s) */
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||||||
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@ -31,6 +31,7 @@
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|||||||
*/
|
*/
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||||||
extern void PMC_EnablePeripheral( uint32_t dwId )
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extern void PMC_EnablePeripheral( uint32_t dwId )
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||||||
{
|
{
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||||||
|
#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3XA_)
|
||||||
assert( dwId < 35 ) ;
|
assert( dwId < 35 ) ;
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||||||
|
|
||||||
if ( dwId < 32 )
|
if ( dwId < 32 )
|
||||||
@ -56,6 +57,14 @@ extern void PMC_EnablePeripheral( uint32_t dwId )
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|||||||
PMC->PMC_PCER1 = 1 << dwId ;
|
PMC->PMC_PCER1 = 1 << dwId ;
|
||||||
}
|
}
|
||||||
}
|
}
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||||||
|
#elif (defined _SAM3N_) || (defined _SAM3U_)
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||||||
|
if ( (PMC->PMC_PCSR & ((uint32_t)1 << dwId)) != ((uint32_t)1 << dwId) )
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||||||
|
{
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||||||
|
PMC->PMC_PCER = 1 << dwId ;
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||||||
|
}
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||||||
|
#else
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||||||
|
#error "The specified chip is not supported."
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||||||
|
#endif
|
||||||
}
|
}
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||||||
|
|
||||||
/**
|
/**
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||||||
@ -68,15 +77,12 @@ extern void PMC_EnablePeripheral( uint32_t dwId )
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|||||||
*/
|
*/
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||||||
extern void PMC_DisablePeripheral( uint32_t dwId )
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extern void PMC_DisablePeripheral( uint32_t dwId )
|
||||||
{
|
{
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||||||
|
#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3XA_)
|
||||||
assert( dwId < 35 ) ;
|
assert( dwId < 35 ) ;
|
||||||
|
|
||||||
if ( dwId < 32 )
|
if ( dwId < 32 )
|
||||||
{
|
{
|
||||||
if ( (PMC->PMC_PCSR0 & ((uint32_t)1 << dwId)) != ((uint32_t)1 << dwId) )
|
if ( (PMC->PMC_PCSR0 & ((uint32_t)1 << dwId)) == ((uint32_t)1 << dwId) )
|
||||||
{
|
|
||||||
// TRACE_DEBUG("PMC_DisablePeripheral: clock of peripheral" " %u is not enabled\n\r", dwId ) ;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
{
|
||||||
PMC->PMC_PCDR0 = 1 << dwId ;
|
PMC->PMC_PCDR0 = 1 << dwId ;
|
||||||
}
|
}
|
||||||
@ -84,59 +90,69 @@ extern void PMC_DisablePeripheral( uint32_t dwId )
|
|||||||
else
|
else
|
||||||
{
|
{
|
||||||
dwId -= 32 ;
|
dwId -= 32 ;
|
||||||
if ( (PMC->PMC_PCSR1 & ((uint32_t)1 << dwId)) != ((uint32_t)1 << dwId) )
|
if ( (PMC->PMC_PCSR1 & ((uint32_t)1 << dwId)) == ((uint32_t)1 << dwId) )
|
||||||
{
|
|
||||||
// TRACE_DEBUG( "PMC_DisablePeripheral: clock of peripheral" " %u is not enabled\n\r", dwId + 32 ) ;
|
|
||||||
}
|
|
||||||
else
|
|
||||||
{
|
{
|
||||||
PMC->PMC_PCDR1 = 1 << dwId ;
|
PMC->PMC_PCDR1 = 1 << dwId ;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
}
|
#elif (defined _SAM3N_) || (defined _SAM3U_)
|
||||||
|
if ( (PMC->PMC_PCSR & ((uint32_t)1 << dwId)) == ((uint32_t)1 << dwId) )
|
||||||
/**
|
|
||||||
* \brief Enable all the periph clock via PMC.
|
|
||||||
*/
|
|
||||||
extern void PMC_EnableAllPeripherals( void )
|
|
||||||
{
|
{
|
||||||
PMC->PMC_PCER0 = MASK_STATUS0 ;
|
PMC->PMC_PCDR = 1 << dwId ;
|
||||||
while ( (PMC->PMC_PCSR0 & MASK_STATUS0) != MASK_STATUS0 ) ;
|
}
|
||||||
|
#else
|
||||||
PMC->PMC_PCER1 = MASK_STATUS1 ;
|
#error "The specified chip is not supported."
|
||||||
while ( (PMC->PMC_PCSR1 & MASK_STATUS1) != MASK_STATUS1 ) ;
|
#endif
|
||||||
|
|
||||||
// TRACE_DEBUG( "Enable all periph clocks\n\r" ) ;
|
|
||||||
}
|
}
|
||||||
|
|
||||||
/**
|
/**
|
||||||
* \brief Disable all the periph clock via PMC.
|
* \brief Get the status of the specified peripheral clock.
|
||||||
*/
|
|
||||||
extern void PMC_DisableAllPeripherals( void )
|
|
||||||
{
|
|
||||||
PMC->PMC_PCDR0 = MASK_STATUS0 ;
|
|
||||||
while ( (PMC->PMC_PCSR0 & MASK_STATUS0) != 0 ) ;
|
|
||||||
|
|
||||||
PMC->PMC_PCDR1 = MASK_STATUS1 ;
|
|
||||||
while ( (PMC->PMC_PCSR1 & MASK_STATUS1) != 0 ) ;
|
|
||||||
|
|
||||||
// TRACE_DEBUG( "Disable all periph clocks\n\r" ) ;
|
|
||||||
}
|
|
||||||
|
|
||||||
/**
|
|
||||||
* \brief Get Periph Status for the given peripheral ID.
|
|
||||||
*
|
*
|
||||||
* \param id Peripheral ID (ID_xxx).
|
* \note The ID must NOT be shifted (i.e. 1 << ID_xxx).
|
||||||
|
*
|
||||||
|
* \param dwId Peripheral ID (ID_xxx).
|
||||||
|
*
|
||||||
|
* \retval 0 Clock is active.
|
||||||
|
* \retval 1 Clock is inactive.
|
||||||
|
* \retval 2 Invalid parameter.
|
||||||
*/
|
*/
|
||||||
extern uint32_t PMC_IsPeriphEnabled( uint32_t dwId )
|
extern uint32_t PMC_IsPeripheralEnabled( uint32_t dwId )
|
||||||
{
|
{
|
||||||
|
#if (defined _SAM3S_) || (defined _SAM3S8_) || (defined _SAM3XA_)
|
||||||
assert( dwId < 35 ) ;
|
assert( dwId < 35 ) ;
|
||||||
|
|
||||||
if ( dwId < 32 )
|
if ( dwId < 32 )
|
||||||
{
|
{
|
||||||
return ( PMC->PMC_PCSR0 & (1 << dwId) ) ;
|
if ( PMC->PMC_PCSR0 & (1 << dwId) )
|
||||||
|
{
|
||||||
|
return 0 ;
|
||||||
}
|
}
|
||||||
else {
|
else
|
||||||
return ( PMC->PMC_PCSR1 & (1 << (dwId - 32)) ) ;
|
{
|
||||||
|
return 1 ;
|
||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
if ( PMC->PMC_PCSR1 & (1 << (dwId - 32)) )
|
||||||
|
{
|
||||||
|
return 0 ;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return 1 ;
|
||||||
|
}
|
||||||
|
}
|
||||||
|
#elif (defined _SAM3N_) || (defined _SAM3U_)
|
||||||
|
if ( (PMC->PMC_PCSR & ((uint32_t)1 << dwId)) )
|
||||||
|
{
|
||||||
|
return 0 ;
|
||||||
|
}
|
||||||
|
else
|
||||||
|
{
|
||||||
|
return 1 ;
|
||||||
|
}
|
||||||
|
#else
|
||||||
|
#error "The specified chip is not supported."
|
||||||
|
#endif
|
||||||
|
}
|
||||||
|
Reference in New Issue
Block a user