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Update SDK to 2.0.0

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- Update SDK header files and libraries to SDK 2.0.0 plus 2.0.0_16_08_09
  patch
- Remove mem_manager.o from libmain.a (replaced with umm_malloc)
- Disable switch from DIO to QIO mode for certain flash chips (saves
  IRAM space)
- Add user_rf_cal_sector_set; it points to rf_init_data sector.
- Change the way rf_init_data is spoofed.
  This is now done by wrapping spi_flash_read and returning the data we
  need during startup sequence.
- Place lwip library into flash using linker script instead of section
  attributes (saves IRAM space)
This commit is contained in:
Ivan Grokhotkov
2016-08-26 11:05:28 +08:00
committed by Ivan Grokhotkov
parent 61787b23af
commit ae13809c81
46 changed files with 793 additions and 121 deletions
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34
cores/esp8266/core_esp8266_phy.c
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@ -25,6 +25,8 @@
#include <stdbool.h>
#include <string.h>
#include "c_types.h"
#include "ets_sys.h"
#include "spi_flash.h"
static const uint8_t ICACHE_FLASH_ATTR phy_init_data[128] =
{
@ -228,7 +230,7 @@ static const uint8_t ICACHE_FLASH_ATTR phy_init_data[128] =
// 3: auto measure frequency offset and correct it, bbpll is 160M, it only can correct + frequency offset.
// 5: use 113 byte force_freq_offset to correct frequency offset, bbpll is 168M, it can correct + and - frequency offset.
// 7: use 113 byte force_freq_offset to correct frequency offset, bbpll is 160M , it only can correct + frequency offset.
[112] = 3,
[112] = 0,
// force_freq_offset
// signed, unit is 8kHz
@ -250,14 +252,20 @@ static const uint8_t ICACHE_FLASH_ATTR phy_init_data[128] =
#define __get_rf_mode _Z13__get_rf_modev
#define __run_user_rf_pre_init _Z22__run_user_rf_pre_initv
extern int __real_register_chipv6_phy(uint8_t* init_data);
extern int __wrap_register_chipv6_phy(uint8_t* init_data)
static bool spoof_init_data = false;
extern int __real_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size);
extern int ICACHE_RAM_ATTR __wrap_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size);
extern int ICACHE_RAM_ATTR __wrap_spi_flash_read(uint32_t addr, uint32_t* dst, size_t size)
{
if (init_data != NULL) {
memcpy(init_data, phy_init_data, sizeof(phy_init_data));
init_data[107] = __get_adc_mode();
if (!spoof_init_data || size != 128) {
return __real_spi_flash_read(addr, dst, size);
}
return __real_register_chipv6_phy(init_data);
memcpy(dst, phy_init_data, sizeof(phy_init_data));
((uint8_t*)dst)[107] = __get_adc_mode();
return 0;
}
extern int __get_rf_mode(void) __attribute__((weak));
@ -278,10 +286,16 @@ extern void __run_user_rf_pre_init(void)
return; // default do noting
}
uint32_t user_rf_cal_sector_set(void)
{
spoof_init_data = true;
return flashchip->chip_size/SPI_FLASH_SEC_SIZE - 4;
}
void user_rf_pre_init()
{
// *((volatile uint32_t*) 0x60000710) = 0;
spoof_init_data = false;
volatile uint32_t* rtc_reg = (volatile uint32_t*) 0x60001000;
if((rtc_reg[24] >> 16) > 4) {
rtc_reg[24] &= 0xFFFF;
@ -295,3 +309,7 @@ void user_rf_pre_init()
}
__run_user_rf_pre_init();
}
void ICACHE_RAM_ATTR user_spi_flash_dio_to_qio_pre_init() {}