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https://github.com/esp8266/Arduino.git
synced 2025-07-30 16:24:09 +03:00
[sam] fixing last stupid commit
This commit is contained in:
@ -1,46 +1,33 @@
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/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2009, Atmel Corporation
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/*! \file *********************************************************************
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*
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* All rights reserved.
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* \brief This file contains the default exception handlers.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* \par Purpose
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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/**
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* \file
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* This file contains the default exception handlers.
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* This file provides basic support for Cortex-M processor based
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* microcontrollers.
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*
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* \note
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* The exception handler has weak aliases.
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* As they are weak aliases, any function with the same name will override
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* this definition.
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*/
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*
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support and FAQ: http://support.atmel.no/
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*
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******************************************************************************/
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/* $asf_license$ */
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#include "exceptions.h"
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/*----------------------------------------------------------------------------
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* Exported functions
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*----------------------------------------------------------------------------*/
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/* @cond 0 */
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/**INDENT-OFF**/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**INDENT-ON**/
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/* @endcond */
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#ifdef __GNUC__
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/* Cortex-M3 core handlers */
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@ -88,7 +75,7 @@ extern void USART0_IrqHandler( void ) __attribute__ ((weak, alias ("Dummy_Handle
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extern void USART1_IrqHandler( void ) __attribute__ ((weak, alias ("Dummy_Handler"))) ;
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extern void USBD_IrqHandler( void ) __attribute__ ((weak, alias ("Dummy_Handler"))) ;
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extern void WDT_IrqHandler( void ) __attribute__ ((weak, alias ("Dummy_Handler"))) ;
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#endif // __GNUC__
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#endif /* __GNUC__ */
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#ifdef __ICCARM__
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/* Cortex-M3 core handlers */
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@ -136,12 +123,20 @@ extern void WDT_IrqHandler( void ) __attribute__ ((weak, alias ("Dummy_Handler")
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#pragma weak USART1_IrqHandler=Dummy_Handler
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#pragma weak USBD_IrqHandler=Dummy_Handler
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#pragma weak WDT_IrqHandler=Dummy_Handler
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#endif // __ICCARM__
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#endif /* __ICCARM__ */
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/**
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* \brief Default interrupt handler for not used irq.
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* \brief Default interrupt handler for unused IRQs.
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*/
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void Dummy_Handler( void )
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{
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while ( 1 ) ;
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while ( 1 ) {}
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}
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/* @cond 0 */
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/**INDENT-OFF**/
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#ifdef __cplusplus
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}
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#endif
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/**INDENT-ON**/
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/* @endcond */
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@ -1,50 +1,33 @@
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/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2009, Atmel Corporation
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/*! \file *********************************************************************
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*
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* All rights reserved.
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* \brief This file contains the interface for default exception handlers.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* \par Purpose
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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* This file provides basic support for Cortex-M processor based
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* microcontrollers.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support and FAQ: http://support.atmel.no/
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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******************************************************************************/
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/**
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* \file
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* Interface for default exception handlers.
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*/
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/* $asf_license$ */
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#ifndef _EXCEPTIONS_
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#define _EXCEPTIONS_
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/*----------------------------------------------------------------------------
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* Types
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*----------------------------------------------------------------------------*/
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/* @cond 0 */
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/**INDENT-OFF**/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**INDENT-ON**/
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/* @endcond */
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/* Function prototype for exception table items (interrupt handler). */
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typedef void( *IntFunc )( void ) ;
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/*----------------------------------------------------------------------------
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* Exported functions
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*----------------------------------------------------------------------------*/
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/* Default empty handler */
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extern void Dummy_Handler( void ) ;
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@ -94,5 +77,12 @@ extern void USART1_IrqHandler( void ) ;
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extern void USBD_IrqHandler( void ) ;
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extern void WDT_IrqHandler( void ) ;
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/* @cond 0 */
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/**INDENT-OFF**/
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#ifdef __cplusplus
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}
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#endif
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/**INDENT-ON**/
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/* @endcond */
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#endif /* _EXCEPTIONS_ */
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@ -17,7 +17,7 @@
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*------------------------------------------------------------------------------*/
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#include "exceptions.h"
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#include "sam3sd8.h"
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#include "sam3s8.h"
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#include "system_sam3sd8.h"
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/*----------------------------------------------------------------------------
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@ -1,61 +1,33 @@
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/* ----------------------------------------------------------------------------
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* ATMEL Microcontroller Software Support
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* ----------------------------------------------------------------------------
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* Copyright (c) 2009, Atmel Corporation
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/*! \file *********************************************************************
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*
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* All rights reserved.
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* \brief Provides the low-level initialization functions that called
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* on chip startup.
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*
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* Redistribution and use in source and binary forms, with or without
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* modification, are permitted provided that the following conditions are met:
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* \par Purpose
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*
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* - Redistributions of source code must retain the above copyright notice,
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* this list of conditions and the disclaimer below.
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* This file provides basic support for Cortex-M processor based
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* microcontrollers.
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*
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* Atmel's name may not be used to endorse or promote products derived from
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* this software without specific prior written permission.
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* \author Atmel Corporation: http://www.atmel.com \n
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* Support and FAQ: http://support.atmel.no/
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*
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* DISCLAIMER: THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR
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* IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
|
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* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
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* DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT, INDIRECT,
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* INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
|
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* LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA,
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* OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
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* LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
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* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE,
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* EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
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* ----------------------------------------------------------------------------
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*/
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******************************************************************************/
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/**
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* \file
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*
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* Provides the low-level initialization function that called on chip startup.
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*/
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/*----------------------------------------------------------------------------
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* Headers
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*----------------------------------------------------------------------------*/
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/* $asf_license$ */
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#include "system_sam3sd8.h"
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#include "sam3sd8.h"
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#include "sam3s8.h"
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#include "sam3s_ek2.h"
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/*----------------------------------------------------------------------------
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* Local definitions
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*----------------------------------------------------------------------------*/
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/* @cond 0 */
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/**INDENT-OFF**/
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#ifdef __cplusplus
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extern "C" {
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#endif
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/**INDENT-ON**/
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/* @endcond */
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/* Clock settings at 48MHz */
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#if (BOARD_MCK == 48000000)
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#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8))
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#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
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| CKGR_PLLAR_MULA(0x7) \
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| CKGR_PLLAR_PLLACOUNT(0x3f) \
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| CKGR_PLLAR_DIVA(0x1))
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#define BOARD_MCKR (PMC_MCKR_PRES_CLK_2 | PMC_MCKR_CSS_PLLA_CLK)
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/* Clock settings at 64MHz */
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#elif (BOARD_MCK == 64000000)
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/* Clock settings (64MHz) */
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#define BOARD_OSCOUNT (CKGR_MOR_MOSCXTST(0x8))
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#define BOARD_PLLAR (CKGR_PLLAR_STUCKTO1 \
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| CKGR_PLLAR_MULA(0xf) \
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@ -63,28 +35,20 @@
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| CKGR_PLLAR_DIVA(0x3))
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#define BOARD_MCKR (PMC_MCKR_PRES_CLK | PMC_MCKR_CSS_PLLA_CLK)
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#else
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#error "No settings for current BOARD_MCK."
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#endif
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/* Clock Definitions */
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#define XTAL32 ( 32768UL) /* 32k crystal frequency */
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#define OSC32_CLK ( XTAL32) /* 32k oscillator frequency */
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#define ERC_OSC ( 32000UL) /* Embedded RC oscillator freqquency */
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#define EFRC_OSC ( 4000000UL) /* Embedded fast RC oscillator freq */
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#define MAINCK_XTAL_HZ (12000000UL) /* External crystal frequency */
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#define MCK_HZ (64000000UL) /* Processor frequency */
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/*----------------------------------------------------------------------------
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Define clocks
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*----------------------------------------------------------------------------*/
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#define XTAL32 ( 32768UL) /* 32k crystal frequency */
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#define OSC32_CLK ( XTAL32) /* 32k oscillator frequency */
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#define ERC_OSC ( 32000UL) /* Embedded RC oscillator freqquency */
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#define EFRC_OSC ( 4000000UL) /* Embedded fast RC oscillator freq */
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uint32_t SystemCoreClock = 4000000; // FIXME: default mainck should be generated by sock!!!
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/* FIXME: should be generated by sock */
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uint32_t SystemCoreClock = EFRC_OSC;
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/**
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* Initialize the system
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*
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* @param none
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* @return none
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*
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* @brief Setup the microcontroller system.
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* Initialize the System and update the SystemFrequency variable.
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* \brief Setup the microcontroller system.
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* Initialize the System and update the SystemFrequency variable.
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*/
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extern void SystemInit( void )
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{
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@ -116,8 +80,8 @@ extern void SystemInit( void )
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/* Switch to PLLA */
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PMC->PMC_MCKR = BOARD_MCKR ;
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while (!(PMC->PMC_SR & PMC_SR_MCKRDY));
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SystemCoreClock = BOARD_MCK;
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SystemCoreClock = MCK_HZ;
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}
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extern void SystemCoreClockUpdate( void )
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@ -127,15 +91,15 @@ extern void SystemCoreClockUpdate( void )
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case PMC_MCKR_CSS_SLOW_CLK: /* Slow clock */
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if (SUPC->SUPC_SR & SUPC_SR_OSCSEL)
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SystemCoreClock = OSC32_CLK;
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else
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else
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SystemCoreClock = ERC_OSC;
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break;
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case PMC_MCKR_CSS_MAIN_CLK: /* Main clock */
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if (PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)
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SystemCoreClock = BOARD_OSC_MAINCK_XTAL_HZ;
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SystemCoreClock = MAINCK_XTAL_HZ;
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else {
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SystemCoreClock = EFRC_OSC;
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switch (PMC->CKGR_MOR & CKGR_MOR_MOSCRCF_Msk) {
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case CKGR_MOR_MOSCRCF_4MHz:
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break;
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@ -153,10 +117,10 @@ extern void SystemCoreClockUpdate( void )
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case PMC_MCKR_CSS_PLLA_CLK: /* PLLA clock */
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case PMC_MCKR_CSS_PLLB_CLK: /* PLLB clock */
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if (PMC->CKGR_MOR & CKGR_MOR_MOSCSEL)
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SystemCoreClock = BOARD_OSC_MAINCK_XTAL_HZ;
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SystemCoreClock = MAINCK_XTAL_HZ;
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else {
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SystemCoreClock = EFRC_OSC;
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switch (PMC->CKGR_MOR & CKGR_MOR_MOSCRCF_Msk) {
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case CKGR_MOR_MOSCRCF_4MHz:
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break;
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@ -176,13 +140,21 @@ extern void SystemCoreClockUpdate( void )
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}
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else {
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SystemCoreClock *= ((((PMC->CKGR_PLLBR) >> CKGR_PLLBR_MULB_Pos) & 0x7FF) + 1);
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SystemCoreClock /= ((((PMC->CKGR_PLLBR) >> CKGR_PLLBR_DIVB_Pos) & 0x0FF));
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SystemCoreClock /= ((((PMC->CKGR_PLLBR) >> CKGR_PLLBR_DIVB_Pos) & 0x0FF));
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}
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break;
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}
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if ((PMC->PMC_MCKR & PMC_MCKR_PRES_Msk) == PMC_MCKR_PRES_CLK_3)
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SystemCoreClock /= 3;
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else
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else
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SystemCoreClock >>= ((PMC->PMC_MCKR & PMC_MCKR_PRES_Msk) >> PMC_MCKR_PRES_Pos);
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}
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/* @cond 0 */
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/**INDENT-OFF**/
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#ifdef __cplusplus
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}
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#endif
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/**INDENT-ON**/
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/* @endcond */
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