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[sam] fixing last stupid commit

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Thibaut VIARD
2011-09-06 21:05:41 +02:00
parent 8f01f92e87
commit a5d2349761
550 changed files with 16866 additions and 17198 deletions
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41
hardware/sam/system/libsam/cmsis/sam3s8/include/instance/rtc.h
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@@ -1,20 +1,35 @@
/* %ATMEL_LICENCE% */
/* $asf_license$ */
#ifndef _SAM3S8_RTC_INSTANCE_
#define _SAM3S8_RTC_INSTANCE_
/* ========== Register definition for RTC peripheral ========== */
#define REG_RTC_CR REG_ACCESS(RwReg, 0x400E1460U) /**< \brief (RTC) Control Register */
#define REG_RTC_MR REG_ACCESS(RwReg, 0x400E1464U) /**< \brief (RTC) Mode Register */
#define REG_RTC_TIMR REG_ACCESS(RwReg, 0x400E1468U) /**< \brief (RTC) Time Register */
#define REG_RTC_CALR REG_ACCESS(RwReg, 0x400E146CU) /**< \brief (RTC) Calendar Register */
#define REG_RTC_TIMALR REG_ACCESS(RwReg, 0x400E1470U) /**< \brief (RTC) Time Alarm Register */
#define REG_RTC_CALALR REG_ACCESS(RwReg, 0x400E1474U) /**< \brief (RTC) Calendar Alarm Register */
#define REG_RTC_SR REG_ACCESS(RoReg, 0x400E1478U) /**< \brief (RTC) Status Register */
#define REG_RTC_SCCR REG_ACCESS(WoReg, 0x400E147CU) /**< \brief (RTC) Status Clear Command Register */
#define REG_RTC_IER REG_ACCESS(WoReg, 0x400E1480U) /**< \brief (RTC) Interrupt Enable Register */
#define REG_RTC_IDR REG_ACCESS(WoReg, 0x400E1484U) /**< \brief (RTC) Interrupt Disable Register */
#define REG_RTC_IMR REG_ACCESS(RoReg, 0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */
#define REG_RTC_VER REG_ACCESS(RoReg, 0x400E148CU) /**< \brief (RTC) Valid Entry Register */
#ifdef __ASSEMBLY__
#define REG_RTC_CR (0x400E1460U) /**< \brief (RTC) Control Register */
#define REG_RTC_MR (0x400E1464U) /**< \brief (RTC) Mode Register */
#define REG_RTC_TIMR (0x400E1468U) /**< \brief (RTC) Time Register */
#define REG_RTC_CALR (0x400E146CU) /**< \brief (RTC) Calendar Register */
#define REG_RTC_TIMALR (0x400E1470U) /**< \brief (RTC) Time Alarm Register */
#define REG_RTC_CALALR (0x400E1474U) /**< \brief (RTC) Calendar Alarm Register */
#define REG_RTC_SR (0x400E1478U) /**< \brief (RTC) Status Register */
#define REG_RTC_SCCR (0x400E147CU) /**< \brief (RTC) Status Clear Command Register */
#define REG_RTC_IER (0x400E1480U) /**< \brief (RTC) Interrupt Enable Register */
#define REG_RTC_IDR (0x400E1484U) /**< \brief (RTC) Interrupt Disable Register */
#define REG_RTC_IMR (0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */
#define REG_RTC_VER (0x400E148CU) /**< \brief (RTC) Valid Entry Register */
#else
#define REG_RTC_CR (*(RwReg*)0x400E1460U) /**< \brief (RTC) Control Register */
#define REG_RTC_MR (*(RwReg*)0x400E1464U) /**< \brief (RTC) Mode Register */
#define REG_RTC_TIMR (*(RwReg*)0x400E1468U) /**< \brief (RTC) Time Register */
#define REG_RTC_CALR (*(RwReg*)0x400E146CU) /**< \brief (RTC) Calendar Register */
#define REG_RTC_TIMALR (*(RwReg*)0x400E1470U) /**< \brief (RTC) Time Alarm Register */
#define REG_RTC_CALALR (*(RwReg*)0x400E1474U) /**< \brief (RTC) Calendar Alarm Register */
#define REG_RTC_SR (*(RoReg*)0x400E1478U) /**< \brief (RTC) Status Register */
#define REG_RTC_SCCR (*(WoReg*)0x400E147CU) /**< \brief (RTC) Status Clear Command Register */
#define REG_RTC_IER (*(WoReg*)0x400E1480U) /**< \brief (RTC) Interrupt Enable Register */
#define REG_RTC_IDR (*(WoReg*)0x400E1484U) /**< \brief (RTC) Interrupt Disable Register */
#define REG_RTC_IMR (*(RoReg*)0x400E1488U) /**< \brief (RTC) Interrupt Mask Register */
#define REG_RTC_VER (*(RoReg*)0x400E148CU) /**< \brief (RTC) Valid Entry Register */
#endif /* __ASSEMBLY__ */
#endif /* _SAM3S8_RTC_INSTANCE_ */