mirror of
https://github.com/esp8266/Arduino.git
synced 2025-07-30 16:24:09 +03:00
Basic support for esp8266 platform
This includes empty stubs for most core Arduino functions. Need to actually implement all those digital reads writes whatever. Need to prebuild toolchains (xtensa-elf-lx106) for 3 platforms and put them on some download server. Need to do the same with esptool. Need to fix 0x40000 binary generation and add correct upload commands. Maybe even implement uploads over WiFi.
This commit is contained in:
Ivan Grokhotkov
383
hardware/tools/esp8266/esptool.py
Executable file
383
hardware/tools/esp8266/esptool.py
Executable file
@ -0,0 +1,383 @@
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#!/usr/bin/env python
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#
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# ESP8266 ROM Bootloader Utility
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# https://github.com/themadinventor/esptool
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#
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# Copyright (C) 2014 Fredrik Ahlberg
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#
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# This program is free software; you can redistribute it and/or modify it under
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# the terms of the GNU General Public License as published by the Free Software
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# Foundation; either version 2 of the License, or (at your option) any later version.
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#
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# This program is distributed in the hope that it will be useful, but WITHOUT
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# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
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# FOR A PARTICULAR PURPOSE. See the GNU General Public License for more details.
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#
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# You should have received a copy of the GNU General Public License along with
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# this program; if not, write to the Free Software Foundation, Inc., 51 Franklin
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# Street, Fifth Floor, Boston, MA 02110-1301 USA.
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import sys
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import struct
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import serial
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import math
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import time
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import argparse
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class ESPROM:
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# These are the currently known commands supported by the ROM
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ESP_FLASH_BEGIN = 0x02
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ESP_FLASH_DATA = 0x03
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ESP_FLASH_END = 0x04
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ESP_MEM_BEGIN = 0x05
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ESP_MEM_END = 0x06
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ESP_MEM_DATA = 0x07
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ESP_SYNC = 0x08
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ESP_WRITE_REG = 0x09
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ESP_READ_REG = 0x0a
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# Maximum block sized for RAM and Flash writes, respectively.
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ESP_RAM_BLOCK = 0x1800
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ESP_FLASH_BLOCK = 0x400
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# Default baudrate used by the ROM. Don't know if it is possible to change.
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ESP_ROM_BAUD = 57600
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# First byte of the application image
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ESP_IMAGE_MAGIC = 0xe9
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# Initial state for the checksum routine
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ESP_CHECKSUM_MAGIC = 0xef
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def __init__(self, port = 0):
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self._port = serial.Serial(port, self.ESP_ROM_BAUD)
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""" Read bytes from the serial port while performing SLIP unescaping """
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def read(self, length = 1):
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b = ''
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while len(b) < length:
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c = self._port.read(1)
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if c == '\xdb':
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c = self._port.read(1)
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if c == '\xdc':
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b = b + '\xc0'
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elif c == '\xdd':
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b = b + '\xdb'
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else:
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raise Exception('Invalid SLIP escape')
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else:
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b = b + c
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return b
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""" Write bytes to the serial port while performing SLIP escaping """
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def write(self, packet):
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buf = '\xc0'
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for b in packet:
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if b == '\xc0':
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buf += '\xdb\xdc'
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elif b == '\xdb':
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buf += '\xdb\xdd'
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else:
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buf += b
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buf += '\xc0'
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self._port.write(buf)
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""" Calculate checksum of a blob, as it is defined by the ROM """
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@staticmethod
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def checksum(data, state = ESP_CHECKSUM_MAGIC):
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for b in data:
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state ^= ord(b)
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return state
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""" Send a request and read the response """
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def command(self, op = None, data = None, chk = 0):
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if op:
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# Construct and send request
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pkt = struct.pack('<BBHI', 0x00, op, len(data), chk) + data
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self.write(pkt)
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# Read header of response and parse
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if self._port.read(1) != '\xc0':
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raise Exception('Invalid head of packet')
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hdr = self.read(8)
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(resp, op_ret, len_ret, val) = struct.unpack('<BBHI', hdr)
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if resp != 0x01 or (op and op_ret != op):
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raise Exception('Invalid response')
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# The variable-length body
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body = self.read(len_ret)
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# Terminating byte
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if self._port.read(1) != chr(0xc0):
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raise Exception('Invalid end of packet')
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return val, body
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""" Perform a connection test """
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def sync(self):
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self.command(ESPROM.ESP_SYNC, '\x07\x07\x12\x20'+32*'\x55')
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for i in xrange(7):
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self.command()
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""" Try connecting repeatedly until successful, or giving up """
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def connect(self):
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print 'Connecting'
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self._port.timeout = 0.2
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for i in xrange(10):
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try:
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#self._port.setBreak(True)
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#time.sleep(0.1)
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#self._port.setDTR(False)
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#time.sleep(0.1)
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#self._port.setDTR(True)
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#time.sleep(0.7)
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#self._port.setBreak(False)
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#time.sleep(0.1)
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self._port.flushInput()
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self._port.flushOutput()
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self.sync()
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self._port.timeout = 1
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return
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except:
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time.sleep(0.1)
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raise Exception('Failed to connect')
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""" Read memory address in target """
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def read_reg(self, addr):
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res = self.command(ESPROM.ESP_READ_REG, struct.pack('<I', addr))
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if res[1] != "\0\0":
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raise Exception('Failed to read target memory')
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return res[0]
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""" Write to memory address in target """
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def write_reg(self, addr, value, mask, delay_us = 0):
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if self.command(ESPROM.ESP_WRITE_REG,
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struct.pack('<IIII', addr, value, mask, delay_us))[1] != "\0\0":
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raise Exception('Failed to write target memory')
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""" Start downloading an application image to RAM """
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def mem_begin(self, size, blocks, blocksize, offset):
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if self.command(ESPROM.ESP_MEM_BEGIN,
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struct.pack('<IIII', size, blocks, blocksize, offset))[1] != "\0\0":
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raise Exception('Failed to enter RAM download mode')
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""" Send a block of an image to RAM """
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def mem_block(self, data, seq):
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if self.command(ESPROM.ESP_MEM_DATA,
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struct.pack('<IIII', len(data), seq, 0, 0)+data, ESPROM.checksum(data))[1] != "\0\0":
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raise Exception('Failed to write to target RAM')
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""" Leave download mode and run the application """
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def mem_finish(self, entrypoint = 0):
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if self.command(ESPROM.ESP_MEM_END,
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struct.pack('<II', int(entrypoint == 0), entrypoint))[1] != "\0\0":
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raise Exception('Failed to leave RAM download mode')
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""" Start downloading to Flash (performs an erase) """
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def flash_begin(self, size, offset):
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old_tmo = self._port.timeout
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self._port.timeout = 10
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if self.command(ESPROM.ESP_FLASH_BEGIN,
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struct.pack('<IIII', size, 0x200, 0x400, offset))[1] != "\0\0":
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raise Exception('Failed to enter Flash download mode')
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self._port.timeout = old_tmo
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""" Write block to flash """
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def flash_block(self, data, seq):
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if self.command(ESPROM.ESP_FLASH_DATA,
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struct.pack('<IIII', len(data), seq, 0, 0)+data, ESPROM.checksum(data))[1] != "\0\0":
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raise Exception('Failed to write to target Flash')
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""" Leave flash mode and run/reboot """
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def flash_finish(self, reboot = False):
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if self.command(ESPROM.ESP_FLASH_END,
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struct.pack('<I', int(not reboot)))[1] != "\0\0":
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raise Exception('Failed to leave Flash mode')
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class ESPFirmwareImage:
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def __init__(self, filename = None):
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self.segments = []
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self.entrypoint = 0
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if filename is not None:
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f = file(filename, 'rb')
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(magic, segments, _, _, self.entrypoint) = struct.unpack('<BBBBI', f.read(8))
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# some sanity check
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if magic != ESPROM.ESP_IMAGE_MAGIC or segments > 16:
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raise Exception('Invalid firmware image')
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for i in xrange(segments):
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(offset, size) = struct.unpack('<II', f.read(8))
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if offset > 0x40200000 or offset < 0x3ffe0000 or size > 65536:
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raise Exception('Suspicious segment %x,%d' % (offset, size))
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self.segments.append((offset, size, f.read(size)))
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# Skip the padding. The checksum is stored in the last byte so that the
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# file is a multiple of 16 bytes.
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align = 15-(f.tell() % 16)
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f.seek(align, 1)
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self.checksum = ord(f.read(1))
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def add_segment(self, addr, data):
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self.segments.append((addr, len(data), data))
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def save(self, filename):
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f = file(filename, 'wb')
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f.write(struct.pack('<BBBBI', ESPROM.ESP_IMAGE_MAGIC, len(self.segments), 0, 0, self.entrypoint))
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checksum = ESPROM.ESP_CHECKSUM_MAGIC
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for (offset, size, data) in self.segments:
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f.write(struct.pack('<II', offset, size))
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f.write(data)
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checksum = ESPROM.checksum(data, checksum)
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align = 15-(f.tell() % 16)
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f.seek(align, 1)
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f.write(struct.pack('B', checksum))
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def arg_auto_int(x):
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return int(x, 0)
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if __name__ == '__main__':
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parser = argparse.ArgumentParser(description = 'ESP8266 ROM Bootloader Utility', prog = 'esptool')
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parser.add_argument(
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'--port', '-p',
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help = 'Serial port device',
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default = '/dev/ttyUSB0')
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subparsers = parser.add_subparsers(
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dest = 'operation',
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help = 'Run esptool {command} -h for additional help')
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parser_load_ram = subparsers.add_parser(
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'load_ram',
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help = 'Download an image to RAM and execute')
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parser_load_ram.add_argument('filename', help = 'Firmware image')
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parser_dump_mem = subparsers.add_parser(
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'dump_mem',
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help = 'Dump arbitrary memory to disk')
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parser_dump_mem.add_argument('address', help = 'Base address', type = arg_auto_int)
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parser_dump_mem.add_argument('size', help = 'Size of region to dump', type = arg_auto_int)
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parser_dump_mem.add_argument('filename', help = 'Name of binary dump')
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parser_read_mem = subparsers.add_parser(
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'read_mem',
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help = 'Read arbitrary memory location')
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parser_read_mem.add_argument('address', help = 'Address to read', type = arg_auto_int)
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parser_write_mem = subparsers.add_parser(
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'write_mem',
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help = 'Read-modify-write to arbitrary memory location')
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parser_write_mem.add_argument('address', help = 'Address to write', type = arg_auto_int)
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parser_write_mem.add_argument('value', help = 'Value', type = arg_auto_int)
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parser_write_mem.add_argument('mask', help = 'Mask of bits to write', type = arg_auto_int)
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parser_write_flash = subparsers.add_parser(
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'write_flash',
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help = 'Write a binary blob to flash')
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parser_write_flash.add_argument('address', help = 'Base address, 4KiB-aligned', type = arg_auto_int)
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parser_write_flash.add_argument('filename', help = 'Binary file to write')
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parser_image_info = subparsers.add_parser(
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'image_info',
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help = 'Dump headers from an application image')
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parser_image_info.add_argument('filename', help = 'Image file to parse')
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parser_make_image = subparsers.add_parser(
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'make_image',
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help = 'Create an application image from binary files')
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parser_make_image.add_argument('output', help = 'Output image file')
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parser_make_image.add_argument('--segfile', '-f', action = 'append', help = 'Segment input file')
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parser_make_image.add_argument('--segaddr', '-a', action = 'append', help = 'Segment base address', type = arg_auto_int)
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parser_make_image.add_argument('--entrypoint', '-e', help = 'Address of entry point', type = arg_auto_int, default = 0)
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args = parser.parse_args()
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# Create the ESPROM connection object, if needed
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esp = None
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if args.operation not in ('image_info','make_image'):
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esp = ESPROM(args.port)
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esp.connect()
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# Do the actual work. Should probably be split into separate functions.
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if args.operation == 'load_ram':
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image = ESPFirmwareImage(args.filename)
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print 'RAM boot...'
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for (offset, size, data) in image.segments:
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print 'Downloading %d bytes at %08x...' % (size, offset),
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sys.stdout.flush()
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esp.mem_begin(size, math.ceil(size / float(esp.ESP_RAM_BLOCK)), esp.ESP_RAM_BLOCK, offset)
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seq = 0
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while len(data) > 0:
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esp.mem_block(data[0:esp.ESP_RAM_BLOCK], seq)
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data = data[esp.ESP_RAM_BLOCK:]
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seq += 1
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print 'done!'
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print 'All segments done, executing at %08x' % image.entrypoint
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esp.mem_finish(image.entrypoint)
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elif args.operation == 'read_mem':
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print '0x%08x = 0x%08x' % (args.address, esp.read_reg(args.address))
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elif args.operation == 'write_mem':
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esp.write_reg(args.address, args.value, args.mask, 0)
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print 'Wrote %08x, mask %08x to %08x' % (args.value, args.mask, args.address)
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elif args.operation == 'dump_mem':
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f = file(args.filename, 'wb')
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for i in xrange(args.size/4):
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d = esp.read_reg(args.address+(i*4))
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f.write(struct.pack('<I', d))
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if f.tell() % 1024 == 0:
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print '\r%d bytes read... (%d %%)' % (f.tell(), f.tell()*100/args.size),
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sys.stdout.flush()
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print 'Done!'
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elif args.operation == 'write_flash':
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image = file(args.filename, 'rb').read()
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print 'Erasing flash...'
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esp.flash_begin(len(image), args.address)
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seq = 0
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blocks = math.ceil(len(image)/esp.ESP_FLASH_BLOCK)
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while len(image) > 0:
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print '\rWriting at 0x%08x... (%d %%)' % (args.address + seq*esp.ESP_FLASH_BLOCK, 100*seq/blocks),
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sys.stdout.flush()
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esp.flash_block(image[0:esp.ESP_FLASH_BLOCK], seq)
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image = image[esp.ESP_FLASH_BLOCK:]
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seq += 1
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print '\nLeaving...'
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esp.flash_finish(False)
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elif args.operation == 'image_info':
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image = ESPFirmwareImage(args.filename)
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print ('Entry point: %08x' % image.entrypoint) if image.entrypoint != 0 else 'Entry point not set'
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print '%d segments' % len(image.segments)
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print
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checksum = ESPROM.ESP_CHECKSUM_MAGIC
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for (idx, (offset, size, data)) in enumerate(image.segments):
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print 'Segment %d: %5d bytes at %08x' % (idx+1, size, offset)
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checksum = ESPROM.checksum(data, checksum)
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print
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print 'Checksum: %02x (%s)' % (image.checksum, 'valid' if image.checksum == checksum else 'invalid!')
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elif args.operation == 'make_image':
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image = ESPFirmwareImage()
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if len(args.segfile) == 0:
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raise Exception('No segments specified')
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if len(args.segfile) != len(args.segaddr):
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raise Exception('Number of specified files does not match number of specified addresses')
|
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for (seg, addr) in zip(args.segfile, args.segaddr):
|
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data = file(seg, 'rb').read()
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image.add_segment(addr, data)
|
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image.entrypoint = args.entrypoint
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image.save(args.output)
|
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92
hardware/tools/esp8266/sdk/include/c_types.h
Executable file
92
hardware/tools/esp8266/sdk/include/c_types.h
Executable file
@ -0,0 +1,92 @@
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/*
|
||||
* Copyright (c) 2010 - 2011 Espressif System
|
||||
*
|
||||
*/
|
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|
||||
#ifndef _C_TYPES_H_
|
||||
#define _C_TYPES_H_
|
||||
#include <stdint.h>
|
||||
|
||||
// typedef unsigned char uint8_t;
|
||||
typedef signed char sint8_t;
|
||||
// typedef signed char int8_t;
|
||||
// typedef unsigned short uint16_t;
|
||||
typedef signed short sint16_t;
|
||||
// typedef signed short int16_t;
|
||||
// typedef unsigned long uint32_t;
|
||||
typedef signed long sint32_t;
|
||||
// typedef signed long int32_t;
|
||||
typedef signed long long sint64_t;
|
||||
// typedef unsigned long long uint64_t;
|
||||
typedef unsigned long long u_int64_t;
|
||||
typedef float real32_t;
|
||||
typedef double real64_t;
|
||||
|
||||
typedef unsigned char uint8;
|
||||
typedef unsigned char u8;
|
||||
typedef signed char sint8;
|
||||
typedef signed char int8;
|
||||
typedef signed char s8;
|
||||
typedef unsigned short uint16;
|
||||
typedef unsigned short u16;
|
||||
typedef signed short sint16;
|
||||
typedef signed short s16;
|
||||
typedef unsigned int uint32;
|
||||
typedef unsigned int u_int;
|
||||
typedef unsigned int u32;
|
||||
typedef signed int sint32;
|
||||
typedef signed int s32;
|
||||
typedef int int32;
|
||||
typedef signed long long sint64;
|
||||
typedef unsigned long long uint64;
|
||||
typedef unsigned long long u64;
|
||||
typedef float real32;
|
||||
typedef double real64;
|
||||
|
||||
#define __le16 u16
|
||||
|
||||
//typedef unsigned int size_t;
|
||||
|
||||
#define __packed __attribute__((packed))
|
||||
|
||||
#define LOCAL static
|
||||
|
||||
#ifndef NULL
|
||||
#define NULL (void *)0
|
||||
#endif /* NULL */
|
||||
|
||||
/* probably should not put STATUS here */
|
||||
typedef enum {
|
||||
OK = 0,
|
||||
FAIL,
|
||||
PENDING,
|
||||
BUSY,
|
||||
CANCEL,
|
||||
} STATUS;
|
||||
|
||||
#define BIT(nr) (1UL << (nr))
|
||||
|
||||
#define REG_SET_BIT(_r, _b) (*(volatile uint32_t*)(_r) |= (_b))
|
||||
#define REG_CLR_BIT(_r, _b) (*(volatile uint32_t*)(_r) &= ~(_b))
|
||||
|
||||
#define DMEM_ATTR __attribute__((section(".bss")))
|
||||
#define SHMEM_ATTR
|
||||
|
||||
#ifdef ICACHE_FLASH
|
||||
#define ICACHE_FLASH_ATTR __attribute__((section(".irom0.text")))
|
||||
#else
|
||||
#define ICACHE_FLASH_ATTR
|
||||
#endif /* ICACHE_FLASH */
|
||||
|
||||
#ifndef __cplusplus
|
||||
typedef unsigned char bool;
|
||||
#define BOOL bool
|
||||
#define true (1)
|
||||
#define false (0)
|
||||
#define TRUE true
|
||||
#define FALSE false
|
||||
|
||||
|
||||
#endif /* !__cplusplus */
|
||||
|
||||
#endif /* _C_TYPES_H_ */
|
||||
255
hardware/tools/esp8266/sdk/include/eagle_soc.h
Executable file
255
hardware/tools/esp8266/sdk/include/eagle_soc.h
Executable file
@ -0,0 +1,255 @@
|
||||
/*
|
||||
* Copyright (c) Espressif System 2010 - 2012
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _EAGLE_SOC_H_
|
||||
#define _EAGLE_SOC_H_
|
||||
|
||||
//Register Bits{{
|
||||
#define BIT31 0x80000000
|
||||
#define BIT30 0x40000000
|
||||
#define BIT29 0x20000000
|
||||
#define BIT28 0x10000000
|
||||
#define BIT27 0x08000000
|
||||
#define BIT26 0x04000000
|
||||
#define BIT25 0x02000000
|
||||
#define BIT24 0x01000000
|
||||
#define BIT23 0x00800000
|
||||
#define BIT22 0x00400000
|
||||
#define BIT21 0x00200000
|
||||
#define BIT20 0x00100000
|
||||
#define BIT19 0x00080000
|
||||
#define BIT18 0x00040000
|
||||
#define BIT17 0x00020000
|
||||
#define BIT16 0x00010000
|
||||
#define BIT15 0x00008000
|
||||
#define BIT14 0x00004000
|
||||
#define BIT13 0x00002000
|
||||
#define BIT12 0x00001000
|
||||
#define BIT11 0x00000800
|
||||
#define BIT10 0x00000400
|
||||
#define BIT9 0x00000200
|
||||
#define BIT8 0x00000100
|
||||
#define BIT7 0x00000080
|
||||
#define BIT6 0x00000040
|
||||
#define BIT5 0x00000020
|
||||
#define BIT4 0x00000010
|
||||
#define BIT3 0x00000008
|
||||
#define BIT2 0x00000004
|
||||
#define BIT1 0x00000002
|
||||
#define BIT0 0x00000001
|
||||
//}}
|
||||
|
||||
//Registers Operation {{
|
||||
#define ETS_UNCACHED_ADDR(addr) (addr)
|
||||
#define ETS_CACHED_ADDR(addr) (addr)
|
||||
|
||||
|
||||
#define READ_PERI_REG(addr) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr)))
|
||||
#define WRITE_PERI_REG(addr, val) (*((volatile uint32_t *)ETS_UNCACHED_ADDR(addr))) = (uint32_t)(val)
|
||||
#define CLEAR_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)&(~(mask))))
|
||||
#define SET_PERI_REG_MASK(reg, mask) WRITE_PERI_REG((reg), (READ_PERI_REG(reg)|(mask)))
|
||||
#define GET_PERI_REG_BITS(reg, hipos,lowpos) ((READ_PERI_REG(reg)>>(lowpos))&((1<<((hipos)-(lowpos)+1))-1))
|
||||
#define SET_PERI_REG_BITS(reg,bit_map,value,shift) (WRITE_PERI_REG((reg),(READ_PERI_REG(reg)&(~((bit_map)<<(shift))))|((value)<<(shift)) ))
|
||||
//}}
|
||||
|
||||
//Periheral Clock {{
|
||||
#define CPU_CLK_FREQ 80*1000000 //unit: Hz
|
||||
#define APB_CLK_FREQ CPU_CLK_FREQ
|
||||
#define UART_CLK_FREQ APB_CLK_FREQ
|
||||
#define TIMER_CLK_FREQ (APB_CLK_FREQ>>8) //divided by 256
|
||||
//}}
|
||||
|
||||
//Peripheral device base address define{{
|
||||
#define PERIPHS_DPORT_BASEADDR 0x3ff00000
|
||||
#define PERIPHS_GPIO_BASEADDR 0x60000300
|
||||
#define PERIPHS_TIMER_BASEDDR 0x60000600
|
||||
#define PERIPHS_RTC_BASEADDR 0x60000700
|
||||
#define PERIPHS_IO_MUX 0x60000800
|
||||
//}}
|
||||
|
||||
//Interrupt remap control registers define{{
|
||||
#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR+0x04)
|
||||
#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
|
||||
#define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
|
||||
//}}
|
||||
|
||||
//GPIO reg {{
|
||||
#define GPIO_REG_READ(reg) READ_PERI_REG(PERIPHS_GPIO_BASEADDR + reg)
|
||||
#define GPIO_REG_WRITE(reg, val) WRITE_PERI_REG(PERIPHS_GPIO_BASEADDR + reg, val)
|
||||
#define GPIO_OUT_ADDRESS 0x00
|
||||
#define GPIO_OUT_W1TS_ADDRESS 0x04
|
||||
#define GPIO_OUT_W1TC_ADDRESS 0x08
|
||||
|
||||
#define GPIO_ENABLE_ADDRESS 0x0c
|
||||
#define GPIO_ENABLE_W1TS_ADDRESS 0x10
|
||||
#define GPIO_ENABLE_W1TC_ADDRESS 0x14
|
||||
#define GPIO_OUT_W1TC_DATA_MASK 0x0000ffff
|
||||
|
||||
#define GPIO_IN_ADDRESS 0x18
|
||||
|
||||
#define GPIO_STATUS_ADDRESS 0x1c
|
||||
#define GPIO_STATUS_W1TS_ADDRESS 0x20
|
||||
#define GPIO_STATUS_W1TC_ADDRESS 0x24
|
||||
#define GPIO_STATUS_INTERRUPT_MASK 0x0000ffff
|
||||
|
||||
#define GPIO_RTC_CALIB_SYNC PERIPHS_GPIO_BASEADDR+0x6c
|
||||
#define RTC_CALIB_START BIT31 //first write to zero, then to one to start
|
||||
#define RTC_PERIOD_NUM_MASK 0x3ff //max 8ms
|
||||
#define GPIO_RTC_CALIB_VALUE PERIPHS_GPIO_BASEADDR+0x70
|
||||
#define RTC_CALIB_RDY_S 31 //after measure, flag to one, when start from zero to one, turn to zero
|
||||
#define RTC_CALIB_VALUE_MASK 0xfffff
|
||||
|
||||
#define GPIO_PIN0_ADDRESS 0x28
|
||||
|
||||
#define GPIO_ID_PIN0 0
|
||||
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
|
||||
#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15)
|
||||
#define GPIO_ID_NONE 0xffffffff
|
||||
|
||||
#define GPIO_PIN_COUNT 16
|
||||
|
||||
#define GPIO_PIN_CONFIG_MSB 12
|
||||
#define GPIO_PIN_CONFIG_LSB 11
|
||||
#define GPIO_PIN_CONFIG_MASK 0x00001800
|
||||
#define GPIO_PIN_CONFIG_GET(x) (((x) & GPIO_PIN_CONFIG_MASK) >> GPIO_PIN_CONFIG_LSB)
|
||||
#define GPIO_PIN_CONFIG_SET(x) (((x) << GPIO_PIN_CONFIG_LSB) & GPIO_PIN_CONFIG_MASK)
|
||||
|
||||
#define GPIO_WAKEUP_ENABLE 1
|
||||
#define GPIO_WAKEUP_DISABLE (~GPIO_WAKEUP_ENABLE)
|
||||
#define GPIO_PIN_WAKEUP_ENABLE_MSB 10
|
||||
#define GPIO_PIN_WAKEUP_ENABLE_LSB 10
|
||||
#define GPIO_PIN_WAKEUP_ENABLE_MASK 0x00000400
|
||||
#define GPIO_PIN_WAKEUP_ENABLE_GET(x) (((x) & GPIO_PIN_WAKEUP_ENABLE_MASK) >> GPIO_PIN_WAKEUP_ENABLE_LSB)
|
||||
#define GPIO_PIN_WAKEUP_ENABLE_SET(x) (((x) << GPIO_PIN_WAKEUP_ENABLE_LSB) & GPIO_PIN_WAKEUP_ENABLE_MASK)
|
||||
|
||||
#define GPIO_PIN_INT_TYPE_MASK 0x380
|
||||
#define GPIO_PIN_INT_TYPE_MSB 9
|
||||
#define GPIO_PIN_INT_TYPE_LSB 7
|
||||
#define GPIO_PIN_INT_TYPE_GET(x) (((x) & GPIO_PIN_INT_TYPE_MASK) >> GPIO_PIN_INT_TYPE_LSB)
|
||||
#define GPIO_PIN_INT_TYPE_SET(x) (((x) << GPIO_PIN_INT_TYPE_LSB) & GPIO_PIN_INT_TYPE_MASK)
|
||||
|
||||
#define GPIO_PAD_DRIVER_ENABLE 1
|
||||
#define GPIO_PAD_DRIVER_DISABLE (~GPIO_PAD_DRIVER_ENABLE)
|
||||
#define GPIO_PIN_PAD_DRIVER_MSB 2
|
||||
#define GPIO_PIN_PAD_DRIVER_LSB 2
|
||||
#define GPIO_PIN_PAD_DRIVER_MASK 0x00000004
|
||||
#define GPIO_PIN_PAD_DRIVER_GET(x) (((x) & GPIO_PIN_PAD_DRIVER_MASK) >> GPIO_PIN_PAD_DRIVER_LSB)
|
||||
#define GPIO_PIN_PAD_DRIVER_SET(x) (((x) << GPIO_PIN_PAD_DRIVER_LSB) & GPIO_PIN_PAD_DRIVER_MASK)
|
||||
|
||||
#define GPIO_AS_PIN_SOURCE 0
|
||||
#define SIGMA_AS_PIN_SOURCE (~GPIO_AS_PIN_SOURCE)
|
||||
#define GPIO_PIN_SOURCE_MSB 0
|
||||
#define GPIO_PIN_SOURCE_LSB 0
|
||||
#define GPIO_PIN_SOURCE_MASK 0x00000001
|
||||
#define GPIO_PIN_SOURCE_GET(x) (((x) & GPIO_PIN_SOURCE_MASK) >> GPIO_PIN_SOURCE_LSB)
|
||||
#define GPIO_PIN_SOURCE_SET(x) (((x) << GPIO_PIN_SOURCE_LSB) & GPIO_PIN_SOURCE_MASK)
|
||||
// }}
|
||||
|
||||
// TIMER reg {{
|
||||
#define RTC_REG_READ(addr) READ_PERI_REG(PERIPHS_TIMER_BASEDDR + addr)
|
||||
#define RTC_REG_WRITE(addr, val) WRITE_PERI_REG(PERIPHS_TIMER_BASEDDR + addr, val)
|
||||
#define RTC_CLR_REG_MASK(reg, mask) CLEAR_PERI_REG_MASK(PERIPHS_TIMER_BASEDDR +reg, mask)
|
||||
/* Returns the current time according to the timer timer. */
|
||||
#define NOW() RTC_REG_READ(FRC2_COUNT_ADDRESS)
|
||||
|
||||
//load initial_value to timer1
|
||||
#define FRC1_LOAD_ADDRESS 0x00
|
||||
|
||||
//timer1's counter value(count from initial_value to 0)
|
||||
#define FRC1_COUNT_ADDRESS 0x04
|
||||
|
||||
#define FRC1_CTRL_ADDRESS 0x08
|
||||
|
||||
//clear timer1's interrupt when write this address
|
||||
#define FRC1_INT_ADDRESS 0x0c
|
||||
#define FRC1_INT_CLR_MASK 0x00000001
|
||||
|
||||
//timer2's counter value(count from initial_value to 0)
|
||||
#define FRC2_COUNT_ADDRESS 0x24
|
||||
// }}
|
||||
|
||||
//RTC reg {{
|
||||
#define REG_RTC_BASE PERIPHS_RTC_BASEADDR
|
||||
|
||||
#define RTC_GPIO_OUT (REG_RTC_BASE + 0x068)
|
||||
#define RTC_GPIO_ENABLE (REG_RTC_BASE + 0x074)
|
||||
#define RTC_GPIO_IN_DATA (REG_RTC_BASE + 0x08C)
|
||||
#define RTC_GPIO_CONF (REG_RTC_BASE + 0x090)
|
||||
#define PAD_XPD_DCDC_CONF (REG_RTC_BASE + 0x0A0)
|
||||
//}}
|
||||
|
||||
//PIN Mux reg {{
|
||||
#define PERIPHS_IO_MUX_FUNC 0x13
|
||||
#define PERIPHS_IO_MUX_FUNC_S 4
|
||||
#define PERIPHS_IO_MUX_PULLUP BIT7
|
||||
#define PERIPHS_IO_MUX_PULLDWN BIT6
|
||||
#define PERIPHS_IO_MUX_SLEEP_PULLUP BIT3
|
||||
#define PERIPHS_IO_MUX_SLEEP_PULLDWN BIT2
|
||||
#define PERIPHS_IO_MUX_SLEEP_OE BIT1
|
||||
#define PERIPHS_IO_MUX_OE BIT0
|
||||
|
||||
#define PERIPHS_IO_MUX_CONF_U (PERIPHS_IO_MUX + 0x00)
|
||||
#define SPI0_CLK_EQU_SYS_CLK BIT8
|
||||
#define SPI1_CLK_EQU_SYS_CLK BIT9
|
||||
#define PERIPHS_IO_MUX_MTDI_U (PERIPHS_IO_MUX + 0x04)
|
||||
#define FUNC_GPIO12 3
|
||||
#define PERIPHS_IO_MUX_MTCK_U (PERIPHS_IO_MUX + 0x08)
|
||||
#define FUNC_GPIO13 3
|
||||
#define PERIPHS_IO_MUX_MTMS_U (PERIPHS_IO_MUX + 0x0C)
|
||||
#define FUNC_GPIO14 3
|
||||
#define PERIPHS_IO_MUX_MTDO_U (PERIPHS_IO_MUX + 0x10)
|
||||
#define FUNC_GPIO15 3
|
||||
#define FUNC_U0RTS 4
|
||||
#define PERIPHS_IO_MUX_U0RXD_U (PERIPHS_IO_MUX + 0x14)
|
||||
#define FUNC_GPIO3 3
|
||||
#define PERIPHS_IO_MUX_U0TXD_U (PERIPHS_IO_MUX + 0x18)
|
||||
#define FUNC_U0TXD 0
|
||||
#define FUNC_GPIO1 3
|
||||
#define PERIPHS_IO_MUX_SD_CLK_U (PERIPHS_IO_MUX + 0x1c)
|
||||
#define FUNC_SDCLK 0
|
||||
#define FUNC_SPICLK 1
|
||||
#define PERIPHS_IO_MUX_SD_DATA0_U (PERIPHS_IO_MUX + 0x20)
|
||||
#define FUNC_SDDATA0 0
|
||||
#define FUNC_SPIQ 1
|
||||
#define FUNC_U1TXD 4
|
||||
#define PERIPHS_IO_MUX_SD_DATA1_U (PERIPHS_IO_MUX + 0x24)
|
||||
#define FUNC_SDDATA1 0
|
||||
#define FUNC_SPID 1
|
||||
#define FUNC_U1RXD 4
|
||||
#define FUNC_SDDATA1_U1RXD 7
|
||||
#define PERIPHS_IO_MUX_SD_DATA2_U (PERIPHS_IO_MUX + 0x28)
|
||||
#define FUNC_SDDATA2 0
|
||||
#define FUNC_SPIHD 1
|
||||
#define FUNC_GPIO9 3
|
||||
#define PERIPHS_IO_MUX_SD_DATA3_U (PERIPHS_IO_MUX + 0x2c)
|
||||
#define FUNC_SDDATA3 0
|
||||
#define FUNC_SPIWP 1
|
||||
#define FUNC_GPIO10 3
|
||||
#define PERIPHS_IO_MUX_SD_CMD_U (PERIPHS_IO_MUX + 0x30)
|
||||
#define FUNC_SDCMD 0
|
||||
#define FUNC_SPICS0 1
|
||||
#define PERIPHS_IO_MUX_GPIO0_U (PERIPHS_IO_MUX + 0x34)
|
||||
#define FUNC_GPIO0 0
|
||||
#define PERIPHS_IO_MUX_GPIO2_U (PERIPHS_IO_MUX + 0x38)
|
||||
#define FUNC_GPIO2 0
|
||||
#define FUNC_U1TXD_BK 2
|
||||
#define FUNC_U0TXD_BK 4
|
||||
#define PERIPHS_IO_MUX_GPIO4_U (PERIPHS_IO_MUX + 0x3C)
|
||||
#define FUNC_GPIO4 0
|
||||
#define PERIPHS_IO_MUX_GPIO5_U (PERIPHS_IO_MUX + 0x40)
|
||||
#define FUNC_GPIO5 0
|
||||
|
||||
#define PIN_PULLUP_DIS(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP)
|
||||
#define PIN_PULLUP_EN(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLUP)
|
||||
#define PIN_PULLDWN_DIS(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLDWN)
|
||||
#define PIN_PULLDWN_EN(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME, PERIPHS_IO_MUX_PULLDWN)
|
||||
#define PIN_FUNC_SELECT(PIN_NAME, FUNC) do { \
|
||||
CLEAR_PERI_REG_MASK(PIN_NAME, (PERIPHS_IO_MUX_FUNC<<PERIPHS_IO_MUX_FUNC_S)); \
|
||||
SET_PERI_REG_MASK(PIN_NAME, (((FUNC&BIT2)<<2)|(FUNC&0x3))<<PERIPHS_IO_MUX_FUNC_S); \
|
||||
} while (0)
|
||||
|
||||
//}}
|
||||
|
||||
#endif //_EAGLE_SOC_H_
|
||||
321
hardware/tools/esp8266/sdk/include/espconn.h
Executable file
321
hardware/tools/esp8266/sdk/include/espconn.h
Executable file
@ -0,0 +1,321 @@
|
||||
#ifndef __ESPCONN_H__
|
||||
#define __ESPCONN_H__
|
||||
|
||||
typedef sint8 err_t;
|
||||
|
||||
typedef void *espconn_handle;
|
||||
typedef void (* espconn_connect_callback)(void *arg);
|
||||
typedef void (* espconn_reconnect_callback)(void *arg, sint8 err);
|
||||
|
||||
/* Definitions for error constants. */
|
||||
|
||||
#define ESPCONN_OK 0 /* No error, everything OK. */
|
||||
#define ESPCONN_MEM -1 /* Out of memory error. */
|
||||
#define ESPCONN_TIMEOUT -3 /* Timeout. */
|
||||
#define ESPCONN_RTE -4 /* Routing problem. */
|
||||
#define ESPCONN_INPROGRESS -5 /* Operation in progress */
|
||||
|
||||
#define ESPCONN_ABRT -8 /* Connection aborted. */
|
||||
#define ESPCONN_RST -9 /* Connection reset. */
|
||||
#define ESPCONN_CLSD -10 /* Connection closed. */
|
||||
#define ESPCONN_CONN -11 /* Not connected. */
|
||||
|
||||
#define ESPCONN_ARG -12 /* Illegal argument. */
|
||||
#define ESPCONN_ISCONN -15 /* Already connected. */
|
||||
|
||||
/** Protocol family and type of the espconn */
|
||||
enum espconn_type {
|
||||
ESPCONN_INVALID = 0,
|
||||
/* ESPCONN_TCP Group */
|
||||
ESPCONN_TCP = 0x10,
|
||||
/* ESPCONN_UDP Group */
|
||||
ESPCONN_UDP = 0x20,
|
||||
};
|
||||
|
||||
/** Current state of the espconn. Non-TCP espconn are always in state ESPCONN_NONE! */
|
||||
enum espconn_state {
|
||||
ESPCONN_NONE,
|
||||
ESPCONN_WAIT,
|
||||
ESPCONN_LISTEN,
|
||||
ESPCONN_CONNECT,
|
||||
ESPCONN_WRITE,
|
||||
ESPCONN_READ,
|
||||
ESPCONN_CLOSE
|
||||
};
|
||||
|
||||
typedef struct _esp_tcp {
|
||||
int remote_port;
|
||||
int local_port;
|
||||
uint8 local_ip[4];
|
||||
uint8 remote_ip[4];
|
||||
espconn_connect_callback connect_callback;
|
||||
espconn_reconnect_callback reconnect_callback;
|
||||
espconn_connect_callback disconnect_callback;
|
||||
} esp_tcp;
|
||||
|
||||
typedef struct _esp_udp {
|
||||
int remote_port;
|
||||
int local_port;
|
||||
uint8 local_ip[4];
|
||||
uint8 remote_ip[4];
|
||||
} esp_udp;
|
||||
|
||||
typedef struct _remot_info{
|
||||
enum espconn_state state;
|
||||
int remote_port;
|
||||
uint8 remote_ip[4];
|
||||
}remot_info;
|
||||
|
||||
/** A callback prototype to inform about events for a espconn */
|
||||
typedef void (* espconn_recv_callback)(void *arg, char *pdata, unsigned short len);
|
||||
typedef void (* espconn_sent_callback)(void *arg);
|
||||
|
||||
/** A espconn descriptor */
|
||||
struct espconn {
|
||||
/** type of the espconn (TCP, UDP) */
|
||||
enum espconn_type type;
|
||||
/** current state of the espconn */
|
||||
enum espconn_state state;
|
||||
union {
|
||||
esp_tcp *tcp;
|
||||
esp_udp *udp;
|
||||
} proto;
|
||||
/** A callback function that is informed about events for this espconn */
|
||||
espconn_recv_callback recv_callback;
|
||||
espconn_sent_callback sent_callback;
|
||||
uint8 link_cnt;
|
||||
void *reverse;
|
||||
};
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_connect
|
||||
* Description : The function given as the connect
|
||||
* Parameters : espconn -- the espconn used to listen the connection
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_connect(struct espconn *espconn);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_disconnect
|
||||
* Description : disconnect with host
|
||||
* Parameters : espconn -- the espconn used to disconnect the connection
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_disconnect(struct espconn *espconn);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_delete
|
||||
* Description : disconnect with host
|
||||
* Parameters : espconn -- the espconn used to disconnect the connection
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_delete(struct espconn *espconn);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_accept
|
||||
* Description : The function given as the listen
|
||||
* Parameters : espconn -- the espconn used to listen the connection
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_accept(struct espconn *espconn);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_create
|
||||
* Description : sent data for client or server
|
||||
* Parameters : espconn -- espconn to the data transmission
|
||||
* Returns : result
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_create(struct espconn *espconn);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_regist_time
|
||||
* Description : used to specify the time that should be called when don't recv data
|
||||
* Parameters : espconn -- the espconn used to the connection
|
||||
* interval -- the timer when don't recv data
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_regist_time(struct espconn *espconn, uint32 interval, uint8 type_flag);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_get_connection_info
|
||||
* Description : used to specify the function that should be called when disconnect
|
||||
* Parameters : espconn -- espconn to set the err callback
|
||||
* discon_cb -- err callback function to call when err
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_get_connection_info(struct espconn *pespconn, remot_info **pcon_info, uint8 typeflags);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_regist_sentcb
|
||||
* Description : Used to specify the function that should be called when data
|
||||
* has been successfully delivered to the remote host.
|
||||
* Parameters : struct espconn *espconn -- espconn to set the sent callback
|
||||
* espconn_sent_callback sent_cb -- sent callback function to
|
||||
* call for this espconn when data is successfully sent
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_regist_sentcb(struct espconn *espconn, espconn_sent_callback sent_cb);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_sent
|
||||
* Description : sent data for client or server
|
||||
* Parameters : espconn -- espconn to set for client or server
|
||||
* psent -- data to send
|
||||
* length -- length of data to send
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_sent(struct espconn *espconn, uint8 *psent, uint16 length);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_regist_connectcb
|
||||
* Description : used to specify the function that should be called when
|
||||
* connects to host.
|
||||
* Parameters : espconn -- espconn to set the connect callback
|
||||
* connect_cb -- connected callback function to call when connected
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_regist_connectcb(struct espconn *espconn, espconn_connect_callback connect_cb);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_regist_recvcb
|
||||
* Description : used to specify the function that should be called when recv
|
||||
* data from host.
|
||||
* Parameters : espconn -- espconn to set the recv callback
|
||||
* recv_cb -- recv callback function to call when recv data
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_regist_recvcb(struct espconn *espconn, espconn_recv_callback recv_cb);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_regist_reconcb
|
||||
* Description : used to specify the function that should be called when connection
|
||||
* because of err disconnect.
|
||||
* Parameters : espconn -- espconn to set the err callback
|
||||
* recon_cb -- err callback function to call when err
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_regist_reconcb(struct espconn *espconn, espconn_reconnect_callback recon_cb);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_regist_disconcb
|
||||
* Description : used to specify the function that should be called when disconnect
|
||||
* Parameters : espconn -- espconn to set the err callback
|
||||
* discon_cb -- err callback function to call when err
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_regist_disconcb(struct espconn *espconn, espconn_connect_callback discon_cb);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_port
|
||||
* Description : access port value for client so that we don't end up bouncing
|
||||
* all connections at the same time .
|
||||
* Parameters : none
|
||||
* Returns : access port value
|
||||
*******************************************************************************/
|
||||
|
||||
uint32 espconn_port(void);
|
||||
|
||||
/******************************************************************************
|
||||
* TypedefName : dns_found_callback
|
||||
* Description : Callback which is invoked when a hostname is found.
|
||||
* Parameters : name -- pointer to the name that was looked up.
|
||||
* ipaddr -- pointer to an ip_addr_t containing the IP address of
|
||||
* the hostname, or NULL if the name could not be found (or on any
|
||||
* other error).
|
||||
* callback_arg -- a user-specified callback argument passed to
|
||||
* dns_gethostbyname
|
||||
*******************************************************************************/
|
||||
|
||||
typedef void (*dns_found_callback)(const char *name, ip_addr_t *ipaddr, void *callback_arg);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_gethostbyname
|
||||
* Description : Resolve a hostname (string) into an IP address.
|
||||
* Parameters : pespconn -- espconn to resolve a hostname
|
||||
* hostname -- the hostname that is to be queried
|
||||
* addr -- pointer to a ip_addr_t where to store the address if
|
||||
* it is already cached in the dns_table (only valid if ESPCONN_OK
|
||||
* is returned!)
|
||||
* found -- a callback function to be called on success, failure
|
||||
* or timeout (only if ERR_INPROGRESS is returned!)
|
||||
* Returns : err_t return code
|
||||
* - ESPCONN_OK if hostname is a valid IP address string or the host
|
||||
* name is already in the local names table.
|
||||
* - ESPCONN_INPROGRESS enqueue a request to be sent to the DNS server
|
||||
* for resolution if no errors are present.
|
||||
* - ESPCONN_ARG: dns client not initialized or invalid hostname
|
||||
*******************************************************************************/
|
||||
|
||||
err_t espconn_gethostbyname(struct espconn *pespconn, const char *hostname, ip_addr_t *addr, dns_found_callback found);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_encry_connect
|
||||
* Description : The function given as connection
|
||||
* Parameters : espconn -- the espconn used to connect with the host
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_secure_connect(struct espconn *espconn);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_encry_disconnect
|
||||
* Description : The function given as the disconnection
|
||||
* Parameters : espconn -- the espconn used to disconnect with the host
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_secure_disconnect(struct espconn *espconn);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_encry_sent
|
||||
* Description : sent data for client or server
|
||||
* Parameters : espconn -- espconn to set for client or server
|
||||
* psent -- data to send
|
||||
* length -- length of data to send
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_secure_sent(struct espconn *espconn, uint8 *psent, uint16 length);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_secure_accept
|
||||
* Description : The function given as the listen
|
||||
* Parameters : espconn -- the espconn used to listen the connection
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
|
||||
sint8 espconn_secure_accept(struct espconn *espconn);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_igmp_join
|
||||
* Description : join a multicast group
|
||||
* Parameters : host_ip -- the ip address of udp server
|
||||
* multicast_ip -- multicast ip given by user
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
sint8 espconn_igmp_join(ip_addr_t *host_ip, ip_addr_t *multicast_ip);
|
||||
|
||||
/******************************************************************************
|
||||
* FunctionName : espconn_igmp_leave
|
||||
* Description : leave a multicast group
|
||||
* Parameters : host_ip -- the ip address of udp server
|
||||
* multicast_ip -- multicast ip given by user
|
||||
* Returns : none
|
||||
*******************************************************************************/
|
||||
sint8 espconn_igmp_leave(ip_addr_t *host_ip, ip_addr_t *multicast_ip);
|
||||
|
||||
#endif
|
||||
|
||||
83
hardware/tools/esp8266/sdk/include/ets_sys.h
Executable file
83
hardware/tools/esp8266/sdk/include/ets_sys.h
Executable file
@ -0,0 +1,83 @@
|
||||
/*
|
||||
* copyright (c) 2008 - 2011 Espressif System
|
||||
*
|
||||
* Define user specified Event signals and Task priorities here
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _ETS_SYS_H
|
||||
#define _ETS_SYS_H
|
||||
|
||||
#include "c_types.h"
|
||||
#include "eagle_soc.h"
|
||||
|
||||
typedef uint32_t ETSSignal;
|
||||
typedef uint32_t ETSParam;
|
||||
|
||||
typedef struct ETSEventTag ETSEvent;
|
||||
|
||||
struct ETSEventTag {
|
||||
ETSSignal sig;
|
||||
ETSParam par;
|
||||
};
|
||||
|
||||
typedef void (*ETSTask)(ETSEvent *e);
|
||||
|
||||
/* timer related */
|
||||
typedef uint32_t ETSHandle;
|
||||
typedef void ETSTimerFunc(void *timer_arg);
|
||||
|
||||
typedef struct _ETSTIMER_ {
|
||||
struct _ETSTIMER_ *timer_next;
|
||||
uint32_t timer_expire;
|
||||
uint32_t timer_period;
|
||||
ETSTimerFunc *timer_func;
|
||||
void *timer_arg;
|
||||
} ETSTimer;
|
||||
|
||||
/* interrupt related */
|
||||
#define ETS_GPIO_INUM 4
|
||||
#define ETS_UART_INUM 5
|
||||
#define ETS_UART1_INUM 5
|
||||
#define ETS_FRC_TIMER1_INUM 9 /* use edge*/
|
||||
|
||||
#define ETS_INTR_LOCK() \
|
||||
ets_intr_lock()
|
||||
|
||||
#define ETS_INTR_UNLOCK() \
|
||||
ets_intr_unlock()
|
||||
|
||||
#define ETS_FRC_TIMER1_INTR_ATTACH(func, arg) \
|
||||
ets_isr_attach(ETS_FRC_TIMER1_INUM, (func), (void *)(arg))
|
||||
|
||||
#define ETS_GPIO_INTR_ATTACH(func, arg) \
|
||||
ets_isr_attach(ETS_GPIO_INUM, (func), (void *)(arg))
|
||||
|
||||
#define ETS_UART_INTR_ATTACH(func, arg) \
|
||||
ets_isr_attach(ETS_UART_INUM, (func), (void *)(arg))
|
||||
|
||||
#define ETS_INTR_ENABLE(inum) \
|
||||
ets_isr_unmask((1<<inum))
|
||||
|
||||
#define ETS_INTR_DISABLE(inum) \
|
||||
ets_isr_mask((1<<inum))
|
||||
|
||||
#define ETS_UART_INTR_ENABLE() \
|
||||
ETS_INTR_ENABLE(ETS_UART_INUM)
|
||||
|
||||
#define ETS_UART_INTR_DISABLE() \
|
||||
ETS_INTR_DISABLE(ETS_UART_INUM)
|
||||
|
||||
#define ETS_FRC1_INTR_ENABLE() \
|
||||
ETS_INTR_ENABLE(ETS_FRC_TIMER1_INUM)
|
||||
|
||||
#define ETS_FRC1_INTR_DISABLE() \
|
||||
ETS_INTR_DISABLE(ETS_FRC_TIMER1_INUM)
|
||||
|
||||
#define ETS_GPIO_INTR_ENABLE() \
|
||||
ETS_INTR_ENABLE(ETS_GPIO_INUM)
|
||||
|
||||
#define ETS_GPIO_INTR_DISABLE() \
|
||||
ETS_INTR_DISABLE(ETS_GPIO_INUM)
|
||||
|
||||
#endif /* _ETS_SYS_H */
|
||||
100
hardware/tools/esp8266/sdk/include/gpio.h
Executable file
100
hardware/tools/esp8266/sdk/include/gpio.h
Executable file
@ -0,0 +1,100 @@
|
||||
/*
|
||||
* copyright (c) Espressif System 2010
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef _GPIO_H_
|
||||
#define _GPIO_H_
|
||||
|
||||
#define GPIO_PIN_ADDR(i) (GPIO_PIN0_ADDRESS + i*4)
|
||||
|
||||
#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
|
||||
((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
|
||||
|
||||
#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
|
||||
|
||||
typedef enum {
|
||||
GPIO_PIN_INTR_DISABLE = 0,
|
||||
GPIO_PIN_INTR_POSEDGE = 1,
|
||||
GPIO_PIN_INTR_NEGEDGE = 2,
|
||||
GPIO_PIN_INTR_ANYEGDE = 3,
|
||||
GPIO_PIN_INTR_LOLEVEL = 4,
|
||||
GPIO_PIN_INTR_HILEVEL = 5
|
||||
} GPIO_INT_TYPE;
|
||||
|
||||
#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
|
||||
gpio_output_set(bit_value<<gpio_no, ((~bit_value)&0x01)<<gpio_no, 1<<gpio_no,0)
|
||||
#define GPIO_DIS_OUTPUT(gpio_no) gpio_output_set(0,0,0, 1<<gpio_no)
|
||||
#define GPIO_INPUT_GET(gpio_no) ((gpio_input_get()>>gpio_no)&BIT0)
|
||||
|
||||
/* GPIO interrupt handler, registered through gpio_intr_handler_register */
|
||||
typedef void (* gpio_intr_handler_fn_t)(uint32 intr_mask, void *arg);
|
||||
|
||||
|
||||
/*
|
||||
* Initialize GPIO. This includes reading the GPIO Configuration DataSet
|
||||
* to initialize "output enables" and pin configurations for each gpio pin.
|
||||
* Must be called once during startup.
|
||||
*/
|
||||
void gpio_init(void);
|
||||
|
||||
/*
|
||||
* Change GPIO pin output by setting, clearing, or disabling pins.
|
||||
* In general, it is expected that a bit will be set in at most one
|
||||
* of these masks. If a bit is clear in all masks, the output state
|
||||
* remains unchanged.
|
||||
*
|
||||
* There is no particular ordering guaranteed; so if the order of
|
||||
* writes is significant, calling code should divide a single call
|
||||
* into multiple calls.
|
||||
*/
|
||||
void gpio_output_set(uint32 set_mask,
|
||||
uint32 clear_mask,
|
||||
uint32 enable_mask,
|
||||
uint32 disable_mask);
|
||||
|
||||
/*
|
||||
* Sample the value of GPIO input pins and returns a bitmask.
|
||||
*/
|
||||
uint32 gpio_input_get(void);
|
||||
|
||||
/*
|
||||
* Set the specified GPIO register to the specified value.
|
||||
* This is a very general and powerful interface that is not
|
||||
* expected to be used during normal operation. It is intended
|
||||
* mainly for debug, or for unusual requirements.
|
||||
*/
|
||||
void gpio_register_set(uint32 reg_id, uint32 value);
|
||||
|
||||
/* Get the current value of the specified GPIO register. */
|
||||
uint32 gpio_register_get(uint32 reg_id);
|
||||
|
||||
/*
|
||||
* Register an application-specific interrupt handler for GPIO pin
|
||||
* interrupts. Once the interrupt handler is called, it will not
|
||||
* be called again until after a call to gpio_intr_ack. Any GPIO
|
||||
* interrupts that occur during the interim are masked.
|
||||
*
|
||||
* The application-specific handler is called with a mask of
|
||||
* pending GPIO interrupts. After processing pin interrupts, the
|
||||
* application-specific handler may wish to use gpio_intr_pending
|
||||
* to check for any additional pending interrupts before it returns.
|
||||
*/
|
||||
void gpio_intr_handler_register(gpio_intr_handler_fn_t fn, void *arg);
|
||||
|
||||
/* Determine which GPIO interrupts are pending. */
|
||||
uint32 gpio_intr_pending(void);
|
||||
|
||||
/*
|
||||
* Acknowledge GPIO interrupts.
|
||||
* Intended to be called from the gpio_intr_handler_fn.
|
||||
*/
|
||||
void gpio_intr_ack(uint32 ack_mask);
|
||||
|
||||
void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state);
|
||||
|
||||
void gpio_pin_wakeup_disable();
|
||||
|
||||
void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state);
|
||||
|
||||
#endif // _GPIO_H_
|
||||
64
hardware/tools/esp8266/sdk/include/ip_addr.h
Executable file
64
hardware/tools/esp8266/sdk/include/ip_addr.h
Executable file
@ -0,0 +1,64 @@
|
||||
#ifndef __IP_ADDR_H__
|
||||
#define __IP_ADDR_H__
|
||||
|
||||
#include "c_types.h"
|
||||
|
||||
struct ip_addr {
|
||||
uint32 addr;
|
||||
};
|
||||
|
||||
typedef struct ip_addr ip_addr_t;
|
||||
|
||||
struct ip_info {
|
||||
struct ip_addr ip;
|
||||
struct ip_addr netmask;
|
||||
struct ip_addr gw;
|
||||
};
|
||||
|
||||
#define IP4_ADDR(ipaddr, a,b,c,d) \
|
||||
(ipaddr)->addr = ((uint32)((d) & 0xff) << 24) | \
|
||||
((uint32)((c) & 0xff) << 16) | \
|
||||
((uint32)((b) & 0xff) << 8) | \
|
||||
(uint32)((a) & 0xff)
|
||||
|
||||
/**
|
||||
* Determine if two address are on the same network.
|
||||
*
|
||||
* @arg addr1 IP address 1
|
||||
* @arg addr2 IP address 2
|
||||
* @arg mask network identifier mask
|
||||
* @return !0 if the network identifiers of both address match
|
||||
*/
|
||||
#define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \
|
||||
(mask)->addr) == \
|
||||
((addr2)->addr & \
|
||||
(mask)->addr))
|
||||
|
||||
/** Set an IP address given by the four byte-parts.
|
||||
Little-endian version that prevents the use of htonl. */
|
||||
#define IP4_ADDR(ipaddr, a,b,c,d) \
|
||||
(ipaddr)->addr = ((uint32)((d) & 0xff) << 24) | \
|
||||
((uint32)((c) & 0xff) << 16) | \
|
||||
((uint32)((b) & 0xff) << 8) | \
|
||||
(uint32)((a) & 0xff)
|
||||
|
||||
#define ip4_addr1(ipaddr) (((uint8*)(ipaddr))[0])
|
||||
#define ip4_addr2(ipaddr) (((uint8*)(ipaddr))[1])
|
||||
#define ip4_addr3(ipaddr) (((uint8*)(ipaddr))[2])
|
||||
#define ip4_addr4(ipaddr) (((uint8*)(ipaddr))[3])
|
||||
|
||||
#define ip4_addr1_16(ipaddr) ((uint16)ip4_addr1(ipaddr))
|
||||
#define ip4_addr2_16(ipaddr) ((uint16)ip4_addr2(ipaddr))
|
||||
#define ip4_addr3_16(ipaddr) ((uint16)ip4_addr3(ipaddr))
|
||||
#define ip4_addr4_16(ipaddr) ((uint16)ip4_addr4(ipaddr))
|
||||
|
||||
uint32 ipaddr_addr(const char *cp);
|
||||
|
||||
#define IP2STR(ipaddr) ip4_addr1_16(ipaddr), \
|
||||
ip4_addr2_16(ipaddr), \
|
||||
ip4_addr3_16(ipaddr), \
|
||||
ip4_addr4_16(ipaddr)
|
||||
|
||||
#define IPSTR "%d.%d.%d.%d"
|
||||
|
||||
#endif /* __IP_ADDR_H__ */
|
||||
12
hardware/tools/esp8266/sdk/include/mem.h
Executable file
12
hardware/tools/esp8266/sdk/include/mem.h
Executable file
@ -0,0 +1,12 @@
|
||||
#ifndef __MEM_H__
|
||||
#define __MEM_H__
|
||||
|
||||
//void *pvPortMalloc( size_t xWantedSize );
|
||||
//void vPortFree( void *pv );
|
||||
//void *pvPortZalloc(size_t size);
|
||||
|
||||
#define os_malloc pvPortMalloc
|
||||
#define os_free vPortFree
|
||||
#define os_zalloc pvPortZalloc
|
||||
|
||||
#endif
|
||||
19
hardware/tools/esp8266/sdk/include/os_type.h
Executable file
19
hardware/tools/esp8266/sdk/include/os_type.h
Executable file
@ -0,0 +1,19 @@
|
||||
/*
|
||||
* copyright (c) Espressif System 2010
|
||||
*
|
||||
* mapping to ETS structures
|
||||
*
|
||||
*/
|
||||
#ifndef _OS_TYPES_H_
|
||||
#define _OS_TYPES_H_
|
||||
|
||||
#include "ets_sys.h"
|
||||
|
||||
#define os_signal_t ETSSignal
|
||||
#define os_param_t ETSParam
|
||||
#define os_event_t ETSEvent
|
||||
#define os_task_t ETSTask
|
||||
#define os_timer_t ETSTimer
|
||||
#define os_timer_func_t ETSTimerFunc
|
||||
|
||||
#endif
|
||||
48
hardware/tools/esp8266/sdk/include/osapi.h
Executable file
48
hardware/tools/esp8266/sdk/include/osapi.h
Executable file
@ -0,0 +1,48 @@
|
||||
/*
|
||||
* Copyright (c) 2010 Espressif System
|
||||
*/
|
||||
|
||||
#ifndef _OSAPI_H_
|
||||
#define _OSAPI_H_
|
||||
|
||||
#include <string.h>
|
||||
#include "user_config.h"
|
||||
|
||||
#define os_bzero ets_bzero
|
||||
#define os_delay_us ets_delay_us
|
||||
#define os_install_putc1 ets_install_putc1
|
||||
#define os_install_putc2 ets_install_putc2
|
||||
#define os_intr_lock ets_intr_lock
|
||||
#define os_intr_unlock ets_intr_unlock
|
||||
#define os_isr_attach ets_isr_attach
|
||||
#define os_isr_mask ets_isr_mask
|
||||
#define os_isr_unmask ets_isr_unmask
|
||||
#define os_memcmp ets_memcmp
|
||||
#define os_memcpy ets_memcpy
|
||||
#define os_memmove ets_memmove
|
||||
#define os_memset ets_memset
|
||||
#define os_putc ets_putc
|
||||
#define os_str2macaddr ets_str2macaddr
|
||||
#define os_strcat strcat
|
||||
#define os_strchr strchr
|
||||
#define os_strcmp ets_strcmp
|
||||
#define os_strcpy ets_strcpy
|
||||
#define os_strlen ets_strlen
|
||||
#define os_strncmp ets_strncmp
|
||||
#define os_strncpy ets_strncpy
|
||||
#define os_strstr ets_strstr
|
||||
#ifdef USE_US_TIMER
|
||||
#define os_timer_arm_us(a, b, c) ets_timer_arm_new(a, b, c, 0)
|
||||
#endif
|
||||
#define os_timer_arm(a, b, c) ets_timer_arm_new(a, b, c, 1)
|
||||
#define os_timer_disarm ets_timer_disarm
|
||||
#define os_timer_done ets_timer_done
|
||||
#define os_timer_handler_isr ets_timer_handler_isr
|
||||
#define os_timer_init ets_timer_init
|
||||
#define os_timer_setfn ets_timer_setfn
|
||||
|
||||
#define os_sprintf ets_sprintf
|
||||
#define os_update_cpu_frequency ets_update_cpu_frequency
|
||||
|
||||
#endif
|
||||
|
||||
204
hardware/tools/esp8266/sdk/include/queue.h
Executable file
204
hardware/tools/esp8266/sdk/include/queue.h
Executable file
@ -0,0 +1,204 @@
|
||||
#ifndef _SYS_QUEUE_H_
|
||||
#define _SYS_QUEUE_H_
|
||||
|
||||
#define QMD_SAVELINK(name, link)
|
||||
#define TRASHIT(x)
|
||||
|
||||
/*
|
||||
* Singly-linked List declarations.
|
||||
*/
|
||||
#define SLIST_HEAD(name, type) \
|
||||
struct name { \
|
||||
struct type *slh_first; /* first element */ \
|
||||
}
|
||||
|
||||
#define SLIST_HEAD_INITIALIZER(head) \
|
||||
{ NULL }
|
||||
|
||||
#define SLIST_ENTRY(type) \
|
||||
struct { \
|
||||
struct type *sle_next; /* next element */ \
|
||||
}
|
||||
|
||||
/*
|
||||
* Singly-linked List functions.
|
||||
*/
|
||||
#define SLIST_EMPTY(head) ((head)->slh_first == NULL)
|
||||
|
||||
#define SLIST_FIRST(head) ((head)->slh_first)
|
||||
|
||||
#define SLIST_FOREACH(var, head, field) \
|
||||
for ((var) = SLIST_FIRST((head)); \
|
||||
(var); \
|
||||
(var) = SLIST_NEXT((var), field))
|
||||
|
||||
#define SLIST_FOREACH_SAFE(var, head, field, tvar) \
|
||||
for ((var) = SLIST_FIRST((head)); \
|
||||
(var) && ((tvar) = SLIST_NEXT((var), field), 1); \
|
||||
(var) = (tvar))
|
||||
|
||||
#define SLIST_FOREACH_PREVPTR(var, varp, head, field) \
|
||||
for ((varp) = &SLIST_FIRST((head)); \
|
||||
((var) = *(varp)) != NULL; \
|
||||
(varp) = &SLIST_NEXT((var), field))
|
||||
|
||||
#define SLIST_INIT(head) do { \
|
||||
SLIST_FIRST((head)) = NULL; \
|
||||
} while (0)
|
||||
|
||||
#define SLIST_INSERT_AFTER(slistelm, elm, field) do { \
|
||||
SLIST_NEXT((elm), field) = SLIST_NEXT((slistelm), field); \
|
||||
SLIST_NEXT((slistelm), field) = (elm); \
|
||||
} while (0)
|
||||
|
||||
#define SLIST_INSERT_HEAD(head, elm, field) do { \
|
||||
SLIST_NEXT((elm), field) = SLIST_FIRST((head)); \
|
||||
SLIST_FIRST((head)) = (elm); \
|
||||
} while (0)
|
||||
|
||||
#define SLIST_NEXT(elm, field) ((elm)->field.sle_next)
|
||||
|
||||
#define SLIST_REMOVE(head, elm, type, field) do { \
|
||||
QMD_SAVELINK(oldnext, (elm)->field.sle_next); \
|
||||
if (SLIST_FIRST((head)) == (elm)) { \
|
||||
SLIST_REMOVE_HEAD((head), field); \
|
||||
} \
|
||||
else { \
|
||||
struct type *curelm = SLIST_FIRST((head)); \
|
||||
while (SLIST_NEXT(curelm, field) != (elm)) \
|
||||
curelm = SLIST_NEXT(curelm, field); \
|
||||
SLIST_REMOVE_AFTER(curelm, field); \
|
||||
} \
|
||||
TRASHIT(*oldnext); \
|
||||
} while (0)
|
||||
|
||||
#define SLIST_REMOVE_AFTER(elm, field) do { \
|
||||
SLIST_NEXT(elm, field) = \
|
||||
SLIST_NEXT(SLIST_NEXT(elm, field), field); \
|
||||
} while (0)
|
||||
|
||||
#define SLIST_REMOVE_HEAD(head, field) do { \
|
||||
SLIST_FIRST((head)) = SLIST_NEXT(SLIST_FIRST((head)), field); \
|
||||
} while (0)
|
||||
|
||||
/*
|
||||
* Singly-linked Tail queue declarations.
|
||||
*/
|
||||
#define STAILQ_HEAD(name, type) \
|
||||
struct name { \
|
||||
struct type *stqh_first;/* first element */ \
|
||||
struct type **stqh_last;/* addr of last next element */ \
|
||||
}
|
||||
|
||||
#define STAILQ_HEAD_INITIALIZER(head) \
|
||||
{ NULL, &(head).stqh_first }
|
||||
|
||||
#define STAILQ_ENTRY(type) \
|
||||
struct { \
|
||||
struct type *stqe_next; /* next element */ \
|
||||
}
|
||||
|
||||
/*
|
||||
* Singly-linked Tail queue functions.
|
||||
*/
|
||||
#define STAILQ_CONCAT(head1, head2) do { \
|
||||
if (!STAILQ_EMPTY((head2))) { \
|
||||
*(head1)->stqh_last = (head2)->stqh_first; \
|
||||
(head1)->stqh_last = (head2)->stqh_last; \
|
||||
STAILQ_INIT((head2)); \
|
||||
} \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_EMPTY(head) ((head)->stqh_first == NULL)
|
||||
|
||||
#define STAILQ_FIRST(head) ((head)->stqh_first)
|
||||
|
||||
#define STAILQ_FOREACH(var, head, field) \
|
||||
for((var) = STAILQ_FIRST((head)); \
|
||||
(var); \
|
||||
(var) = STAILQ_NEXT((var), field))
|
||||
|
||||
|
||||
#define STAILQ_FOREACH_SAFE(var, head, field, tvar) \
|
||||
for ((var) = STAILQ_FIRST((head)); \
|
||||
(var) && ((tvar) = STAILQ_NEXT((var), field), 1); \
|
||||
(var) = (tvar))
|
||||
|
||||
#define STAILQ_INIT(head) do { \
|
||||
STAILQ_FIRST((head)) = NULL; \
|
||||
(head)->stqh_last = &STAILQ_FIRST((head)); \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_INSERT_AFTER(head, tqelm, elm, field) do { \
|
||||
if ((STAILQ_NEXT((elm), field) = STAILQ_NEXT((tqelm), field)) == NULL)\
|
||||
(head)->stqh_last = &STAILQ_NEXT((elm), field); \
|
||||
STAILQ_NEXT((tqelm), field) = (elm); \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_INSERT_HEAD(head, elm, field) do { \
|
||||
if ((STAILQ_NEXT((elm), field) = STAILQ_FIRST((head))) == NULL) \
|
||||
(head)->stqh_last = &STAILQ_NEXT((elm), field); \
|
||||
STAILQ_FIRST((head)) = (elm); \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_INSERT_TAIL(head, elm, field) do { \
|
||||
STAILQ_NEXT((elm), field) = NULL; \
|
||||
*(head)->stqh_last = (elm); \
|
||||
(head)->stqh_last = &STAILQ_NEXT((elm), field); \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_LAST(head, type, field) \
|
||||
(STAILQ_EMPTY((head)) ? \
|
||||
NULL : \
|
||||
((struct type *)(void *) \
|
||||
((char *)((head)->stqh_last) - __offsetof(struct type, field))))
|
||||
|
||||
#define STAILQ_NEXT(elm, field) ((elm)->field.stqe_next)
|
||||
|
||||
#define STAILQ_REMOVE(head, elm, type, field) do { \
|
||||
QMD_SAVELINK(oldnext, (elm)->field.stqe_next); \
|
||||
if (STAILQ_FIRST((head)) == (elm)) { \
|
||||
STAILQ_REMOVE_HEAD((head), field); \
|
||||
} \
|
||||
else { \
|
||||
struct type *curelm = STAILQ_FIRST((head)); \
|
||||
while (STAILQ_NEXT(curelm, field) != (elm)) \
|
||||
curelm = STAILQ_NEXT(curelm, field); \
|
||||
STAILQ_REMOVE_AFTER(head, curelm, field); \
|
||||
} \
|
||||
TRASHIT(*oldnext); \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_REMOVE_HEAD(head, field) do { \
|
||||
if ((STAILQ_FIRST((head)) = \
|
||||
STAILQ_NEXT(STAILQ_FIRST((head)), field)) == NULL) \
|
||||
(head)->stqh_last = &STAILQ_FIRST((head)); \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_REMOVE_AFTER(head, elm, field) do { \
|
||||
if ((STAILQ_NEXT(elm, field) = \
|
||||
STAILQ_NEXT(STAILQ_NEXT(elm, field), field)) == NULL) \
|
||||
(head)->stqh_last = &STAILQ_NEXT((elm), field); \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_SWAP(head1, head2, type) do { \
|
||||
struct type *swap_first = STAILQ_FIRST(head1); \
|
||||
struct type **swap_last = (head1)->stqh_last; \
|
||||
STAILQ_FIRST(head1) = STAILQ_FIRST(head2); \
|
||||
(head1)->stqh_last = (head2)->stqh_last; \
|
||||
STAILQ_FIRST(head2) = swap_first; \
|
||||
(head2)->stqh_last = swap_last; \
|
||||
if (STAILQ_EMPTY(head1)) \
|
||||
(head1)->stqh_last = &STAILQ_FIRST(head1); \
|
||||
if (STAILQ_EMPTY(head2)) \
|
||||
(head2)->stqh_last = &STAILQ_FIRST(head2); \
|
||||
} while (0)
|
||||
|
||||
#define STAILQ_INSERT_CHAIN_HEAD(head, elm_chead, elm_ctail, field) do { \
|
||||
if ((STAILQ_NEXT(elm_ctail, field) = STAILQ_FIRST(head)) == NULL ) { \
|
||||
(head)->stqh_last = &STAILQ_NEXT(elm_ctail, field); \
|
||||
} \
|
||||
STAILQ_FIRST(head) = (elm_chead); \
|
||||
} while (0)
|
||||
|
||||
#endif /* !_SYS_QUEUE_H_ */
|
||||
30
hardware/tools/esp8266/sdk/include/spi_flash.h
Executable file
30
hardware/tools/esp8266/sdk/include/spi_flash.h
Executable file
@ -0,0 +1,30 @@
|
||||
/*
|
||||
* copyright (c) Espressif System 2010
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef SPI_FLASH_H
|
||||
#define SPI_FLASH_H
|
||||
|
||||
typedef enum {
|
||||
SPI_FLASH_RESULT_OK,
|
||||
SPI_FLASH_RESULT_ERR,
|
||||
SPI_FLASH_RESULT_TIMEOUT
|
||||
} SpiFlashOpResult;
|
||||
|
||||
typedef struct{
|
||||
uint32 deviceId;
|
||||
uint32 chip_size; // chip size in byte
|
||||
uint32 block_size;
|
||||
uint32 sector_size;
|
||||
uint32 page_size;
|
||||
uint32 status_mask;
|
||||
} SpiFlashChip;
|
||||
|
||||
#define SPI_FLASH_SEC_SIZE 4096
|
||||
|
||||
SpiFlashOpResult spi_flash_erase_sector(uint16 sec);
|
||||
SpiFlashOpResult spi_flash_write(uint32 des_addr, uint32 *src_addr, uint32 size);
|
||||
SpiFlashOpResult spi_flash_read(uint32 src_addr, uint32 *des_addr, uint32 size);
|
||||
|
||||
#endif
|
||||
128
hardware/tools/esp8266/sdk/include/uart_register.h
Executable file
128
hardware/tools/esp8266/sdk/include/uart_register.h
Executable file
@ -0,0 +1,128 @@
|
||||
//Generated at 2012-07-03 18:44:06
|
||||
/*
|
||||
* Copyright (c) 2010 - 2011 Espressif System
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef UART_REGISTER_H_INCLUDED
|
||||
#define UART_REGISTER_H_INCLUDED
|
||||
#define REG_UART_BASE( i ) (0x60000000+(i)*0xf00)
|
||||
//version value:32'h062000
|
||||
|
||||
#define UART_FIFO( i ) (REG_UART_BASE( i ) + 0x0)
|
||||
#define UART_RXFIFO_RD_BYTE 0x000000FF
|
||||
#define UART_RXFIFO_RD_BYTE_S 0
|
||||
|
||||
#define UART_INT_RAW( i ) (REG_UART_BASE( i ) + 0x4)
|
||||
#define UART_RXFIFO_TOUT_INT_RAW (BIT(8))
|
||||
#define UART_BRK_DET_INT_RAW (BIT(7))
|
||||
#define UART_CTS_CHG_INT_RAW (BIT(6))
|
||||
#define UART_DSR_CHG_INT_RAW (BIT(5))
|
||||
#define UART_RXFIFO_OVF_INT_RAW (BIT(4))
|
||||
#define UART_FRM_ERR_INT_RAW (BIT(3))
|
||||
#define UART_PARITY_ERR_INT_RAW (BIT(2))
|
||||
#define UART_TXFIFO_EMPTY_INT_RAW (BIT(1))
|
||||
#define UART_RXFIFO_FULL_INT_RAW (BIT(0))
|
||||
|
||||
#define UART_INT_ST( i ) (REG_UART_BASE( i ) + 0x8)
|
||||
#define UART_RXFIFO_TOUT_INT_ST (BIT(8))
|
||||
#define UART_BRK_DET_INT_ST (BIT(7))
|
||||
#define UART_CTS_CHG_INT_ST (BIT(6))
|
||||
#define UART_DSR_CHG_INT_ST (BIT(5))
|
||||
#define UART_RXFIFO_OVF_INT_ST (BIT(4))
|
||||
#define UART_FRM_ERR_INT_ST (BIT(3))
|
||||
#define UART_PARITY_ERR_INT_ST (BIT(2))
|
||||
#define UART_TXFIFO_EMPTY_INT_ST (BIT(1))
|
||||
#define UART_RXFIFO_FULL_INT_ST (BIT(0))
|
||||
|
||||
#define UART_INT_ENA( i ) (REG_UART_BASE( i ) + 0xC)
|
||||
#define UART_RXFIFO_TOUT_INT_ENA (BIT(8))
|
||||
#define UART_BRK_DET_INT_ENA (BIT(7))
|
||||
#define UART_CTS_CHG_INT_ENA (BIT(6))
|
||||
#define UART_DSR_CHG_INT_ENA (BIT(5))
|
||||
#define UART_RXFIFO_OVF_INT_ENA (BIT(4))
|
||||
#define UART_FRM_ERR_INT_ENA (BIT(3))
|
||||
#define UART_PARITY_ERR_INT_ENA (BIT(2))
|
||||
#define UART_TXFIFO_EMPTY_INT_ENA (BIT(1))
|
||||
#define UART_RXFIFO_FULL_INT_ENA (BIT(0))
|
||||
|
||||
#define UART_INT_CLR( i ) (REG_UART_BASE( i ) + 0x10)
|
||||
#define UART_RXFIFO_TOUT_INT_CLR (BIT(8))
|
||||
#define UART_BRK_DET_INT_CLR (BIT(7))
|
||||
#define UART_CTS_CHG_INT_CLR (BIT(6))
|
||||
#define UART_DSR_CHG_INT_CLR (BIT(5))
|
||||
#define UART_RXFIFO_OVF_INT_CLR (BIT(4))
|
||||
#define UART_FRM_ERR_INT_CLR (BIT(3))
|
||||
#define UART_PARITY_ERR_INT_CLR (BIT(2))
|
||||
#define UART_TXFIFO_EMPTY_INT_CLR (BIT(1))
|
||||
#define UART_RXFIFO_FULL_INT_CLR (BIT(0))
|
||||
|
||||
#define UART_CLKDIV( i ) (REG_UART_BASE( i ) + 0x14)
|
||||
#define UART_CLKDIV_CNT 0x000FFFFF
|
||||
#define UART_CLKDIV_S 0
|
||||
|
||||
#define UART_AUTOBAUD( i ) (REG_UART_BASE( i ) + 0x18)
|
||||
#define UART_GLITCH_FILT 0x000000FF
|
||||
#define UART_GLITCH_FILT_S 8
|
||||
#define UART_AUTOBAUD_EN (BIT(0))
|
||||
|
||||
#define UART_STATUS( i ) (REG_UART_BASE( i ) + 0x1C)
|
||||
#define UART_TXD (BIT(31))
|
||||
#define UART_RTSN (BIT(30))
|
||||
#define UART_DTRN (BIT(29))
|
||||
#define UART_TXFIFO_CNT 0x000000FF
|
||||
#define UART_TXFIFO_CNT_S 16
|
||||
#define UART_RXD (BIT(15))
|
||||
#define UART_CTSN (BIT(14))
|
||||
#define UART_DSRN (BIT(13))
|
||||
#define UART_RXFIFO_CNT 0x000000FF
|
||||
#define UART_RXFIFO_CNT_S 0
|
||||
|
||||
#define UART_CONF0( i ) (REG_UART_BASE( i ) + 0x20)
|
||||
#define UART_TXFIFO_RST (BIT(18))
|
||||
#define UART_RXFIFO_RST (BIT(17))
|
||||
#define UART_IRDA_EN (BIT(16))
|
||||
#define UART_TX_FLOW_EN (BIT(15))
|
||||
#define UART_LOOPBACK (BIT(14))
|
||||
#define UART_IRDA_RX_INV (BIT(13))
|
||||
#define UART_IRDA_TX_INV (BIT(12))
|
||||
#define UART_IRDA_WCTL (BIT(11))
|
||||
#define UART_IRDA_TX_EN (BIT(10))
|
||||
#define UART_IRDA_DPLX (BIT(9))
|
||||
#define UART_TXD_BRK (BIT(8))
|
||||
#define UART_SW_DTR (BIT(7))
|
||||
#define UART_SW_RTS (BIT(6))
|
||||
#define UART_STOP_BIT_NUM 0x00000003
|
||||
#define UART_STOP_BIT_NUM_S 4
|
||||
#define UART_BIT_NUM 0x00000003
|
||||
#define UART_BIT_NUM_S 2
|
||||
#define UART_PARITY_EN (BIT(1))
|
||||
#define UART_PARITY (BIT(0))
|
||||
|
||||
#define UART_CONF1( i ) (REG_UART_BASE( i ) + 0x24)
|
||||
#define UART_RX_TOUT_EN (BIT(31))
|
||||
#define UART_RX_TOUT_THRHD 0x0000007F
|
||||
#define UART_RX_TOUT_THRHD_S 24
|
||||
#define UART_RX_FLOW_EN (BIT(23))
|
||||
#define UART_RX_FLOW_THRHD 0x0000007F
|
||||
#define UART_RX_FLOW_THRHD_S 16
|
||||
#define UART_TXFIFO_EMPTY_THRHD 0x0000007F
|
||||
#define UART_TXFIFO_EMPTY_THRHD_S 8
|
||||
#define UART_RXFIFO_FULL_THRHD 0x0000007F
|
||||
#define UART_RXFIFO_FULL_THRHD_S 0
|
||||
|
||||
#define UART_LOWPULSE( i ) (REG_UART_BASE( i ) + 0x28)
|
||||
#define UART_LOWPULSE_MIN_CNT 0x000FFFFF
|
||||
#define UART_LOWPULSE_MIN_CNT_S 0
|
||||
|
||||
#define UART_HIGHPULSE( i ) (REG_UART_BASE( i ) + 0x2C)
|
||||
#define UART_HIGHPULSE_MIN_CNT 0x000FFFFF
|
||||
#define UART_HIGHPULSE_MIN_CNT_S 0
|
||||
|
||||
#define UART_PULSE_NUM( i ) (REG_UART_BASE( i ) + 0x30)
|
||||
#define UART_PULSE_NUM_CNT 0x0003FF
|
||||
#define UART_PULSE_NUM_CNT_S 0
|
||||
|
||||
#define UART_DATE( i ) (REG_UART_BASE( i ) + 0x78)
|
||||
#define UART_ID( i ) (REG_UART_BASE( i ) + 0x7C)
|
||||
#endif // UART_REGISTER_H_INCLUDED
|
||||
201
hardware/tools/esp8266/sdk/include/user_interface.h
Executable file
201
hardware/tools/esp8266/sdk/include/user_interface.h
Executable file
@ -0,0 +1,201 @@
|
||||
/*
|
||||
* Copyright (C) 2013 -2014 Espressif System
|
||||
*
|
||||
*/
|
||||
|
||||
#ifndef __USER_INTERFACE_H__
|
||||
#define __USER_INTERFACE_H__
|
||||
|
||||
#include "os_type.h"
|
||||
#ifdef LWIP_OPEN_SRC
|
||||
#include "lwip/ip_addr.h"
|
||||
#else
|
||||
#include "ip_addr.h"
|
||||
#endif
|
||||
|
||||
#include "queue.h"
|
||||
#include "user_config.h"
|
||||
#include "spi_flash.h"
|
||||
|
||||
#ifndef MAC2STR
|
||||
#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
|
||||
#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
|
||||
#endif
|
||||
|
||||
#define UPGRADE_FW_BIN1 0x00
|
||||
#define UPGRADE_FW_BIN2 0x01
|
||||
|
||||
typedef void (*upgrade_states_check_callback)(void * arg);
|
||||
|
||||
struct upgrade_server_info {
|
||||
uint8 ip[4];
|
||||
uint16 port;
|
||||
|
||||
uint8 upgrade_flag;
|
||||
|
||||
uint8 pre_version[8];
|
||||
uint8 upgrade_version[8];
|
||||
|
||||
uint32 check_times;
|
||||
uint8 *url;
|
||||
|
||||
upgrade_states_check_callback check_cb;
|
||||
struct espconn *pespconn;
|
||||
};
|
||||
|
||||
bool system_upgrade_start(struct upgrade_server_info *server);
|
||||
bool system_upgrade_start_ssl(struct upgrade_server_info *server);
|
||||
uint8 system_upgrade_userbin_check(void);
|
||||
void system_upgrade_reboot(void);
|
||||
|
||||
void system_restore(void);
|
||||
void system_restart(void);
|
||||
void system_deep_sleep(uint32 time_in_us);
|
||||
|
||||
void system_timer_reinit(void);
|
||||
uint32 system_get_time(void);
|
||||
|
||||
/* user task's prio must be 0/1/2 !!!*/
|
||||
enum {
|
||||
USER_TASK_PRIO_0 = 0,
|
||||
USER_TASK_PRIO_1,
|
||||
USER_TASK_PRIO_2,
|
||||
USER_TASK_PRIO_MAX
|
||||
};
|
||||
|
||||
void system_os_task(os_task_t task, uint8 prio, os_event_t *queue, uint8 qlen);
|
||||
void system_os_post(uint8 prio, os_signal_t sig, os_param_t par);
|
||||
|
||||
void system_print_meminfo(void);
|
||||
uint32 system_get_free_heap_size(void);
|
||||
|
||||
void system_set_os_print(uint8 onoff);
|
||||
|
||||
uint64 system_mktime(uint32 year, uint32 mon, uint32 day, uint32 hour, uint32 min, uint32 sec);
|
||||
|
||||
uint32 system_get_chip_id(void);
|
||||
|
||||
typedef void (* init_done_cb_t)(void);
|
||||
|
||||
void system_init_done_cb(init_done_cb_t cb);
|
||||
|
||||
#define NULL_MODE 0x00
|
||||
#define STATION_MODE 0x01
|
||||
#define SOFTAP_MODE 0x02
|
||||
#define STATIONAP_MODE 0x03
|
||||
|
||||
uint8 wifi_get_opmode(void);
|
||||
bool wifi_set_opmode(uint8 opmode);
|
||||
|
||||
struct bss_info {
|
||||
STAILQ_ENTRY(bss_info) next;
|
||||
|
||||
u8 bssid[6];
|
||||
u8 ssid[32];
|
||||
u8 channel;
|
||||
s8 rssi;
|
||||
u8 authmode;
|
||||
};
|
||||
|
||||
typedef struct _scaninfo {
|
||||
STAILQ_HEAD(, bss_info) *pbss;
|
||||
struct espconn *pespconn;
|
||||
u8 totalpage;
|
||||
u8 pagenum;
|
||||
u8 page_sn;
|
||||
u8 data_cnt;
|
||||
} scaninfo;
|
||||
|
||||
typedef void (* scan_done_cb_t)(void *arg, STATUS status);
|
||||
|
||||
struct station_config {
|
||||
uint8 ssid[32];
|
||||
uint8 password[64];
|
||||
};
|
||||
|
||||
bool wifi_station_get_config(struct station_config *config);
|
||||
bool wifi_station_set_config(struct station_config *config);
|
||||
|
||||
bool wifi_station_connect(void);
|
||||
bool wifi_station_disconnect(void);
|
||||
|
||||
struct scan_config {
|
||||
uint8 *ssid;
|
||||
uint8 *bssid;
|
||||
uint8 channel;
|
||||
};
|
||||
|
||||
bool wifi_station_scan(struct scan_config *config, scan_done_cb_t cb);
|
||||
|
||||
uint8 wifi_station_get_auto_connect(void);
|
||||
bool wifi_station_set_auto_connect(uint8 set);
|
||||
|
||||
enum {
|
||||
STATION_IDLE = 0,
|
||||
STATION_CONNECTING,
|
||||
STATION_WRONG_PASSWORD,
|
||||
STATION_NO_AP_FOUND,
|
||||
STATION_CONNECT_FAIL,
|
||||
STATION_GOT_IP
|
||||
};
|
||||
|
||||
uint8 wifi_station_get_connect_status(void);
|
||||
|
||||
typedef enum _auth_mode {
|
||||
AUTH_OPEN = 0,
|
||||
AUTH_WEP,
|
||||
AUTH_WPA_PSK,
|
||||
AUTH_WPA2_PSK,
|
||||
AUTH_WPA_WPA2_PSK
|
||||
} AUTH_MODE;
|
||||
|
||||
struct softap_config {
|
||||
uint8 ssid[32];
|
||||
uint8 password[64];
|
||||
uint8 channel;
|
||||
uint8 authmode;
|
||||
uint8 ssid_hidden;
|
||||
uint8 max_connection;
|
||||
};
|
||||
|
||||
bool wifi_softap_get_config(struct softap_config *config);
|
||||
bool wifi_softap_set_config(struct softap_config *config);
|
||||
|
||||
struct station_info {
|
||||
STAILQ_ENTRY(station_info) next;
|
||||
|
||||
uint8 bssid[6];
|
||||
struct ip_addr ip;
|
||||
};
|
||||
|
||||
struct station_info * wifi_softap_get_station_info(void);
|
||||
void wifi_softap_free_station_info(void);
|
||||
|
||||
#define STATION_IF 0x00
|
||||
#define SOFTAP_IF 0x01
|
||||
|
||||
bool wifi_get_ip_info(uint8 if_index, struct ip_info *info);
|
||||
bool wifi_set_ip_info(uint8 if_index, struct ip_info *info);
|
||||
bool wifi_get_macaddr(uint8 if_index, uint8 *macaddr);
|
||||
bool wifi_set_macaddr(uint8 if_index, uint8 *macaddr);
|
||||
|
||||
uint8 wifi_get_channel(void);
|
||||
bool wifi_set_channel(uint8 channel);
|
||||
|
||||
void wifi_status_led_install(uint8 gpio_id, uint32 gpio_name, uint8 gpio_func);
|
||||
|
||||
/** Get the absolute difference between 2 u32_t values (correcting overflows)
|
||||
* 'a' is expected to be 'higher' (without overflow) than 'b'. */
|
||||
#define ESP_U32_DIFF(a, b) (((a) >= (b)) ? ((a) - (b)) : (((a) + ((b) ^ 0xFFFFFFFF) + 1)))
|
||||
|
||||
void wifi_promiscuous_enable(uint8 promiscuous);
|
||||
|
||||
typedef void (* wifi_promiscuous_cb_t)(uint8 *buf, uint16 len);
|
||||
|
||||
void wifi_set_promiscuous_rx_cb(wifi_promiscuous_cb_t cb);
|
||||
|
||||
uint8 wifi_station_get_current_ap_id(void);
|
||||
bool wifi_station_ap_change(uint8 current_ap_id);
|
||||
bool wifi_station_ap_number_set(uint8 ap_number);
|
||||
|
||||
#endif
|
||||
12
hardware/tools/esp8266/sdk/include/version.h
Executable file
12
hardware/tools/esp8266/sdk/include/version.h
Executable file
@ -0,0 +1,12 @@
|
||||
#ifndef __SDK_VERSION_H__
|
||||
#define __SDK_VERSION_H__
|
||||
|
||||
#define SDK_VERSION_MAJOR 0U
|
||||
#define SDK_VERSION_MINOR 9U
|
||||
#define SDK_VERSION_REVISION 2U
|
||||
#define SDK_VERSION_INTERNAL 0U
|
||||
|
||||
#define SDK_VERSION (SDK_VERSION_MAJOR << 16 | SDK_VERSION_MINOR << 8 | SDK_VERSION_REVISION)
|
||||
|
||||
#endif
|
||||
|
||||
181
hardware/tools/esp8266/sdk/ld/eagle.app.v6.ld
Executable file
181
hardware/tools/esp8266/sdk/ld/eagle.app.v6.ld
Executable file
@ -0,0 +1,181 @@
|
||||
/* This linker script generated from xt-genldscripts.tpp for LSP . */
|
||||
/* Linker Script for ld -N */
|
||||
MEMORY
|
||||
{
|
||||
dport0_0_seg : org = 0x3FF00000, len = 0x10
|
||||
dram0_0_seg : org = 0x3FFE8000, len = 0x14000
|
||||
iram1_0_seg : org = 0x40100000, len = 0x8000
|
||||
irom0_0_seg : org = 0x40240000, len = 0x32000
|
||||
}
|
||||
|
||||
PHDRS
|
||||
{
|
||||
dport0_0_phdr PT_LOAD;
|
||||
dram0_0_phdr PT_LOAD;
|
||||
dram0_0_bss_phdr PT_LOAD;
|
||||
iram1_0_phdr PT_LOAD;
|
||||
irom0_0_phdr PT_LOAD;
|
||||
}
|
||||
|
||||
|
||||
/* Default entry point: */
|
||||
ENTRY(call_user_start)
|
||||
PROVIDE(_memmap_vecbase_reset = 0x40000000);
|
||||
/* Various memory-map dependent cache attribute settings: */
|
||||
_memmap_cacheattr_wb_base = 0x00000110;
|
||||
_memmap_cacheattr_wt_base = 0x00000110;
|
||||
_memmap_cacheattr_bp_base = 0x00000220;
|
||||
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
|
||||
_memmap_cacheattr_wb_trapnull = 0x2222211F;
|
||||
_memmap_cacheattr_wba_trapnull = 0x2222211F;
|
||||
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
|
||||
_memmap_cacheattr_wt_trapnull = 0x2222211F;
|
||||
_memmap_cacheattr_bp_trapnull = 0x2222222F;
|
||||
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
|
||||
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
|
||||
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
|
||||
_memmap_cacheattr_wb_allvalid = 0x22222112;
|
||||
_memmap_cacheattr_wt_allvalid = 0x22222112;
|
||||
_memmap_cacheattr_bp_allvalid = 0x22222222;
|
||||
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
|
||||
|
||||
SECTIONS
|
||||
{
|
||||
|
||||
.dport0.rodata : ALIGN(4)
|
||||
{
|
||||
_dport0_rodata_start = ABSOLUTE(.);
|
||||
*(.dport0.rodata)
|
||||
*(.dport.rodata)
|
||||
_dport0_rodata_end = ABSOLUTE(.);
|
||||
} >dport0_0_seg :dport0_0_phdr
|
||||
|
||||
.dport0.literal : ALIGN(4)
|
||||
{
|
||||
_dport0_literal_start = ABSOLUTE(.);
|
||||
*(.dport0.literal)
|
||||
*(.dport.literal)
|
||||
_dport0_literal_end = ABSOLUTE(.);
|
||||
} >dport0_0_seg :dport0_0_phdr
|
||||
|
||||
.dport0.data : ALIGN(4)
|
||||
{
|
||||
_dport0_data_start = ABSOLUTE(.);
|
||||
*(.dport0.data)
|
||||
*(.dport.data)
|
||||
_dport0_data_end = ABSOLUTE(.);
|
||||
} >dport0_0_seg :dport0_0_phdr
|
||||
|
||||
.data : ALIGN(4)
|
||||
{
|
||||
_data_start = ABSOLUTE(.);
|
||||
*(.data)
|
||||
*(.data.*)
|
||||
*(.gnu.linkonce.d.*)
|
||||
*(.data1)
|
||||
*(.sdata)
|
||||
*(.sdata.*)
|
||||
*(.gnu.linkonce.s.*)
|
||||
*(.sdata2)
|
||||
*(.sdata2.*)
|
||||
*(.gnu.linkonce.s2.*)
|
||||
*(.jcr)
|
||||
_data_end = ABSOLUTE(.);
|
||||
} >dram0_0_seg :dram0_0_phdr
|
||||
|
||||
.rodata : ALIGN(4)
|
||||
{
|
||||
_rodata_start = ABSOLUTE(.);
|
||||
*(.rodata)
|
||||
*(.rodata.*)
|
||||
*(.gnu.linkonce.r.*)
|
||||
*(.rodata1)
|
||||
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
|
||||
*(.xt_except_table)
|
||||
*(.gcc_except_table)
|
||||
*(.gnu.linkonce.e.*)
|
||||
*(.gnu.version_r)
|
||||
*(.eh_frame)
|
||||
/* C++ constructor and destructor tables, properly ordered: */
|
||||
KEEP (*crtbegin.o(.ctors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .ctors))
|
||||
KEEP (*(SORT(.ctors.*)))
|
||||
KEEP (*(.ctors))
|
||||
KEEP (*crtbegin.o(.dtors))
|
||||
KEEP (*(EXCLUDE_FILE (*crtend.o) .dtors))
|
||||
KEEP (*(SORT(.dtors.*)))
|
||||
KEEP (*(.dtors))
|
||||
/* C++ exception handlers table: */
|
||||
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc)
|
||||
*(.gnu.linkonce.h.*)
|
||||
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
|
||||
*(.xt_except_desc_end)
|
||||
*(.dynamic)
|
||||
*(.gnu.version_d)
|
||||
. = ALIGN(4); /* this table MUST be 4-byte aligned */
|
||||
_bss_table_start = ABSOLUTE(.);
|
||||
LONG(_bss_start)
|
||||
LONG(_bss_end)
|
||||
_bss_table_end = ABSOLUTE(.);
|
||||
_rodata_end = ABSOLUTE(.);
|
||||
} >dram0_0_seg :dram0_0_phdr
|
||||
|
||||
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
|
||||
{
|
||||
. = ALIGN (8);
|
||||
_bss_start = ABSOLUTE(.);
|
||||
*(.dynsbss)
|
||||
*(.sbss)
|
||||
*(.sbss.*)
|
||||
*(.gnu.linkonce.sb.*)
|
||||
*(.scommon)
|
||||
*(.sbss2)
|
||||
*(.sbss2.*)
|
||||
*(.gnu.linkonce.sb2.*)
|
||||
*(.dynbss)
|
||||
*(.bss)
|
||||
*(.bss.*)
|
||||
*(.gnu.linkonce.b.*)
|
||||
*(COMMON)
|
||||
. = ALIGN (8);
|
||||
_bss_end = ABSOLUTE(.);
|
||||
_heap_start = ABSOLUTE(.);
|
||||
/* _stack_sentry = ALIGN(0x8); */
|
||||
} >dram0_0_seg :dram0_0_bss_phdr
|
||||
/* __stack = 0x3ffc8000; */
|
||||
|
||||
.text : ALIGN(4)
|
||||
{
|
||||
_stext = .;
|
||||
_text_start = ABSOLUTE(.);
|
||||
*(.entry.text)
|
||||
*(.init.literal)
|
||||
*(.init)
|
||||
*(.literal .text .literal.* .text.* .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
|
||||
*(.fini.literal)
|
||||
*(.fini)
|
||||
*(.gnu.version)
|
||||
_text_end = ABSOLUTE(.);
|
||||
_etext = .;
|
||||
} >iram1_0_seg :iram1_0_phdr
|
||||
|
||||
.lit4 : ALIGN(4)
|
||||
{
|
||||
_lit4_start = ABSOLUTE(.);
|
||||
*(*.lit4)
|
||||
*(.lit4.*)
|
||||
*(.gnu.linkonce.lit4.*)
|
||||
_lit4_end = ABSOLUTE(.);
|
||||
} >iram1_0_seg :iram1_0_phdr
|
||||
|
||||
.irom0.text : ALIGN(4)
|
||||
{
|
||||
_irom0_text_start = ABSOLUTE(.);
|
||||
*(.irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
|
||||
_irom0_text_end = ABSOLUTE(.);
|
||||
} >irom0_0_seg :irom0_0_phdr
|
||||
}
|
||||
|
||||
/* get ROM code address */
|
||||
INCLUDE "../ld/eagle.rom.addr.v6.ld"
|
||||
343
hardware/tools/esp8266/sdk/ld/eagle.rom.addr.v6.ld
Executable file
343
hardware/tools/esp8266/sdk/ld/eagle.rom.addr.v6.ld
Executable file
@ -0,0 +1,343 @@
|
||||
PROVIDE ( Cache_Read_Disable = 0x400047f0 );
|
||||
PROVIDE ( Cache_Read_Enable = 0x40004678 );
|
||||
PROVIDE ( FilePacketSendReqMsgProc = 0x400035a0 );
|
||||
PROVIDE ( FlashDwnLdParamCfgMsgProc = 0x4000368c );
|
||||
PROVIDE ( FlashDwnLdStartMsgProc = 0x40003538 );
|
||||
PROVIDE ( FlashDwnLdStopReqMsgProc = 0x40003658 );
|
||||
PROVIDE ( GetUartDevice = 0x40003f4c );
|
||||
PROVIDE ( MD5Final = 0x40009900 );
|
||||
PROVIDE ( MD5Init = 0x40009818 );
|
||||
PROVIDE ( MD5Update = 0x40009834 );
|
||||
PROVIDE ( MemDwnLdStartMsgProc = 0x400036c4 );
|
||||
PROVIDE ( MemDwnLdStopReqMsgProc = 0x4000377c );
|
||||
PROVIDE ( MemPacketSendReqMsgProc = 0x400036f0 );
|
||||
PROVIDE ( RcvMsg = 0x40003eac );
|
||||
PROVIDE ( SHA1Final = 0x4000b648 );
|
||||
PROVIDE ( SHA1Init = 0x4000b584 );
|
||||
PROVIDE ( SHA1Transform = 0x4000a364 );
|
||||
PROVIDE ( SHA1Update = 0x4000b5a8 );
|
||||
PROVIDE ( SPIEraseArea = 0x40004b44 );
|
||||
PROVIDE ( SPIEraseBlock = 0x400049b4 );
|
||||
PROVIDE ( SPIEraseChip = 0x40004984 );
|
||||
PROVIDE ( SPIEraseSector = 0x40004a00 );
|
||||
PROVIDE ( SPILock = 0x400048a8 );
|
||||
PROVIDE ( SPIParamCfg = 0x40004c2c );
|
||||
PROVIDE ( SPIRead = 0x40004b1c );
|
||||
PROVIDE ( SPIReadModeCnfig = 0x400048ec );
|
||||
PROVIDE ( SPIUnlock = 0x40004878 );
|
||||
PROVIDE ( SPIWrite = 0x40004a4c );
|
||||
PROVIDE ( SelectSpiFunction = 0x40003f58 );
|
||||
PROVIDE ( SendMsg = 0x40003cf4 );
|
||||
PROVIDE ( UartConnCheck = 0x40003230 );
|
||||
PROVIDE ( UartConnectProc = 0x400037a0 );
|
||||
PROVIDE ( UartDwnLdProc = 0x40003368 );
|
||||
PROVIDE ( UartGetCmdLn = 0x40003ef4 );
|
||||
PROVIDE ( UartRegReadProc = 0x4000381c );
|
||||
PROVIDE ( UartRegWriteProc = 0x400037ac );
|
||||
PROVIDE ( UartRxString = 0x40003c30 );
|
||||
PROVIDE ( Uart_Init = 0x40003a14 );
|
||||
PROVIDE ( _DebugExceptionVector = 0x40000010 );
|
||||
PROVIDE ( _DoubleExceptionVector = 0x40000070 );
|
||||
PROVIDE ( _KernelExceptionVector = 0x40000030 );
|
||||
PROVIDE ( _NMIExceptionVector = 0x40000020 );
|
||||
PROVIDE ( _ResetHandler = 0x400000a4 );
|
||||
PROVIDE ( _ResetVector = 0x40000080 );
|
||||
PROVIDE ( _UserExceptionVector = 0x40000050 );
|
||||
PROVIDE ( __adddf3 = 0x4000c538 );
|
||||
PROVIDE ( __addsf3 = 0x4000c180 );
|
||||
PROVIDE ( __divdf3 = 0x4000cb94 );
|
||||
PROVIDE ( __divdi3 = 0x4000ce60 );
|
||||
PROVIDE ( __divsi3 = 0x4000dc88 );
|
||||
PROVIDE ( __extendsfdf2 = 0x4000cdfc );
|
||||
PROVIDE ( __fixdfsi = 0x4000ccb8 );
|
||||
PROVIDE ( __fixunsdfsi = 0x4000cd00 );
|
||||
PROVIDE ( __fixunssfsi = 0x4000c4c4 );
|
||||
PROVIDE ( __floatsidf = 0x4000e2f0 );
|
||||
PROVIDE ( __floatsisf = 0x4000e2ac );
|
||||
PROVIDE ( __floatunsidf = 0x4000e2e8 );
|
||||
PROVIDE ( __floatunsisf = 0x4000e2a4 );
|
||||
PROVIDE ( __muldf3 = 0x4000c8f0 );
|
||||
PROVIDE ( __muldi3 = 0x40000650 );
|
||||
PROVIDE ( __mulsf3 = 0x4000c3dc );
|
||||
PROVIDE ( __subdf3 = 0x4000c688 );
|
||||
PROVIDE ( __subsf3 = 0x4000c268 );
|
||||
PROVIDE ( __truncdfsf2 = 0x4000cd5c );
|
||||
PROVIDE ( __udivdi3 = 0x4000d310 );
|
||||
PROVIDE ( __udivsi3 = 0x4000e21c );
|
||||
PROVIDE ( __umoddi3 = 0x4000d770 );
|
||||
PROVIDE ( __umodsi3 = 0x4000e268 );
|
||||
PROVIDE ( __umulsidi3 = 0x4000dcf0 );
|
||||
PROVIDE ( _rom_store = 0x4000e388 );
|
||||
PROVIDE ( _rom_store_table = 0x4000e328 );
|
||||
PROVIDE ( _start = 0x4000042c );
|
||||
PROVIDE ( _xtos_alloca_handler = 0x4000dbe0 );
|
||||
PROVIDE ( _xtos_c_wrapper_handler = 0x40000598 );
|
||||
PROVIDE ( _xtos_cause3_handler = 0x40000590 );
|
||||
PROVIDE ( _xtos_ints_off = 0x4000bda4 );
|
||||
PROVIDE ( _xtos_ints_on = 0x4000bd84 );
|
||||
PROVIDE ( _xtos_l1int_handler = 0x4000048c );
|
||||
PROVIDE ( _xtos_p_none = 0x4000dbf8 );
|
||||
PROVIDE ( _xtos_restore_intlevel = 0x4000056c );
|
||||
PROVIDE ( _xtos_return_from_exc = 0x4000dc54 );
|
||||
PROVIDE ( _xtos_set_exception_handler = 0x40000454 );
|
||||
PROVIDE ( _xtos_set_interrupt_handler = 0x4000bd70 );
|
||||
PROVIDE ( _xtos_set_interrupt_handler_arg = 0x4000bd28 );
|
||||
PROVIDE ( _xtos_set_intlevel = 0x4000dbfc );
|
||||
PROVIDE ( _xtos_set_min_intlevel = 0x4000dc18 );
|
||||
PROVIDE ( _xtos_set_vpri = 0x40000574 );
|
||||
PROVIDE ( _xtos_syscall_handler = 0x4000dbe4 );
|
||||
PROVIDE ( _xtos_unhandled_exception = 0x4000dc44 );
|
||||
PROVIDE ( _xtos_unhandled_interrupt = 0x4000dc3c );
|
||||
PROVIDE ( aes_decrypt = 0x400092d4 );
|
||||
PROVIDE ( aes_decrypt_deinit = 0x400092e4 );
|
||||
PROVIDE ( aes_decrypt_init = 0x40008ea4 );
|
||||
PROVIDE ( aes_unwrap = 0x40009410 );
|
||||
PROVIDE ( base64_decode = 0x40009648 );
|
||||
PROVIDE ( base64_encode = 0x400094fc );
|
||||
PROVIDE ( bzero = 0x4000de84 );
|
||||
PROVIDE ( cmd_parse = 0x40000814 );
|
||||
PROVIDE ( conv_str_decimal = 0x40000b24 );
|
||||
PROVIDE ( conv_str_hex = 0x40000cb8 );
|
||||
PROVIDE ( convert_para_str = 0x40000a60 );
|
||||
PROVIDE ( dtm_get_intr_mask = 0x400026d0 );
|
||||
PROVIDE ( dtm_params_init = 0x4000269c );
|
||||
PROVIDE ( dtm_set_intr_mask = 0x400026c8 );
|
||||
PROVIDE ( dtm_set_params = 0x400026dc );
|
||||
PROVIDE ( eprintf = 0x40001d14 );
|
||||
PROVIDE ( eprintf_init_buf = 0x40001cb8 );
|
||||
PROVIDE ( eprintf_to_host = 0x40001d48 );
|
||||
PROVIDE ( est_get_printf_buf_remain_len = 0x40002494 );
|
||||
PROVIDE ( est_reset_printf_buf_len = 0x4000249c );
|
||||
PROVIDE ( ets_bzero = 0x40002ae8 );
|
||||
PROVIDE ( ets_char2xdigit = 0x40002b74 );
|
||||
PROVIDE ( ets_delay_us = 0x40002ecc );
|
||||
PROVIDE ( ets_enter_sleep = 0x400027b8 );
|
||||
PROVIDE ( ets_external_printf = 0x40002578 );
|
||||
PROVIDE ( ets_get_cpu_frequency = 0x40002f0c );
|
||||
PROVIDE ( ets_getc = 0x40002bcc );
|
||||
PROVIDE ( ets_install_external_printf = 0x40002450 );
|
||||
PROVIDE ( ets_install_putc1 = 0x4000242c );
|
||||
PROVIDE ( ets_install_putc2 = 0x4000248c );
|
||||
PROVIDE ( ets_install_uart_printf = 0x40002438 );
|
||||
PROVIDE ( ets_intr_lock = 0x40000f74 );
|
||||
PROVIDE ( ets_intr_unlock = 0x40000f80 );
|
||||
PROVIDE ( ets_isr_attach = 0x40000f88 );
|
||||
PROVIDE ( ets_isr_mask = 0x40000f98 );
|
||||
PROVIDE ( ets_isr_unmask = 0x40000fa8 );
|
||||
PROVIDE ( ets_memcmp = 0x400018d4 );
|
||||
PROVIDE ( ets_memcpy = 0x400018b4 );
|
||||
PROVIDE ( ets_memmove = 0x400018c4 );
|
||||
PROVIDE ( ets_memset = 0x400018a4 );
|
||||
PROVIDE ( ets_post = 0x40000e24 );
|
||||
PROVIDE ( ets_printf = 0x400024cc );
|
||||
PROVIDE ( ets_putc = 0x40002be8 );
|
||||
PROVIDE ( ets_rtc_int_register = 0x40002a40 );
|
||||
PROVIDE ( ets_run = 0x40000e04 );
|
||||
PROVIDE ( ets_set_idle_cb = 0x40000dc0 );
|
||||
PROVIDE ( ets_set_user_start = 0x40000fbc );
|
||||
PROVIDE ( ets_str2macaddr = 0x40002af8 );
|
||||
PROVIDE ( ets_strcmp = 0x40002aa8 );
|
||||
PROVIDE ( ets_strcpy = 0x40002a88 );
|
||||
PROVIDE ( ets_strlen = 0x40002ac8 );
|
||||
PROVIDE ( ets_strncmp = 0x40002ab8 );
|
||||
PROVIDE ( ets_strncpy = 0x40002a98 );
|
||||
PROVIDE ( ets_strstr = 0x40002ad8 );
|
||||
PROVIDE ( ets_task = 0x40000dd0 );
|
||||
PROVIDE ( ets_timer_arm = 0x40002cc4 );
|
||||
PROVIDE ( ets_timer_disarm = 0x40002d40 );
|
||||
PROVIDE ( ets_timer_done = 0x40002d80 );
|
||||
PROVIDE ( ets_timer_handler_isr = 0x40002da8 );
|
||||
PROVIDE ( ets_timer_init = 0x40002e68 );
|
||||
PROVIDE ( ets_timer_setfn = 0x40002c48 );
|
||||
PROVIDE ( ets_uart_printf = 0x40002544 );
|
||||
PROVIDE ( ets_update_cpu_frequency = 0x40002f04 );
|
||||
PROVIDE ( ets_vprintf = 0x40001f00 );
|
||||
PROVIDE ( ets_wdt_disable = 0x400030f0 );
|
||||
PROVIDE ( ets_wdt_enable = 0x40002fa0 );
|
||||
PROVIDE ( ets_wdt_get_mode = 0x40002f34 );
|
||||
PROVIDE ( ets_wdt_init = 0x40003170 );
|
||||
PROVIDE ( ets_wdt_restore = 0x40003158 );
|
||||
PROVIDE ( ets_write_char = 0x40001da0 );
|
||||
PROVIDE ( get_first_seg = 0x4000091c );
|
||||
PROVIDE ( gpio_init = 0x40004c50 );
|
||||
PROVIDE ( gpio_input_get = 0x40004cf0 );
|
||||
PROVIDE ( gpio_intr_ack = 0x40004dcc );
|
||||
PROVIDE ( gpio_intr_handler_register = 0x40004e28 );
|
||||
PROVIDE ( gpio_intr_pending = 0x40004d88 );
|
||||
PROVIDE ( gpio_intr_test = 0x40004efc );
|
||||
PROVIDE ( gpio_output_set = 0x40004cd0 );
|
||||
PROVIDE ( gpio_pin_intr_state_set = 0x40004d90 );
|
||||
PROVIDE ( gpio_pin_wakeup_disable = 0x40004ed4 );
|
||||
PROVIDE ( gpio_pin_wakeup_enable = 0x40004e90 );
|
||||
PROVIDE ( gpio_register_get = 0x40004d5c );
|
||||
PROVIDE ( gpio_register_set = 0x40004d04 );
|
||||
PROVIDE ( hmac_md5 = 0x4000a2cc );
|
||||
PROVIDE ( hmac_md5_vector = 0x4000a160 );
|
||||
PROVIDE ( hmac_sha1 = 0x4000ba28 );
|
||||
PROVIDE ( hmac_sha1_vector = 0x4000b8b4 );
|
||||
PROVIDE ( lldesc_build_chain = 0x40004f40 );
|
||||
PROVIDE ( lldesc_num2link = 0x40005050 );
|
||||
PROVIDE ( lldesc_set_owner = 0x4000507c );
|
||||
PROVIDE ( main = 0x40000fec );
|
||||
PROVIDE ( md5_vector = 0x400097ac );
|
||||
PROVIDE ( mem_calloc = 0x40001c2c );
|
||||
PROVIDE ( mem_free = 0x400019e0 );
|
||||
PROVIDE ( mem_init = 0x40001998 );
|
||||
PROVIDE ( mem_malloc = 0x40001b40 );
|
||||
PROVIDE ( mem_realloc = 0x40001c6c );
|
||||
PROVIDE ( mem_trim = 0x40001a14 );
|
||||
PROVIDE ( mem_zalloc = 0x40001c58 );
|
||||
PROVIDE ( memcmp = 0x4000dea8 );
|
||||
PROVIDE ( memcpy = 0x4000df48 );
|
||||
PROVIDE ( memmove = 0x4000e04c );
|
||||
PROVIDE ( memset = 0x4000e190 );
|
||||
PROVIDE ( multofup = 0x400031c0 );
|
||||
PROVIDE ( pbkdf2_sha1 = 0x4000b840 );
|
||||
PROVIDE ( phy_get_romfuncs = 0x40006b08 );
|
||||
PROVIDE ( rand = 0x40000600 );
|
||||
PROVIDE ( rc4_skip = 0x4000dd68 );
|
||||
PROVIDE ( recv_packet = 0x40003d08 );
|
||||
PROVIDE ( remove_head_space = 0x40000a04 );
|
||||
PROVIDE ( rijndaelKeySetupDec = 0x40008dd0 );
|
||||
PROVIDE ( rijndaelKeySetupEnc = 0x40009300 );
|
||||
PROVIDE ( rom_abs_temp = 0x400060c0 );
|
||||
PROVIDE ( rom_ana_inf_gating_en = 0x40006b10 );
|
||||
PROVIDE ( rom_cal_tos_v50 = 0x40007a28 );
|
||||
PROVIDE ( rom_chip_50_set_channel = 0x40006f84 );
|
||||
PROVIDE ( rom_chip_v5_disable_cca = 0x400060d0 );
|
||||
PROVIDE ( rom_chip_v5_enable_cca = 0x400060ec );
|
||||
PROVIDE ( rom_chip_v5_rx_init = 0x4000711c );
|
||||
PROVIDE ( rom_chip_v5_sense_backoff = 0x4000610c );
|
||||
PROVIDE ( rom_chip_v5_tx_init = 0x4000718c );
|
||||
PROVIDE ( rom_dc_iq_est = 0x4000615c );
|
||||
PROVIDE ( rom_en_pwdet = 0x400061b8 );
|
||||
PROVIDE ( rom_get_bb_atten = 0x40006238 );
|
||||
PROVIDE ( rom_get_corr_power = 0x40006260 );
|
||||
PROVIDE ( rom_get_fm_sar_dout = 0x400062dc );
|
||||
PROVIDE ( rom_get_noisefloor = 0x40006394 );
|
||||
PROVIDE ( rom_get_power_db = 0x400063b0 );
|
||||
PROVIDE ( rom_i2c_readReg = 0x40007268 );
|
||||
PROVIDE ( rom_i2c_readReg_Mask = 0x4000729c );
|
||||
PROVIDE ( rom_i2c_writeReg = 0x400072d8 );
|
||||
PROVIDE ( rom_i2c_writeReg_Mask = 0x4000730c );
|
||||
PROVIDE ( rom_iq_est_disable = 0x40006400 );
|
||||
PROVIDE ( rom_iq_est_enable = 0x40006430 );
|
||||
PROVIDE ( rom_linear_to_db = 0x40006484 );
|
||||
PROVIDE ( rom_mhz2ieee = 0x400065a4 );
|
||||
PROVIDE ( rom_pbus_dco___SA2 = 0x40007bf0 );
|
||||
PROVIDE ( rom_pbus_debugmode = 0x4000737c );
|
||||
PROVIDE ( rom_pbus_enter_debugmode = 0x40007410 );
|
||||
PROVIDE ( rom_pbus_exit_debugmode = 0x40007448 );
|
||||
PROVIDE ( rom_pbus_force_test = 0x4000747c );
|
||||
PROVIDE ( rom_pbus_rd = 0x400074d8 );
|
||||
PROVIDE ( rom_pbus_set_rxgain = 0x4000754c );
|
||||
PROVIDE ( rom_pbus_set_txgain = 0x40007610 );
|
||||
PROVIDE ( rom_pbus_workmode = 0x40007648 );
|
||||
PROVIDE ( rom_pbus_xpd_rx_off = 0x40007688 );
|
||||
PROVIDE ( rom_pbus_xpd_rx_on = 0x400076cc );
|
||||
PROVIDE ( rom_pbus_xpd_tx_off = 0x400076fc );
|
||||
PROVIDE ( rom_pbus_xpd_tx_on = 0x40007740 );
|
||||
PROVIDE ( rom_pbus_xpd_tx_on__low_gain = 0x400077a0 );
|
||||
PROVIDE ( rom_phy_reset_req = 0x40007804 );
|
||||
PROVIDE ( rom_restart_cal = 0x4000781c );
|
||||
PROVIDE ( rom_rfcal_pwrctrl = 0x40007eb4 );
|
||||
PROVIDE ( rom_rfcal_rxiq = 0x4000804c );
|
||||
PROVIDE ( rom_rfcal_rxiq_set_reg = 0x40008264 );
|
||||
PROVIDE ( rom_rfcal_txcap = 0x40008388 );
|
||||
PROVIDE ( rom_rfcal_txiq = 0x40008610 );
|
||||
PROVIDE ( rom_rfcal_txiq_cover = 0x400088b8 );
|
||||
PROVIDE ( rom_rfcal_txiq_set_reg = 0x40008a70 );
|
||||
PROVIDE ( rom_rfpll_reset = 0x40007868 );
|
||||
PROVIDE ( rom_rfpll_set_freq = 0x40007968 );
|
||||
PROVIDE ( rom_rxiq_cover_mg_mp = 0x40008b6c );
|
||||
PROVIDE ( rom_rxiq_get_mis = 0x40006628 );
|
||||
PROVIDE ( rom_sar_init = 0x40006738 );
|
||||
PROVIDE ( rom_set_ana_inf_tx_scale = 0x4000678c );
|
||||
PROVIDE ( rom_set_channel_freq = 0x40006c50 );
|
||||
PROVIDE ( rom_set_loopback_gain = 0x400067c8 );
|
||||
PROVIDE ( rom_set_noise_floor = 0x40006830 );
|
||||
PROVIDE ( rom_set_rxclk_en = 0x40006550 );
|
||||
PROVIDE ( rom_set_txbb_atten = 0x40008c6c );
|
||||
PROVIDE ( rom_set_txclk_en = 0x4000650c );
|
||||
PROVIDE ( rom_set_txiq_cal = 0x40008d34 );
|
||||
PROVIDE ( rom_start_noisefloor = 0x40006874 );
|
||||
PROVIDE ( rom_start_tx_tone = 0x400068b4 );
|
||||
PROVIDE ( rom_stop_tx_tone = 0x4000698c );
|
||||
PROVIDE ( rom_tx_mac_disable = 0x40006a98 );
|
||||
PROVIDE ( rom_tx_mac_enable = 0x40006ad4 );
|
||||
PROVIDE ( rom_txtone_linear_pwr = 0x40006a1c );
|
||||
PROVIDE ( rom_write_rfpll_sdm = 0x400078dc );
|
||||
PROVIDE ( roundup2 = 0x400031b4 );
|
||||
PROVIDE ( rtc_enter_sleep = 0x40002870 );
|
||||
PROVIDE ( rtc_get_reset_reason = 0x400025e0 );
|
||||
PROVIDE ( rtc_intr_handler = 0x400029ec );
|
||||
PROVIDE ( rtc_set_sleep_mode = 0x40002668 );
|
||||
PROVIDE ( save_rxbcn_mactime = 0x400027a4 );
|
||||
PROVIDE ( save_tsf_us = 0x400027ac );
|
||||
PROVIDE ( send_packet = 0x40003c80 );
|
||||
PROVIDE ( sha1_prf = 0x4000ba48 );
|
||||
PROVIDE ( sha1_vector = 0x4000a2ec );
|
||||
PROVIDE ( sip_alloc_to_host_evt = 0x40005180 );
|
||||
PROVIDE ( sip_get_ptr = 0x400058a8 );
|
||||
PROVIDE ( sip_get_state = 0x40005668 );
|
||||
PROVIDE ( sip_init_attach = 0x4000567c );
|
||||
PROVIDE ( sip_install_rx_ctrl_cb = 0x4000544c );
|
||||
PROVIDE ( sip_install_rx_data_cb = 0x4000545c );
|
||||
PROVIDE ( sip_post = 0x400050fc );
|
||||
PROVIDE ( sip_post_init = 0x400056c4 );
|
||||
PROVIDE ( sip_reclaim_from_host_cmd = 0x4000534c );
|
||||
PROVIDE ( sip_reclaim_tx_data_pkt = 0x400052c0 );
|
||||
PROVIDE ( sip_send = 0x40005808 );
|
||||
PROVIDE ( sip_to_host_chain_append = 0x40005864 );
|
||||
PROVIDE ( sip_to_host_evt_send_done = 0x40005234 );
|
||||
PROVIDE ( slc_add_credits = 0x400060ac );
|
||||
PROVIDE ( slc_enable = 0x40005d90 );
|
||||
PROVIDE ( slc_from_host_chain_fetch = 0x40005f24 );
|
||||
PROVIDE ( slc_from_host_chain_recycle = 0x40005e94 );
|
||||
PROVIDE ( slc_init_attach = 0x40005c50 );
|
||||
PROVIDE ( slc_init_credit = 0x4000608c );
|
||||
PROVIDE ( slc_pause_from_host = 0x40006014 );
|
||||
PROVIDE ( slc_reattach = 0x40005c1c );
|
||||
PROVIDE ( slc_resume_from_host = 0x4000603c );
|
||||
PROVIDE ( slc_select_tohost_gpio = 0x40005dc0 );
|
||||
PROVIDE ( slc_select_tohost_gpio_mode = 0x40005db8 );
|
||||
PROVIDE ( slc_send_to_host_chain = 0x40005de4 );
|
||||
PROVIDE ( slc_set_host_io_max_window = 0x40006068 );
|
||||
PROVIDE ( slc_to_host_chain_recycle = 0x40005f10 );
|
||||
PROVIDE ( software_reset = 0x4000264c );
|
||||
PROVIDE ( spi_flash_attach = 0x40004644 );
|
||||
PROVIDE ( srand = 0x400005f0 );
|
||||
PROVIDE ( strcmp = 0x4000bdc8 );
|
||||
PROVIDE ( strcpy = 0x4000bec8 );
|
||||
PROVIDE ( strlen = 0x4000bf4c );
|
||||
PROVIDE ( strncmp = 0x4000bfa8 );
|
||||
PROVIDE ( strncpy = 0x4000c0a0 );
|
||||
PROVIDE ( strstr = 0x4000e1e0 );
|
||||
PROVIDE ( timer_insert = 0x40002c64 );
|
||||
PROVIDE ( uartAttach = 0x4000383c );
|
||||
PROVIDE ( uart_baudrate_detect = 0x40003924 );
|
||||
PROVIDE ( uart_buff_switch = 0x400038a4 );
|
||||
PROVIDE ( uart_div_modify = 0x400039d8 );
|
||||
PROVIDE ( uart_rx_intr_handler = 0x40003bbc );
|
||||
PROVIDE ( uart_rx_one_char = 0x40003b8c );
|
||||
PROVIDE ( uart_rx_one_char_block = 0x40003b64 );
|
||||
PROVIDE ( uart_rx_readbuff = 0x40003ec8 );
|
||||
PROVIDE ( uart_tx_one_char = 0x40003b30 );
|
||||
PROVIDE ( wepkey_128 = 0x4000bc40 );
|
||||
PROVIDE ( wepkey_64 = 0x4000bb3c );
|
||||
PROVIDE ( xthal_bcopy = 0x40000688 );
|
||||
PROVIDE ( xthal_copy123 = 0x4000074c );
|
||||
PROVIDE ( xthal_get_ccompare = 0x4000dd4c );
|
||||
PROVIDE ( xthal_get_ccount = 0x4000dd38 );
|
||||
PROVIDE ( xthal_get_interrupt = 0x4000dd58 );
|
||||
PROVIDE ( xthal_get_intread = 0x4000dd58 );
|
||||
PROVIDE ( xthal_memcpy = 0x400006c4 );
|
||||
PROVIDE ( xthal_set_ccompare = 0x4000dd40 );
|
||||
PROVIDE ( xthal_set_intclear = 0x4000dd60 );
|
||||
PROVIDE ( xthal_spill_registers_into_stack_nw = 0x4000e320 );
|
||||
PROVIDE ( xthal_window_spill = 0x4000e324 );
|
||||
PROVIDE ( xthal_window_spill_nw = 0x4000e320 );
|
||||
|
||||
PROVIDE ( Te0 = 0x3fffccf0 );
|
||||
PROVIDE ( UartDev = 0x3fffde10 );
|
||||
PROVIDE ( flashchip = 0x3fffc714);
|
||||
BIN
hardware/tools/esp8266/sdk/lib/libhal.a
Normal file
BIN
hardware/tools/esp8266/sdk/lib/libhal.a
Normal file
Binary file not shown.
BIN
hardware/tools/esp8266/sdk/lib/liblwip.a
Executable file
BIN
hardware/tools/esp8266/sdk/lib/liblwip.a
Executable file
Binary file not shown.
BIN
hardware/tools/esp8266/sdk/lib/libmain.a
Executable file
BIN
hardware/tools/esp8266/sdk/lib/libmain.a
Executable file
Binary file not shown.
BIN
hardware/tools/esp8266/sdk/lib/libnet80211.a
Executable file
BIN
hardware/tools/esp8266/sdk/lib/libnet80211.a
Executable file
Binary file not shown.
BIN
hardware/tools/esp8266/sdk/lib/libphy.a
Executable file
BIN
hardware/tools/esp8266/sdk/lib/libphy.a
Executable file
Binary file not shown.
BIN
hardware/tools/esp8266/sdk/lib/libssl.a
Executable file
BIN
hardware/tools/esp8266/sdk/lib/libssl.a
Executable file
Binary file not shown.
BIN
hardware/tools/esp8266/sdk/lib/libwpa.a
Executable file
BIN
hardware/tools/esp8266/sdk/lib/libwpa.a
Executable file
Binary file not shown.
1
hardware/tools/esp8266/sdk/version
Normal file
1
hardware/tools/esp8266/sdk/version
Normal file
@ -0,0 +1 @@
|
||||
0.9.2
|
||||
Reference in New Issue
Block a user