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Merge branch 'master' of ../wifishield

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This commit is contained in:
David A. Mellis
2012-09-13 10:42:25 -04:00
parent 8ea885bdf0 a536108ee2
commit 9dc3810f41
270 changed files with 147275 additions and 0 deletions
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#!/bin/sh
WIFI_FW_PATH="/hardware/arduino/firmwares/wifi-shield"
AVR_TOOLS_PATH="/hardware/tools/avr/bin"
progname=$0
usage () {
cat <<EOF
Usage: $progname [-a Arduino_path] [-f which_firmware] [-h]
-a set the path where the Arduino IDE is installed
-f the firmware you want to upload, valid parameters are:
shield - to upgrade the WiFi shield firmware
all - to upgrade both firmwares
-h help
EOF
exit 0
}
upgradeHDmodule () {
sleep 1 # Give time to the shield to end the boot
echo "****Upgrade HD WiFi module firmware****\n"
dfu-programmer at32uc3a1256 erase
dfu-programmer at32uc3a1256 flash --suppress-bootloader-mem $WIFI_FW_PATH/wifi_dnld.hex
dfu-programmer at32uc3a1256 start
echo -n "\nRemove the J3 jumper then press the RESET button on the shield then type [ENTER] to upgrade the firmware of the shield..\n"
read readEnter
}
upgradeShield () {
sleep 1 # Give time to the shield to end the boot
echo "****Upgrade WiFi Shield firmware****\n"
dfu-programmer at32uc3a1256 erase
dfu-programmer at32uc3a1256 flash --suppress-bootloader-mem $WIFI_FW_PATH/wifiHD.hex
dfu-programmer at32uc3a1256 start
echo "\nDone. Remove the J3 jumper and press the RESET button on the shield."
echo "Thank you!\n"
}
cat <<EOF
Arduino WiFi Shield upgrade
=========================================
Disclaimer: to access to the USB devices correctly, the dfu-programmer needs to be used as root. Run this script as root.
EOF
if [ $USER = 'root' ] ; then #check if the current user is root
while getopts ":a:f:h" opt; do
case $opt in
a)
ARDUINO_PATH=$OPTARG
WIFI_FW_PATH=$ARDUINO_PATH$WIFI_FW_PATH
AVR_TOOLS_PATH=$ARDUINO_PATH$AVR_TOOLS_PATH
cd $AVR_TOOLS_PATH
./avr-objcopy --output-target=ihex $WIFI_FW_PATH/wifi_dnld.elf $WIFI_FW_PATH/wifi_dnld.hex
./avr-objcopy --output-target=ihex $WIFI_FW_PATH/wifiHD.elf $WIFI_FW_PATH/wifiHD.hex
;;
f)
if [ "$ARDUINO_PATH" != "" ] ; then
if [ "$OPTARG" = "all" ] ; then
upgradeHDmodule
upgradeShield
exit 0
else
if [ "$OPTARG" = "shield" ] ; then
upgradeShield
exit 0
else
echo "invalid parameter for the -f [firmware] option, please retry."
echo "Type -h for help\n"
exit 1
fi
fi
else
echo "Arduino Path not setted. Retry...\n"
fi
;;
h)
usage ;;
\?)
echo "Invalid option: $OPTARG" >&2
usage
exit 1
;;
:)
echo "Option -$OPTARG requires an argument." >&2
exit 1
;;
esac
done
else
echo "You are not root!\n"
fi
shift $(($OPTIND - 1))

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hardware/arduino/firmwares/wifishield/scripts/ArduinoWifiShield_upgrade_mac.sh Normal file
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#!/bin/sh
WIFI_FW_PATH="/hardware/arduino/firmwares/wifi-shield"
AVR_TOOLS_PATH="/hardware/tools/avr/bin"
progname=$0
usage () {
cat <<EOF
Usage: $progname [-a Arduino_path] [-f which_firmware] [-h]
-a set the path where the Arduino IDE is installed
-f the firmware you want to upload, valid parameters are:
shield - to upgrade the WiFi shield firmware
all - to upgrade both firmwares
-h help
EOF
exit 0
}
upgradeHDmodule () {
sleep 1 # Give time to the shield to end the boot
echo "****Upgrade HD WiFi module firmware****\n"
dfu-programmer at32uc3a1256 erase
dfu-programmer at32uc3a1256 flash --suppress-bootloader-mem $WIFI_FW_PATH/wifi_dnld.hex
dfu-programmer at32uc3a1256 start
echo -n "\nRemove the J3 jumper then press the RESET button on the shield then type [ENTER] to upgrade the firmware of the shield..\n"
read readEnter
}
upgradeShield () {
sleep 1 # Give time to the shield to end the boot
echo "****Upgrade WiFi Shield firmware****\n"
dfu-programmer at32uc3a1256 erase
dfu-programmer at32uc3a1256 flash --suppress-bootloader-mem $WIFI_FW_PATH/wifiHD.hex
dfu-programmer at32uc3a1256 start
echo "\nDone. Remove the J3 jumper and press the RESET button on the shield."
echo "Thank you!\n"
}
cat <<EOF
Arduino WiFi Shield upgrade
=========================================
Disclaimer: to access to the USB devices correctly, the dfu-programmer needs to be used as root. Run this script as root.
EOF
if [ $USER = 'root' ] ; then #check if the current user is root
while getopts ":a:f:h" opt; do
case $opt in
a)
ARDUINO_PATH=$OPTARG
WIFI_FW_PATH=$ARDUINO_PATH$WIFI_FW_PATH
AVR_TOOLS_PATH=$ARDUINO_PATH$AVR_TOOLS_PATH
cd $AVR_TOOLS_PATH
./avr-objcopy --output-target=ihex $WIFI_FW_PATH/wifi_dnld.elf $WIFI_FW_PATH/wifi_dnld.hex
./avr-objcopy --output-target=ihex $WIFI_FW_PATH/wifiHD.elf $WIFI_FW_PATH/wifiHD.hex
;;
f)
if [ "$ARDUINO_PATH" != "" ] ; then
if [ "$OPTARG" = "all" ] ; then
upgradeHDmodule
upgradeShield
exit 0
else
if [ "$OPTARG" = "shield" ] ; then
upgradeShield
exit 0
else
echo "invalid parameter for the -f [firmware] option, please retry."
echo "Type -h for help\n"
exit 1
fi
fi
else
echo "Arduino Path not setted. Retry...\n"
fi
;;
h)
usage ;;
\?)
echo "Invalid option: $OPTARG" >&2
usage
exit 1
;;
:)
echo "Option -$OPTARG requires an argument." >&2
exit 1
;;
esac
done
else
echo "You are not root!\n"
fi
shift $(($OPTIND - 1))

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<?xml version="1.0" encoding="UTF-8"?>
<projectDescription>
<name>wifiHD</name>
<comment></comment>
<projects>
</projects>
<buildSpec>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.genmakebuilder</name>
<triggers>clean,full,incremental,</triggers>
<arguments>
<dictionary>
<key>?name?</key>
<value></value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.append_environment</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildArguments</key>
<value></value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildCommand</key>
<value>make</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.buildLocation</key>
<value>${workspace_loc:/wifiHD/Debug}</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.contents</key>
<value>org.eclipse.cdt.make.core.activeConfigSettings</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableAutoBuild</key>
<value>false</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableCleanBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.enableFullBuild</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.stopOnError</key>
<value>true</value>
</dictionary>
<dictionary>
<key>org.eclipse.cdt.make.core.useDefaultBuildCmd</key>
<value>true</value>
</dictionary>
</arguments>
</buildCommand>
<buildCommand>
<name>org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder</name>
<arguments>
</arguments>
</buildCommand>
</buildSpec>
<natures>
<nature>com.atmel.avr32.core.nature</nature>
<nature>org.eclipse.cdt.core.cnature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.managedBuildNature</nature>
<nature>org.eclipse.cdt.managedbuilder.core.ScannerConfigNature</nature>
</natures>
<linkedResources>
<link>
<name>UC3 Software Framework</name>
<type>2</type>
<locationURI>framework:/com.atmel.avr32.sf.uc3</locationURI>
</link>
</linkedResources>
</projectDescription>

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Memory access control configuration file.
*
* This file contains the possible external configuration of the memory access
* control.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _CONF_ACCESS_H_
#define _CONF_ACCESS_H_
#include "compiler.h"
#include "board.h"
/*! \name Activation of Logical Unit Numbers
*/
//! @{
#define LUN_0 DISABLE //!< On-Chip Virtual Memory.
#define LUN_1 ENABLE //!< AT45DBX Data Flash.
#define LUN_2 DISABLE //!< SD/MMC Card over SPI.
#define LUN_3 DISABLE
#define LUN_4 DISABLE
#define LUN_5 DISABLE
#define LUN_6 DISABLE
#define LUN_7 DISABLE
#define LUN_USB DISABLE //!< Host Mass-Storage Memory.
//! @}
/*! \name LUN 0 Definitions
*/
//! @{
#define VIRTUAL_MEM LUN_0
#define LUN_ID_VIRTUAL_MEM LUN_ID_0
#define LUN_0_INCLUDE "virtual_mem.h"
#define Lun_0_test_unit_ready virtual_test_unit_ready
#define Lun_0_read_capacity virtual_read_capacity
#define Lun_0_wr_protect virtual_wr_protect
#define Lun_0_removal virtual_removal
#define Lun_0_usb_read_10 virtual_usb_read_10
#define Lun_0_usb_write_10 virtual_usb_write_10
#define Lun_0_mem_2_ram virtual_mem_2_ram
#define Lun_0_ram_2_mem virtual_ram_2_mem
#define LUN_0_NAME "\"On-Chip Virtual Memory\""
//! @}
/*! \name LUN 1 Definitions
*/
//! @{
#define AT45DBX_MEM LUN_1
#define LUN_ID_AT45DBX_MEM LUN_ID_1
#define LUN_1_INCLUDE "at45dbx_mem.h"
#define Lun_1_test_unit_ready at45dbx_test_unit_ready
#define Lun_1_read_capacity at45dbx_read_capacity
#define Lun_1_wr_protect at45dbx_wr_protect
#define Lun_1_removal at45dbx_removal
#define Lun_1_usb_read_10 at45dbx_usb_read_10
#define Lun_1_usb_write_10 at45dbx_usb_write_10
#define Lun_1_mem_2_ram at45dbx_df_2_ram
#define Lun_1_ram_2_mem at45dbx_ram_2_df
#define LUN_1_NAME "\"AT45DBX Data Flash\""
//! @}
/*! \name LUN 2 Definitions
*/
//! @{
#define SD_MMC_SPI_MEM LUN_2
#define LUN_ID_SD_MMC_SPI_MEM LUN_ID_2
#define LUN_2_INCLUDE "sd_mmc_spi_mem.h"
#define Lun_2_test_unit_ready sd_mmc_spi_test_unit_ready
#define Lun_2_read_capacity sd_mmc_spi_read_capacity
#define Lun_2_wr_protect sd_mmc_spi_wr_protect
#define Lun_2_removal sd_mmc_spi_removal
#define Lun_2_usb_read_10 sd_mmc_spi_usb_read_10
#define Lun_2_usb_write_10 sd_mmc_spi_usb_write_10
#define Lun_2_mem_2_ram sd_mmc_spi_mem_2_ram
#define Lun_2_ram_2_mem sd_mmc_spi_ram_2_mem
#define LUN_2_NAME "\"SD/MMC Card over SPI\""
//! @}
/*! \name USB LUNs Definitions
*/
//! @{
#define MEM_USB LUN_USB
#define LUN_ID_MEM_USB LUN_ID_USB
#define LUN_USB_INCLUDE "host_mem.h"
#define Lun_usb_test_unit_ready(lun) host_test_unit_ready(lun)
#define Lun_usb_read_capacity(lun, nb_sect) host_read_capacity(lun, nb_sect)
#define Lun_usb_read_sector_size(lun) host_read_sector_size(lun)
#define Lun_usb_wr_protect(lun) host_wr_protect(lun)
#define Lun_usb_removal() host_removal()
#define Lun_usb_mem_2_ram(addr, ram) host_read_10_ram(addr, ram)
#define Lun_usb_ram_2_mem(addr, ram) host_write_10_ram(addr, ram)
#define LUN_USB_NAME "\"Host Mass-Storage Memory\""
//! @}
/*! \name Actions Associated with Memory Accesses
*
* Write here the action to associate with each memory access.
*
* \warning Be careful not to waste time in order not to disturb the functions.
*/
//! @{
#define memory_start_read_action(nb_sectors)
#define memory_stop_read_action()
#define memory_start_write_action(nb_sectors)
#define memory_stop_write_action()
//! @}
/*! \name Activation of Interface Features
*/
//! @{
#define ACCESS_USB DISABLED //!< MEM <-> USB interface.
#define ACCESS_MEM_TO_RAM ENABLED //!< MEM <-> RAM interface.
#define ACCESS_STREAM ENABLED //!< Streaming MEM <-> MEM interface. //mlf
#define ACCESS_STREAM_RECORD DISABLED //!< Streaming MEM <-> MEM interface in record mode.
#define ACCESS_MEM_TO_MEM DISABLED //!< MEM <-> MEM interface.
#define ACCESS_CODEC DISABLED //!< Codec interface.
//! @}
/*! \name Specific Options for Access Control
*/
//! @{
#define GLOBAL_WR_PROTECT DISABLED //!< Management of a global write protection.
//! @}
#endif // _CONF_ACCESS_H_

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT45DBX configuration file.
*
* This file contains the possible external configuration of the AT45DBX.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SPI module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _CONF_AT45DBX_H_
#define _CONF_AT45DBX_H_
#include "conf_access.h"
#if AT45DBX_MEM == DISABLE
#error conf_at45dbx.h is #included although AT45DBX_MEM is disabled
#endif
#include "at45dbx.h"
//_____ D E F I N I T I O N S ______________________________________________
//! Size of AT45DBX data flash memories to manage.
#define AT45DBX_MEM_SIZE AT45DBX_1MB
//! Number of AT45DBX components to manage.
#define AT45DBX_MEM_CNT 1
//! First chip select used by AT45DBX components on the SPI module instance.
//! AT45DBX_SPI_NPCS0_PIN always corresponds to this first NPCS, whatever it is.
#define AT45DBX_SPI_FIRST_NPCS AT45DBX_SPI_NPCS
//! SPI master speed in Hz.
#define AT45DBX_SPI_MASTER_SPEED 12000000
//! Number of bits in each SPI transfer.
#define AT45DBX_SPI_BITS 8
#endif // _CONF_AT45DBX_H_

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief CONF_EBI EBI/SMC driver for AVR32 UC3.
*
* \note The values defined in this file are device-specific. See the device
* datasheet for further information.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SMC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _CONF_EBI_H_
#define _CONF_EBI_H_
#include "compiler.h"
#include "board.h"
#if (ET024006DHU_SMC_USE_NCS == 0)
#define SMC_USE_NCS0
#define SMC_COMPONENT_CS0 ET024006DHU_SMC_COMPONENT_CS
#else
#if (ET024006DHU_SMC_USE_NCS == 2)
#define SMC_USE_NCS2
#define SMC_COMPONENT_CS2 ET024006DHU_SMC_COMPONENT_CS
#else
#error This board is not supported
#endif
#endif
#define EBI_DATA_0 ET024006DHU_EBI_DATA_0
#define EBI_DATA_1 ET024006DHU_EBI_DATA_1
#define EBI_DATA_2 ET024006DHU_EBI_DATA_2
#define EBI_DATA_3 ET024006DHU_EBI_DATA_3
#define EBI_DATA_4 ET024006DHU_EBI_DATA_4
#define EBI_DATA_5 ET024006DHU_EBI_DATA_5
#define EBI_DATA_6 ET024006DHU_EBI_DATA_6
#define EBI_DATA_7 ET024006DHU_EBI_DATA_7
#define EBI_DATA_8 ET024006DHU_EBI_DATA_8
#define EBI_DATA_9 ET024006DHU_EBI_DATA_9
#define EBI_DATA_10 ET024006DHU_EBI_DATA_10
#define EBI_DATA_11 ET024006DHU_EBI_DATA_11
#define EBI_DATA_12 ET024006DHU_EBI_DATA_12
#define EBI_DATA_13 ET024006DHU_EBI_DATA_13
#define EBI_DATA_14 ET024006DHU_EBI_DATA_14
#define EBI_DATA_15 ET024006DHU_EBI_DATA_15
#if BOARD==EVK1105
#ifdef EVK1105_REV3
#define EBI_ADDR_19 AVR32_EBI_ADDR_19
#define EBI_NCS_2 ET024006DHU_EBI_NCS
#else
#define EBI_ADDR_21 ET024006DHU_EBI_ADDR_21
#define EBI_NCS_0 ET024006DHU_EBI_NCS
#endif
#elif BOARD == UC3C_EK
#define EBI_ADDR_22 AVR32_EBI_ADDR_22
#define EBI_NCS_0 ET024006DHU_EBI_NCS
#elif BOARD == EVK1104
#define EBI_ADDR_21 ET024006DHU_EBI_ADDR_21
#define EBI_NCS_0 ET024006DHU_EBI_NCS
#endif
#define EBI_NWE0 ET024006DHU_EBI_NWE
#define EBI_NRD ET024006DHU_EBI_NRD
#endif // _CONF_EBI_H_

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief SD/MMC configuration file.
*
* This file contains the possible external configuration of the SD/MMC.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SPI module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _CONF_SD_MMC_SPI_H_
#define _CONF_SD_MMC_SPI_H_
#include "conf_access.h"
#if SD_MMC_SPI_MEM == DISABLE
#error conf_sd_mmc_spi.h is #included although SD_MMC_SPI_MEM is disabled
#endif
#include "sd_mmc_spi.h"
//_____ D E F I N I T I O N S ______________________________________________
//! SPI master speed in Hz.
#define SD_MMC_SPI_MASTER_SPEED 12000000
//! Number of bits in each SPI transfer.
#define SD_MMC_SPI_BITS 8
#endif // _CONF_SD_MMC_SPI_H_

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/* This file is part of the ATMEL AVR32-SoftwareFramework-AT32UC3A-1.4.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AVR32 UC3 ISP trampoline.
*
* In order to be able to program a project with both BatchISP and JTAGICE mkII
* without having to take the general-purpose fuses into consideration, add this
* file to the project and change the program entry point to _trampoline.
*
* The pre-programmed ISP will be erased if JTAGICE mkII is used.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32UC devices can be used.
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (C) 2006-2008, Atmel Corporation All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of ATMEL may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE EXPRESSLY AND
* SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR ANY DIRECT,
* INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
* THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*/
#include "conf_isp.h"
//! @{
//! \verbatim
// This must be linked @ 0x80000000 if it is to be run upon reset.
.section .reset, "ax", @progbits
.global _trampoline
.type _trampoline, @function
_trampoline:
// Jump to program start.
rjmp program_start
.org PROGRAM_START_OFFSET
program_start:
// Jump to the C runtime startup routine.
lda.w pc, _stext
//! \endverbatim
//! @}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1100 board header file.
*
* This file contains definitions and services related to the features of the
* EVK1100 board rev. B and C.
*
* To use this board, define BOARD=EVK1100.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _ARDUINO_H_
#define _ARDUINO_H_
#include "compiler.h"
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
# include "led.h"
#endif // __AVR32_ABI_COMPILER__
/*! \name Oscillator Definitions
*/
//! @{
// RCOsc has no custom calibration by default. Set the following definition to
// the appropriate value if a custom RCOsc calibration has been applied to your
// part.
//#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< RCOsc frequency: Hz.
#define FOSC32 32768 //!< Osc32 frequency: Hz.
#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods.
#define FOSC0 12000000 //!< Osc0 frequency: Hz.
#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods.
// Osc1 crystal is not mounted by default. Set the following definitions to the
// appropriate values if a custom Osc1 crystal is mounted on your board.
//#define FOSC1 12000000 //!< Osc1 frequency: Hz.
//#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods.
//! @}
//! Number of LEDs.
#define LED_COUNT 0
/*! \name GPIO Connections of LEDs
*/
//! @{
#define LED0_GPIO AVR32_PIN_PB19
#define LED1_GPIO AVR32_PIN_PB20
#define LED2_GPIO AVR32_PIN_PB21
#define DEB_PIN_GPIO AVR32_PIN_PA20
//! @}
/*! \name PWM Channels of LEDs
*/
//! @{
#define LED0_PWM 0
#define LED1_PWM 1
#define LED2_PWM 2
//! @}
/*! \name PWM Functions of LEDs
*/
//! @{
#define LED0_PWM_FUNCTION AVR32_PWM_0_FUNCTION
#define LED1_PWM_FUNCTION AVR32_PWM_1_FUNCTION
#define LED2_PWM_FUNCTION AVR32_PWM_2_FUNCTION
//! @}
/*! \name Color Identifiers of LEDs to Use with LED Functions
*/
//! @{
#define LED_MONO0_GREEN LED0
#define LED_MONO1_RED LED1
#define LED_MONO2_BLU LED2
//! @}
#if 0
/*! \name SPI Connections of the DIP204 LCD
*/
//! @{
#define DIP204_SPI (&AVR32_SPI1)
#define DIP204_SPI_NPCS 2
#define DIP204_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN
#define DIP204_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION
#define DIP204_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN
#define DIP204_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION
#define DIP204_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN
#define DIP204_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION
#define DIP204_SPI_NPCS_PIN AVR32_SPI1_NPCS_2_0_PIN
#define DIP204_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_2_0_FUNCTION
//! @}
/*! \name GPIO and PWM Connections of the DIP204 LCD Backlight
*/
//! @{
#define DIP204_BACKLIGHT_PIN AVR32_PIN_PB18
#define DIP204_PWM_CHANNEL 6
#define DIP204_PWM_PIN AVR32_PWM_6_PIN
#define DIP204_PWM_FUNCTION AVR32_PWM_6_FUNCTION
//! @}
#endif
/*! \name SPI Connections of the AT45DBX Data Flash Memory
*/
//! @{
#define AT45DBX_SPI (&AVR32_SPI1)
#define AT45DBX_SPI_NPCS 2
#define AT45DBX_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN
#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION
#define AT45DBX_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN
#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION
#define AT45DBX_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN
#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION
#define AT45DBX_SPI_NPCS2_PIN AVR32_SPI1_NPCS_2_0_PIN
#define AT45DBX_SPI_NPCS2_FUNCTION AVR32_SPI1_NPCS_2_0_FUNCTION
#define AT45DBX_CHIP_RESET AVR32_PIN_PA02
//! @}
/*! \name GPIO and SPI Connections of the SD/MMC Connector
*/
//! @{
//#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02
//#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA07
#define SD_MMC_SPI (&AVR32_SPI1)
#define SD_MMC_SPI_NPCS 1
#define SD_MMC_SPI_SCK_PIN AVR32_SPI1_SCK_0_0_PIN
#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI1_SCK_0_0_FUNCTION
#define SD_MMC_SPI_MISO_PIN AVR32_SPI1_MISO_0_0_PIN
#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI1_MISO_0_0_FUNCTION
#define SD_MMC_SPI_MOSI_PIN AVR32_SPI1_MOSI_0_0_PIN
#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI1_MOSI_0_0_FUNCTION
#define SD_MMC_SPI_NPCS_PIN AVR32_SPI1_NPCS_1_0_PIN
#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_1_0_FUNCTION
//! @}
/* Timer Counter to generate clock for WiFi chip*/
# define WIFI_TC (&AVR32_TC)
# define WIFI_TC_CHANNEL_ID 0
# define WIFI_TC_CHANNEL_PIN AVR32_TC_A0_0_0_PIN
# define WIFI_TC_CHANNEL_FUNCTION AVR32_TC_A0_0_0_FUNCTION
// Note that TC_A0_0_0 pin is pin 6 (PB23) on AT32UC3A1512 QFP100.
/* Pin related to WiFi chip communication */
#ifndef USE_POLL
#define USE_POLL
#endif
#define SPI_CS 0
#define AVR32_SPI AVR32_SPI1
#define GPIO_IRQ_PIN AVR32_PIN_PA03
#define GPIO_IRQ AVR32_GPIO_IRQ_7
#define GPIO_W_RESET_PIN AVR32_PIN_PA07
#define GPIO_W_SHUTDOWN_PIN AVR32_PIN_PA09
/* Pin related to shield communication */
#define ARDUINO_HANDSHAKE_PIN AVR32_PIN_PA25
#define ARDUINO_EXTINT_PIN AVR32_PIN_PA04 //not used
#define AVR32_PDCA_PID_TX AVR32_PDCA_PID_SPI1_TX
#define AVR32_PDCA_PID_RX AVR32_PDCA_PID_SPI1_RX
#if 0
/*! \name TWI Connections of the Spare TWI Connector
*/
//! @{
#define SPARE_TWI (&AVR32_TWI)
#define SPARE_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN
#define SPARE_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION
#define SPARE_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN
#define SPARE_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION
//! @}
/*! \name SPI Connections of the Spare SPI Connector
*/
//! @{
#define SPARE_SPI (&AVR32_SPI0)
#define SPARE_SPI_NPCS 0
#define SPARE_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN
#define SPARE_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION
#define SPARE_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN
#define SPARE_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION
#define SPARE_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN
#define SPARE_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION
#define SPARE_SPI_NPCS_PIN AVR32_SPI0_NPCS_0_0_PIN
#define SPARE_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_0_0_FUNCTION
//! @}
#endif
#endif // _ARDUINO_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1100 board LEDs support package.
*
* This file contains definitions and services related to the LED features of
* the EVK1100 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include <avr32/io.h>
#include "preprocessor.h"
#include "compiler.h"
#include "arduino.h"
#include "led.h"
//! Structure describing LED hardware connections.
typedef const struct
{
struct
{
U32 PORT; //!< LED GPIO port.
U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port.
} GPIO; //!< LED GPIO descriptor.
struct
{
S32 CHANNEL; //!< LED PWM channel (< 0 if N/A).
S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A).
} PWM; //!< LED PWM descriptor.
} tLED_DESCRIPTOR;
//! Hardware descriptors of all LEDs.
static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
{
#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \
{ \
{LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\
{LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \
},
MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~)
#undef INSERT_LED_DESCRIPTOR
};
//! Saved state of all LEDs.
static volatile U32 LED_State = (1 << LED_COUNT) - 1;
U32 LED_Read_Display(void)
{
return LED_State;
}
void LED_Display(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor;
volatile avr32_gpio_port_t *led_gpio_port;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
LED_State = leds;
// For all LEDs...
for (led_descriptor = &LED_DESCRIPTOR[0];
led_descriptor < LED_DESCRIPTOR + LED_COUNT;
led_descriptor++)
{
// Set the LED to the requested state.
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
}
}
U32 LED_Read_Display_Mask(U32 mask)
{
return Rd_bits(LED_State, mask);
}
void LED_Display_Mask(U32 mask, U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
mask &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Wr_bits(LED_State, mask, leds);
// While there are specified LEDs left to manage...
while (mask)
{
// Select the next specified LED and set it to the requested state.
led_shift = 1 + ctz(mask);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
leds >>= led_shift - 1;
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
mask >>= led_shift;
}
}
Bool LED_Test(U32 leds)
{
return Tst_bits(LED_State, leds);
}
void LED_Off(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Clr_bits(LED_State, leds);
// While there are specified LEDs left to manage...
while (leds)
{
// Select the next specified LED and turn it off.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_On(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Set_bits(LED_State, leds);
// While there are specified LEDs left to manage...
while (leds)
{
// Select the next specified LED and turn it on.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_Toggle(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Tgl_bits(LED_State, leds);
// While there are specified LEDs left to manage...
while (leds)
{
// Select the next specified LED and toggle it.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
U32 LED_Read_Display_Field(U32 field)
{
return Rd_bitfield(LED_State, field);
}
void LED_Display_Field(U32 field, U32 leds)
{
// Move the bit-field to the appropriate position for the bit-mask.
LED_Display_Mask(field, leds << ctz(field));
}
U8 LED_Get_Intensity(U32 led)
{
tLED_DESCRIPTOR *led_descriptor;
// Check that the argument value is valid.
led = ctz(led);
led_descriptor = &LED_DESCRIPTOR[led];
if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;
// Return the duty cycle value if the LED PWM channel is enabled, else 0.
return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?
AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;
}
void LED_Set_Intensity(U32 leds, U8 intensity)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_pwm_channel_t *led_pwm_channel;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// For each specified LED...
for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)
{
// Select the next specified LED and check that it has a PWM channel.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
if (led_descriptor->PWM.CHANNEL < 0) continue;
// Initialize or update the LED PWM channel.
led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];
if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))
{
led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &
~(AVR32_PWM_CALG_MASK |
AVR32_PWM_CPOL_MASK |
AVR32_PWM_CPD_MASK);
led_pwm_channel->cprd = 0x000000FF;
led_pwm_channel->cdty = intensity;
AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;
}
else
{
AVR32_PWM.isr;
while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));
led_pwm_channel->cupd = intensity;
}
// Switch the LED pin to its PWM function.
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (led_descriptor->PWM.FUNCTION & 0x1)
{
led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;
}
if (led_descriptor->PWM.FUNCTION & 0x2)
{
led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;
}
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1100 board LEDs support package.
*
* This file contains definitions and services related to the LED features of
* the EVK1100 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _LED_H_
#define _LED_H_
#include "compiler.h"
/*! \name Identifiers of LEDs to Use with LED Functions
*/
//! @{
#define LED0 0x01
#define LED1 0x02
#define LED2 0x04
#define LED3 0x08
#define LED4 0x10
#define LED5 0x20
#define LED6 0x40
#define LED7 0x80
//! @}
/*! \brief Gets the last state of all LEDs set through the LED API.
*
* \return State of all LEDs (1 bit per LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display(void);
/*! \brief Sets the state of all LEDs.
*
* \param leds New state of all LEDs (1 bit per LED).
*
* \note The pins of all LEDs are set to GPIO output mode.
*/
extern void LED_Display(U32 leds);
/*! \brief Gets the last state of the specified LEDs set through the LED API.
*
* \param mask LEDs of which to get the state (1 bit per LED).
*
* \return State of the specified LEDs (1 bit per LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display_Mask(U32 mask);
/*! \brief Sets the state of the specified LEDs.
*
* \param mask LEDs of which to set the state (1 bit per LED).
*
* \param leds New state of the specified LEDs (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Display_Mask(U32 mask, U32 leds);
/*! \brief Tests the last state of the specified LEDs set through the LED API.
*
* \param leds LEDs of which to test the state (1 bit per LED).
*
* \return \c TRUE if at least one of the specified LEDs has a state on, else
* \c FALSE.
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern Bool LED_Test(U32 leds);
/*! \brief Turns off the specified LEDs.
*
* \param leds LEDs to turn off (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Off(U32 leds);
/*! \brief Turns on the specified LEDs.
*
* \param leds LEDs to turn on (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_On(U32 leds);
/*! \brief Toggles the specified LEDs.
*
* \param leds LEDs to toggle (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Toggle(U32 leds);
/*! \brief Gets as a bit-field the last state of the specified LEDs set through
* the LED API.
*
* \param field LEDs of which to get the state (1 bit per LED).
*
* \return State of the specified LEDs (1 bit per LED, beginning with the first
* specified LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display_Field(U32 field);
/*! \brief Sets as a bit-field the state of the specified LEDs.
*
* \param field LEDs of which to set the state (1 bit per LED).
* \param leds New state of the specified LEDs (1 bit per LED, beginning with
* the first specified LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Display_Field(U32 field, U32 leds);
/*! \brief Gets the intensity of the specified LED.
*
* \param led LED of which to get the intensity (1 bit per LED; only the least
* significant set bit is used).
*
* \return Intensity of the specified LED (0x00 to 0xFF).
*
* \warning The PWM channel of the specified LED is supposed to be used only by
* this module.
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U8 LED_Get_Intensity(U32 led);
/*! \brief Sets the intensity of the specified LEDs.
*
* \param leds LEDs of which to set the intensity (1 bit per LED).
* \param intensity New intensity of the specified LEDs (0x00 to 0xFF).
*
* \warning The PWM channels of the specified LEDs are supposed to be used only
* by this module.
*
* \note The pins of the specified LEDs are set to PWM output mode.
*/
extern void LED_Set_Intensity(U32 leds, U8 intensity);
#endif // _LED_H_

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1105 board header file.
*
* This file contains definitions and services related to the features of the
* EVK1105 board rev. B.
*
* To use this board, define BOARD=EVK1105.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _EVK1105_H_
#define _EVK1105_H_
#ifdef EVK1105_REV3
# include "evk1105_rev3.h"
#else
#include "compiler.h"
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
# include "led.h"
#endif // __AVR32_ABI_COMPILER__
/*! \name Oscillator Definitions
*/
//! @{
// RCOsc has no custom calibration by default. Set the following definition to
// the appropriate value if a custom RCOsc calibration has been applied to your
// part.
//#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< RCOsc frequency: Hz.
#define FOSC32 32768 //!< Osc32 frequency: Hz.
#define OSC32_STARTUP AVR32_PM_OSCCTRL32_STARTUP_8192_RCOSC //!< Osc32 startup time: RCOsc periods.
#define FOSC0 12000000 //!< Osc0 frequency: Hz.
#define OSC0_STARTUP AVR32_PM_OSCCTRL0_STARTUP_2048_RCOSC //!< Osc0 startup time: RCOsc periods.
#define FOSC1 11289600 //!< Osc1 frequency: Hz
#define OSC1_STARTUP AVR32_PM_OSCCTRL1_STARTUP_2048_RCOSC //!< Osc1 startup time: RCOsc periods.
//! @}
/*! \name SDRAM Definitions
*/
//! @{
//! Part header file of used SDRAM(s).
#define SDRAM_PART_HDR "MT48LC16M16A2TG7E/mt48lc16m16a2tg7e.h"
//! Data bus width to use the SDRAM(s) with (16 or 32 bits; always 16 bits on
//! UC3).
#define SDRAM_DBW 16
//! @}
/*! \name USB Definitions
*/
//! @{
//! Multiplexed pin used for USB_ID: AVR32_USBB_USB_ID_x_x.
//! To be selected according to the AVR32_USBB_USB_ID_x_x_PIN and
//! AVR32_USBB_USB_ID_x_x_FUNCTION definitions from <avr32/uc3axxxx.h>.
#define AVR32_USBB_USB_ID_0_2_PIN 21
#define AVR32_USBB_USB_ID_0_2_FUNCTION 2
#define USB_ID AVR32_USBB_USB_ID_0_2
//! Multiplexed pin used for USB_VBOF: AVR32_USBB_USB_VBOF_x_x.
//! To be selected according to the AVR32_USBB_USB_VBOF_x_x_PIN and
//! AVR32_USBB_USB_VBOF_x_x_FUNCTION definitions from <avr32/uc3axxxx.h>.
# define USB_VBOF AVR32_USBB_USB_VBOF_0_1
//! Active level of the USB_VBOF output pin.
# define USB_VBOF_ACTIVE_LEVEL LOW
//! USB overcurrent detection pin.
# define USB_OVERCURRENT_DETECT_PIN AVR32_PIN_PX15
//! @}
//! GPIO connection of the MAC PHY PWR_DOWN/INT signal.
# define MACB_INTERRUPT_PIN AVR32_PIN_PA26
//! Number of LEDs.
#define LED_COUNT 4
/*! \name GPIO Connections of LEDs
*/
//! @{
# define LED0_GPIO AVR32_PIN_PB27
# define LED1_GPIO AVR32_PIN_PB28
# define LED2_GPIO AVR32_PIN_PA05
# define LED3_GPIO AVR32_PIN_PA06
//! @}
/*! \name Color Identifiers of LEDs to Use with LED Functions
*/
//! @{
#define LED_MONO0_GREEN LED0
#define LED_MONO1_GREEN LED1
#define LED_MONO2_GREEN LED2
#define LED_MONO3_GREEN LED3
//! @}
/*! \name PWM Channels of LEDs
*/
//! @{
#define LED0_PWM 4
#define LED1_PWM 5
#define LED2_PWM (-1)
#define LED3_PWM (-1)
//! @}
/*! \name PWM Functions of LEDs
*/
//! @{
/* TODO: Implement PWM functionality */
#define LED0_PWM_FUNCTION (-1)//AVR32_PWM_0_FUNCTION
#define LED1_PWM_FUNCTION (-1)//AVR32_PWM_1_FUNCTION
#define LED2_PWM_FUNCTION (-1)
#define LED3_PWM_FUNCTION (-1)
//! @}
//! External interrupt connection of touch sensor.
#define QT1081_EIC_EXTINT_PIN AVR32_EIC_EXTINT_1_PIN
#define QT1081_EIC_EXTINT_FUNCTION AVR32_EIC_EXTINT_1_FUNCTION
#define QT1081_EIC_EXTINT_IRQ AVR32_EIC_IRQ_1
#define QT1081_EIC_EXTINT_INT AVR32_EIC_INT1
/*! \name Touch sensor low power mode select
*/
#define QT1081_LP_MODE AVR32_PIN_PB29
/*! \name GPIO Connections of touch buttons
*/
//! @{
#define QT1081_TOUCH_SENSOR_0 AVR32_PIN_PB22
#define QT1081_TOUCH_SENSOR_0_PRESSED 1
#define QT1081_TOUCH_SENSOR_1 AVR32_PIN_PB23
#define QT1081_TOUCH_SENSOR_1_PRESSED 1
#define QT1081_TOUCH_SENSOR_2 AVR32_PIN_PB24
#define QT1081_TOUCH_SENSOR_2_PRESSED 1
#define QT1081_TOUCH_SENSOR_3 AVR32_PIN_PB25
#define QT1081_TOUCH_SENSOR_3_PRESSED 1
#define QT1081_TOUCH_SENSOR_4 AVR32_PIN_PB26
#define QT1081_TOUCH_SENSOR_4_PRESSED 1
#define QT1081_TOUCH_SENSOR_ENTER QT1081_TOUCH_SENSOR_4
#define QT1081_TOUCH_SENSOR_ENTER_PRESSED QT1081_TOUCH_SENSOR_4_PRESSED
#define QT1081_TOUCH_SENSOR_LEFT QT1081_TOUCH_SENSOR_3
#define QT1081_TOUCH_SENSOR_LEFT_PRESSED QT1081_TOUCH_SENSOR_3_PRESSED
#define QT1081_TOUCH_SENSOR_RIGHT QT1081_TOUCH_SENSOR_2
#define QT1081_TOUCH_SENSOR_RIGHT_PRESSED QT1081_TOUCH_SENSOR_2_PRESSED
#define QT1081_TOUCH_SENSOR_UP QT1081_TOUCH_SENSOR_0
#define QT1081_TOUCH_SENSOR_UP_PRESSED QT1081_TOUCH_SENSOR_0_PRESSED
#define QT1081_TOUCH_SENSOR_DOWN QT1081_TOUCH_SENSOR_1
#define QT1081_TOUCH_SENSOR_DOWN_PRESSED QT1081_TOUCH_SENSOR_1_PRESSED
//! @}
/*! \name SPI Connections of the AT45DBX Data Flash Memory
*/
//! @{
#define AT45DBX_SPI (&AVR32_SPI0)
#define AT45DBX_SPI_NPCS 0
#define AT45DBX_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN
#define AT45DBX_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION
#define AT45DBX_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN
#define AT45DBX_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION
#define AT45DBX_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN
#define AT45DBX_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION
#define AT45DBX_SPI_NPCS0_PIN AVR32_SPI0_NPCS_0_0_PIN
#define AT45DBX_SPI_NPCS0_FUNCTION AVR32_SPI0_NPCS_0_0_FUNCTION
//! @}
/*! \name GPIO and SPI Connections of the SD/MMC Connector
*/
//! @{
#define SD_MMC_CARD_DETECT_PIN AVR32_PIN_PA02
#define SD_MMC_WRITE_PROTECT_PIN AVR32_PIN_PA18
#define SD_MMC_SPI (&AVR32_SPI0)
#define SD_MMC_SPI_NPCS 1
#define SD_MMC_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN
#define SD_MMC_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION
#define SD_MMC_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN
#define SD_MMC_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION
#define SD_MMC_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN
#define SD_MMC_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION
#define SD_MMC_SPI_NPCS_PIN AVR32_SPI0_NPCS_1_0_PIN
#define SD_MMC_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_1_0_FUNCTION
//! @}
/*! \name TWI expansion
*/
//! @{
#define EXPANSION_TWI (&AVR32_TWI)
#define EXPANSION_RESET AVR32_PIN_PX16
#define EXPANSION_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN
#define EXPANSION_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION
#define EXPANSION_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN
#define EXPANSION_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION
//! @}
/*! \name Wireless expansion
*/
#define WEXPANSION_EXTINT_PIN AVR32_EIC_EXTINT_8_PIN
#define WEXPANSION_EXTINT_FUNCTION AVR32_EIC_EXTINT_8_FUNCTION
#define WEXPANSION_GPIO1 AVR32_PIN_PB30
#define WEXPANSION_GPIO2 AVR32_PIN_PB31
#define WEXPANSION_SPI (&AVR32_SPI0)
#define WEXPANSION_SPI_NPCS 2
#define WEXPANSION_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN
#define WEXPANSION_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION
#define WEXPANSION_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN
#define WEXPANSION_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION
#define WEXPANSION_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN
#define WEXPANSION_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION
#define WEXPANSION_SPI_NPCS_PIN AVR32_SPI0_NPCS_2_0_PIN
#define WEXPANSION_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_2_0_FUNCTION
//! @}
/*! \name ET024006DHU TFT display
*/
//! @{
#define ET024006DHU_TE_PIN AVR32_PIN_PX19
#define ET024006DHU_RESET_PIN AVR32_PIN_PX22
#define ET024006DHU_BL_PIN AVR32_PWM_6_PIN
#define ET024006DHU_BL_FUNCTION AVR32_PWM_6_FUNCTION
#define ET024006DHU_DNC_PIN AVR32_EBI_ADDR_21_1_PIN
#define ET024006DHU_DNC_FUNCTION AVR32_EBI_ADDR_21_1_FUNCTION
#define ET024006DHU_EBI_NCS_PIN AVR32_EBI_NCS_0_1_PIN
#define ET024006DHU_EBI_NCS_FUNCTION AVR32_EBI_NCS_0_1_FUNCTION
//! @}
/*! \name Optional SPI connection to the TFT
*/
//! @{
#define ET024006DHU_SPI (&AVR32_SPI0)
#define ET024006DHU_SPI_NPCS 3
#define ET024006DHU_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN
#define ET024006DHU_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION
#define ET024006DHU_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN
#define ET024006DHU_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION
#define ET024006DHU_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN
#define ET024006DHU_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION
#define ET024006DHU_SPI_NPCS_PIN AVR32_SPI1_NPCS_3_0_PIN
#define ET024006DHU_SPI_NPCS_FUNCTION AVR32_SPI1_NPCS_3_0_FUNCTION
//! @}
/*! \name Audio amplifier connection to the DAC
*/
//! @{
#define TPA6130_ABDAC (&AVR32_ABDAC)
#define TPA6130_DATA0_PIN AVR32_ABDAC_DATA_0_1_PIN
#define TPA6130_DATA0_FUNCTION AVR32_ABDAC_DATA_0_1_FUNCTION
#define TPA6130_DATAN0_PIN AVR32_ABDAC_DATAN_0_1_PIN
#define TPA6130_DATAN0_FUNCTION AVR32_ABDAC_DATAN_0_1_FUNCTION
#define TPA6130_DATA1_PIN AVR32_ABDAC_DATA_1_1_PIN
#define TPA6130_DATA1_FUNCTION AVR32_ABDAC_DATA_1_1_FUNCTION
#define TPA6130_DATAN1_PIN AVR32_ABDAC_DATAN_1_1_PIN
#define TPA6130_DATAN1_FUNCTION AVR32_ABDAC_DATAN_1_1_FUNCTION
#define TPA6130_ABDAC_PDCA_PID AVR32_PDCA_PID_ABDAC_TX
#define TPA6130_ABDAC_PDCA_CHANNEL 0
#define TPA6130_ABDAC_PDCA_IRQ AVR32_PDCA_IRQ_0
#define TPA6130_ABDAC_PDCA_INT_LEVEL AVR32_INTC_INT3
#define TPA6130_TWI (&AVR32_TWI)
#define TPA6130_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN
#define TPA6130_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION
#define TPA6130_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN
#define TPA6130_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION
//! }@
/*! \name TI TLV320AIC23B sound chip
*/
//! @{
#define TLV320_SSC (&AVR32_SSC)
#define TLV320_SSC_TX_CLOCK_PIN AVR32_SSC_TX_CLOCK_0_PIN
#define TLV320_SSC_TX_CLOCK_FUNCTION AVR32_SSC_TX_CLOCK_0_FUNCTION
#define TLV320_SSC_TX_DATA_PIN AVR32_SSC_TX_DATA_0_PIN
#define TLV320_SSC_TX_DATA_FUNCTION AVR32_SSC_TX_DATA_0_FUNCTION
#define TLV320_SSC_TX_FRAME_SYNC_PIN AVR32_SSC_TX_FRAME_SYNC_0_PIN
#define TLV320_SSC_TX_FRAME_SYNC_FUNCTION AVR32_SSC_TX_FRAME_SYNC_0_FUNCTION
#define TLV320_TWI (&AVR32_TWI)
#define TLV320_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN
#define TLV320_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION
#define TLV320_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN
#define TLV320_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION
#define TLV320_PM_GCLK_PIN AVR32_PM_GCLK_0_0_PIN
#define TLV320_PM_GCLK_FUNCTION AVR32_PM_GCLK_0_0_FUNCTION
//! @}
////! \name SPI: Apple Authentication Chip Hardware Connections
////! @{
#define IPOD_AUTH_CHIP_SPI (&AVR32_SPI0)
#define IPOD_AUTH_CHIP_SPI_IRQ AVR32_SPI0_IRQ
#define IPOD_AUTH_CHIP_SPI_NPCS 2
#define IPOD_AUTH_CHIP_SPI_SCK_PIN AVR32_SPI0_SCK_0_0_PIN
#define IPOD_AUTH_CHIP_SPI_SCK_FUNCTION AVR32_SPI0_SCK_0_0_FUNCTION
#define IPOD_AUTH_CHIP_SPI_MISO_PIN AVR32_SPI0_MISO_0_0_PIN
#define IPOD_AUTH_CHIP_SPI_MISO_FUNCTION AVR32_SPI0_MISO_0_0_FUNCTION
#define IPOD_AUTH_CHIP_SPI_MOSI_PIN AVR32_SPI0_MOSI_0_0_PIN
#define IPOD_AUTH_CHIP_SPI_MOSI_FUNCTION AVR32_SPI0_MOSI_0_0_FUNCTION
#define IPOD_AUTH_CHIP_SPI_NPCS_PIN AVR32_SPI0_NPCS_2_0_PIN
#define IPOD_AUTH_CHIP_SPI_NPCS_FUNCTION AVR32_SPI0_NPCS_2_0_FUNCTION
#define IPOD_AUTH_CHIP_SPI_N_RESET_PIN AVR32_PIN_PB30
#define IPOD_AUTH_CHIP_SPI_CP_READY_PIN AVR32_PIN_PB31
//! }@
/*! \name Connections of the iPOD Authentication Coprocessor
*/
//! @{
#define IPOD_AUTH_CHIP_TWI (&AVR32_TWI)
#define IPOD_AUTH_CHIP_TWI_SCL_PIN AVR32_TWI_SCL_0_0_PIN
#define IPOD_AUTH_CHIP_TWI_SCL_FUNCTION AVR32_TWI_SCL_0_0_FUNCTION
#define IPOD_AUTH_CHIP_TWI_SDA_PIN AVR32_TWI_SDA_0_0_PIN
#define IPOD_AUTH_CHIP_TWI_SDA_FUNCTION AVR32_TWI_SDA_0_0_FUNCTION
#define IPOD_AUTH_CHIP_TWI_N_RESET_PIN AVR32_PIN_PX16
//! @}
/*! \name USART connection to the UC3B board controller
*/
//! @{
#define USART0_RXD_PIN AVR32_USART0_RXD_0_0_PIN
#define USART0_RXD_FUNCTION AVR32_USART0_RXD_0_0_FUNCTION
#define USART0_TXD_PIN AVR32_USART0_TXD_0_0_PIN
#define USART0_TXD_FUNCTION AVR32_USART0_TXD_0_0_FUNCTION
#define USART0_RTS_PIN AVR32_USART0_RTS_0_0_PIN
#define USART0_RTS_FUNCTION AVR32_USART0_RTS_0_0_FUNCTION
#define USART0_CTS_PIN AVR32_USART0_CTS_0_0_PIN
#define USART0_CTS_FUNCTION AVR32_USART0_CTS_0_0_FUNCTION
//! @}
#define ADC_VEXT_PIN AVR32_ADC_AD_7_PIN
#define ADC_VEXT_FUNCTION AVR32_ADC_AD_7_FUNCTION
/*! \name LCD Connections of the ET024006DHU display
*/
//! @{
#define ET024006DHU_SMC_USE_NCS 0
#define ET024006DHU_SMC_COMPONENT_CS "smc_et024006dhu.h"
#define ET024006DHU_EBI_DATA_0 AVR32_EBI_DATA_0
#define ET024006DHU_EBI_DATA_1 AVR32_EBI_DATA_1
#define ET024006DHU_EBI_DATA_2 AVR32_EBI_DATA_2
#define ET024006DHU_EBI_DATA_3 AVR32_EBI_DATA_3
#define ET024006DHU_EBI_DATA_4 AVR32_EBI_DATA_4
#define ET024006DHU_EBI_DATA_5 AVR32_EBI_DATA_5
#define ET024006DHU_EBI_DATA_6 AVR32_EBI_DATA_6
#define ET024006DHU_EBI_DATA_7 AVR32_EBI_DATA_7
#define ET024006DHU_EBI_DATA_8 AVR32_EBI_DATA_8
#define ET024006DHU_EBI_DATA_9 AVR32_EBI_DATA_9
#define ET024006DHU_EBI_DATA_10 AVR32_EBI_DATA_10
#define ET024006DHU_EBI_DATA_11 AVR32_EBI_DATA_11
#define ET024006DHU_EBI_DATA_12 AVR32_EBI_DATA_12
#define ET024006DHU_EBI_DATA_13 AVR32_EBI_DATA_13
#define ET024006DHU_EBI_DATA_14 AVR32_EBI_DATA_14
#define ET024006DHU_EBI_DATA_15 AVR32_EBI_DATA_15
#define ET024006DHU_EBI_ADDR_21 AVR32_EBI_ADDR_21_1
#define ET024006DHU_EBI_NWE AVR32_EBI_NWE0_0
#define ET024006DHU_EBI_NRD AVR32_EBI_NRD_0
#define ET024006DHU_EBI_NCS AVR32_EBI_NCS_0_1
//! @}
#endif // !EVK1105_REVA
#endif // _EVK1105_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1105 board LEDs support package.
*
* This file contains definitions and services related to the LED features of
* the EVK1105 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include <avr32/io.h>
#include "preprocessor.h"
#include "compiler.h"
#include "evk1105.h"
#include "led.h"
//! Structure describing LED hardware connections.
typedef const struct
{
struct
{
U32 PORT; //!< LED GPIO port.
U32 PIN_MASK; //!< Bit-mask of LED pin in GPIO port.
} GPIO; //!< LED GPIO descriptor.
struct
{
S32 CHANNEL; //!< LED PWM channel (< 0 if N/A).
S32 FUNCTION; //!< LED pin PWM function (< 0 if N/A).
} PWM; //!< LED PWM descriptor.
} tLED_DESCRIPTOR;
//! Hardware descriptors of all LEDs.
static tLED_DESCRIPTOR LED_DESCRIPTOR[LED_COUNT] =
{
#define INSERT_LED_DESCRIPTOR(LED_NO, unused) \
{ \
{LED##LED_NO##_GPIO / 32, 1 << (LED##LED_NO##_GPIO % 32)},\
{LED##LED_NO##_PWM, LED##LED_NO##_PWM_FUNCTION } \
},
MREPEAT(LED_COUNT, INSERT_LED_DESCRIPTOR, ~)
#undef INSERT_LED_DESCRIPTOR
};
//! Saved state of all LEDs.
static volatile U32 LED_State = (1 << LED_COUNT) - 1;
U32 LED_Read_Display(void)
{
return LED_State;
}
void LED_Display(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor;
volatile avr32_gpio_port_t *led_gpio_port;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
LED_State = leds;
// For all LEDs...
for (led_descriptor = &LED_DESCRIPTOR[0];
led_descriptor < LED_DESCRIPTOR + LED_COUNT;
led_descriptor++)
{
// Set the LED to the requested state.
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
}
}
U32 LED_Read_Display_Mask(U32 mask)
{
return Rd_bits(LED_State, mask);
}
void LED_Display_Mask(U32 mask, U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
mask &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Wr_bits(LED_State, mask, leds);
// While there are specified LEDs left to manage...
while (mask)
{
// Select the next specified LED and set it to the requested state.
led_shift = 1 + ctz(mask);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
leds >>= led_shift - 1;
if (leds & 1)
{
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= 1;
mask >>= led_shift;
}
}
Bool LED_Test(U32 leds)
{
return Tst_bits(LED_State, leds);
}
void LED_Off(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Clr_bits(LED_State, leds);
// While there are specified LEDs left to manage...
while (leds)
{
// Select the next specified LED and turn it off.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrs = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_On(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Set_bits(LED_State, leds);
// While there are specified LEDs left to manage...
while (leds)
{
// Select the next specified LED and turn it on.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrc = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
void LED_Toggle(U32 leds)
{
// Use the LED descriptors to get the connections of a given LED to the MCU.
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// Make sure only existing LEDs are specified.
leds &= (1 << LED_COUNT) - 1;
// Update the saved state of all LEDs with the requested changes.
Tgl_bits(LED_State, leds);
// While there are specified LEDs left to manage...
while (leds)
{
// Select the next specified LED and toggle it.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
led_gpio_port->ovrt = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->oders = led_descriptor->GPIO.PIN_MASK;
led_gpio_port->gpers = led_descriptor->GPIO.PIN_MASK;
leds >>= led_shift;
}
}
U32 LED_Read_Display_Field(U32 field)
{
return Rd_bitfield(LED_State, field);
}
void LED_Display_Field(U32 field, U32 leds)
{
// Move the bit-field to the appropriate position for the bit-mask.
LED_Display_Mask(field, leds << ctz(field));
}
U8 LED_Get_Intensity(U32 led)
{
tLED_DESCRIPTOR *led_descriptor;
// Check that the argument value is valid.
led = ctz(led);
led_descriptor = &LED_DESCRIPTOR[led];
if (led >= LED_COUNT || led_descriptor->PWM.CHANNEL < 0) return 0;
// Return the duty cycle value if the LED PWM channel is enabled, else 0.
return (AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)) ?
AVR32_PWM.channel[led_descriptor->PWM.CHANNEL].cdty : 0;
}
void LED_Set_Intensity(U32 leds, U8 intensity)
{
tLED_DESCRIPTOR *led_descriptor = &LED_DESCRIPTOR[0] - 1;
volatile avr32_pwm_channel_t *led_pwm_channel;
volatile avr32_gpio_port_t *led_gpio_port;
U8 led_shift;
// For each specified LED...
for (leds &= (1 << LED_COUNT) - 1; leds; leds >>= led_shift)
{
// Select the next specified LED and check that it has a PWM channel.
led_shift = 1 + ctz(leds);
led_descriptor += led_shift;
if (led_descriptor->PWM.CHANNEL < 0) continue;
// Initialize or update the LED PWM channel.
led_pwm_channel = &AVR32_PWM.channel[led_descriptor->PWM.CHANNEL];
if (!(AVR32_PWM.sr & (1 << led_descriptor->PWM.CHANNEL)))
{
led_pwm_channel->cmr = (AVR32_PWM_CPRE_MCK << AVR32_PWM_CPRE_OFFSET) &
~(AVR32_PWM_CALG_MASK |
AVR32_PWM_CPOL_MASK |
AVR32_PWM_CPD_MASK);
led_pwm_channel->cprd = 0x000000FF;
led_pwm_channel->cdty = intensity;
AVR32_PWM.ena = 1 << led_descriptor->PWM.CHANNEL;
}
else
{
AVR32_PWM.isr;
while (!(AVR32_PWM.isr & (1 << led_descriptor->PWM.CHANNEL)));
led_pwm_channel->cupd = intensity;
}
// Switch the LED pin to its PWM function.
led_gpio_port = &AVR32_GPIO.port[led_descriptor->GPIO.PORT];
if (led_descriptor->PWM.FUNCTION & 0x1)
{
led_gpio_port->pmr0s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr0c = led_descriptor->GPIO.PIN_MASK;
}
if (led_descriptor->PWM.FUNCTION & 0x2)
{
led_gpio_port->pmr1s = led_descriptor->GPIO.PIN_MASK;
}
else
{
led_gpio_port->pmr1c = led_descriptor->GPIO.PIN_MASK;
}
led_gpio_port->gperc = led_descriptor->GPIO.PIN_MASK;
}
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3A EVK1105 board LEDs support package.
*
* This file contains definitions and services related to the LED features of
* the EVK1105 board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3A devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _LED_H_
#define _LED_H_
#include "compiler.h"
/*! \name Identifiers of LEDs to Use with LED Functions
*/
//! @{
#define LED0 0x01
#define LED1 0x02
#define LED2 0x04
#define LED3 0x08
//! @}
/*! \brief Gets the last state of all LEDs set through the LED API.
*
* \return State of all LEDs (1 bit per LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display(void);
/*! \brief Sets the state of all LEDs.
*
* \param leds New state of all LEDs (1 bit per LED).
*
* \note The pins of all LEDs are set to GPIO output mode.
*/
extern void LED_Display(U32 leds);
/*! \brief Gets the last state of the specified LEDs set through the LED API.
*
* \param mask LEDs of which to get the state (1 bit per LED).
*
* \return State of the specified LEDs (1 bit per LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display_Mask(U32 mask);
/*! \brief Sets the state of the specified LEDs.
*
* \param mask LEDs of which to set the state (1 bit per LED).
*
* \param leds New state of the specified LEDs (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Display_Mask(U32 mask, U32 leds);
/*! \brief Tests the last state of the specified LEDs set through the LED API.
*
* \param leds LEDs of which to test the state (1 bit per LED).
*
* \return \c TRUE if at least one of the specified LEDs has a state on, else
* \c FALSE.
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern Bool LED_Test(U32 leds);
/*! \brief Turns off the specified LEDs.
*
* \param leds LEDs to turn off (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Off(U32 leds);
/*! \brief Turns on the specified LEDs.
*
* \param leds LEDs to turn on (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_On(U32 leds);
/*! \brief Toggles the specified LEDs.
*
* \param leds LEDs to toggle (1 bit per LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Toggle(U32 leds);
/*! \brief Gets as a bit-field the last state of the specified LEDs set through
* the LED API.
*
* \param field LEDs of which to get the state (1 bit per LED).
*
* \return State of the specified LEDs (1 bit per LED, beginning with the first
* specified LED).
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U32 LED_Read_Display_Field(U32 field);
/*! \brief Sets as a bit-field the state of the specified LEDs.
*
* \param field LEDs of which to set the state (1 bit per LED).
* \param leds New state of the specified LEDs (1 bit per LED, beginning with
* the first specified LED).
*
* \note The pins of the specified LEDs are set to GPIO output mode.
*/
extern void LED_Display_Field(U32 field, U32 leds);
/*! \brief Gets the intensity of the specified LED.
*
* \param led LED of which to get the intensity (1 bit per LED; only the least
* significant set bit is used).
*
* \return Intensity of the specified LED (0x00 to 0xFF).
*
* \warning The PWM channel of the specified LED is supposed to be used only by
* this module.
*
* \note The GPIO pin configuration of all LEDs is left unchanged.
*/
extern U8 LED_Get_Intensity(U32 led);
/*! \brief Sets the intensity of the specified LEDs.
*
* \param leds LEDs of which to set the intensity (1 bit per LED).
* \param intensity New intensity of the specified LEDs (0x00 to 0xFF).
*
* \warning The PWM channels of the specified LEDs are supposed to be used only
* by this module.
*
* \note The pins of the specified LEDs are set to PWM output mode.
*/
extern void LED_Set_Intensity(U32 leds, U8 intensity);
#endif // _LED_H_

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Standard board header file.
*
* This file includes the appropriate board header file according to the
* defined board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include <avr32/io.h>
/*! \name Base Boards
*/
//! @{
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
#define EVK1101 2 //!< AT32UC3B EVK1101 board.
#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board.
#define EVK1104 4 //!< AT32UC3A3 EVK1104 board.
#define EVK1105 5 //!< AT32UC3A EVK1105 board.
#define STK1000 6 //!< AT32AP7000 STK1000 board.
#define NGW100 7 //!< AT32AP7000 NGW100 board.
#define STK600_RCUC3L0 8 //!< STK600 RCUC3L0 board.
#define UC3L_EK 9 //!< AT32UC3L-EK board.
#define USER_BOARD 99 //!< User-reserved board (if any).
//! @}
/*! \name Extension Boards
*/
//! @{
#define EXT1102 1 //!< AT32UC3B EXT1102 board.
#define MC300 2 //!< AT32UC3 MC300 board.
#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any).
//! @}
#if BOARD == EVK1100
#include "EVK1100/evk1100.h"
#elif BOARD == EVK1101
#include "EVK1101/evk1101.h"
#elif BOARD == UC3C_EK
#include "UC3C_EK/uc3c_ek.h"
#elif BOARD == EVK1104
#include "EVK1104/evk1104.h"
#elif BOARD == EVK1105
#include "EVK1105/evk1105.h"
#elif BOARD == STK1000
#include "STK1000/stk1000.h"
#elif BOARD == NGW100
#include "NGW100/ngw100.h"
#elif BOARD == STK600_RCUC3L0
#include "STK600/RCUC3L0/stk600_rcuc3l0.h"
#elif BOARD == UC3L_EK
#include "UC3L_EK/uc3l_ek.h"
#elif BOARD == ARDUINO
#include "ARDUINO/arduino.h"
#else
#error No known AVR32 board defined
#endif
#if (defined EXT_BOARD)
#if EXT_BOARD == EXT1102
#include "EXT1102/ext1102.h"
#elif EXT_BOARD == MC300
#include "MC300/mc300.h"
#elif EXT_BOARD == USER_EXT_BOARD
// User-reserved area: #include the header file of your extension board here
// (if any).
#endif
#endif
#ifndef FRCOSC
#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency.
#endif
#endif // _BOARD_H_

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Standard board header file.
*
* This file includes the appropriate board header file according to the
* defined board.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _BOARD_H_
#define _BOARD_H_
#include <avr32/io.h>
/*! \name Base Boards
*/
//! @{
#define EVK1100 1 //!< AT32UC3A EVK1100 board.
#define EVK1101 2 //!< AT32UC3B EVK1101 board.
#define UC3C_EK 3 //!< AT32UC3C UC3C_EK board.
#define EVK1104 4 //!< AT32UC3A3 EVK1104 board.
#define EVK1105 5 //!< AT32UC3A EVK1105 board.
#define STK1000 6 //!< AT32AP7000 STK1000 board.
#define NGW100 7 //!< AT32AP7000 NGW100 board.
#define STK600_RCUC3L0 8 //!< STK600 RCUC3L0 board.
#define UC3L_EK 9 //!< AT32UC3L-EK board.
#define USER_BOARD 99 //!< User-reserved board (if any).
//! @}
/*! \name Extension Boards
*/
//! @{
#define EXT1102 1 //!< AT32UC3B EXT1102 board.
#define MC300 2 //!< AT32UC3 MC300 board.
#define USER_EXT_BOARD 99 //!< User-reserved extension board (if any).
//! @}
#if BOARD == EVK1100
#include "EVK1100/evk1100.h"
#elif BOARD == EVK1101
#include "EVK1101/evk1101.h"
#elif BOARD == UC3C_EK
#include "UC3C_EK/uc3c_ek.h"
#elif BOARD == EVK1104
#include "EVK1104/evk1104.h"
#elif BOARD == EVK1105
#include "EVK1105/evk1105.h"
#elif BOARD == STK1000
#include "STK1000/stk1000.h"
#elif BOARD == NGW100
#include "NGW100/ngw100.h"
#elif BOARD == STK600_RCUC3L0
#include "STK600/RCUC3L0/stk600_rcuc3l0.h"
#elif BOARD == UC3L_EK
#include "UC3L_EK/uc3l_ek.h"
#elif BOARD == ARDUINO
#include "ARDUINO/arduino.h"
#else
#error No known AVR32 board defined
#endif
#if (defined EXT_BOARD)
#if EXT_BOARD == EXT1102
#include "EXT1102/ext1102.h"
#elif EXT_BOARD == MC300
#include "MC300/mc300.h"
#elif EXT_BOARD == USER_EXT_BOARD
// User-reserved area: #include the header file of your extension board here
// (if any).
#endif
#endif
#ifndef FRCOSC
#define FRCOSC AVR32_PM_RCOSC_FREQUENCY //!< Default RCOsc frequency.
#endif
#endif // _BOARD_H_

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hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/COMPONENTS/MEMORY/DATA_FLASH/AT45DBX/at45dbx.c Normal file
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Management of the AT45DBX data flash controller through SPI.
*
* This file manages the accesses to the AT45DBX data flash components.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SPI module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
//_____ I N C L U D E S ___________________________________________________
#include "conf_access.h"
#if AT45DBX_MEM == ENABLE
#include "compiler.h"
#include "board.h"
#include "gpio.h"
#include "spi.h"
#include "conf_at45dbx.h"
#include "at45dbx.h"
#if AT45DBX_MEM_CNT > 4
#error AT45DBX_MEM_CNT must not exceed 4
#endif
//_____ D E F I N I T I O N S ______________________________________________
/*! \name AT45DBX Group A Commands
*/
//! @{
#define AT45DBX_CMDA_RD_PAGE 0xD2 //!< Main Memory Page Read (Serial/8-bit Mode).
#define AT45DBX_CMDA_RD_ARRAY_LEG 0xE8 //!< Continuous Array Read, Legacy Command (Serial/8-bit Mode).
#define AT45DBX_CMDA_RD_ARRAY_LF_SM 0x03 //!< Continuous Array Read, Low-Frequency Mode (Serial Mode).
#define AT45DBX_CMDA_RD_ARRAY_AF_SM 0x0B //!< Continuous Array Read, Any-Frequency Mode (Serial Mode).
#define AT45DBX_CMDA_RD_SECTOR_PROT_REG 0x32 //!< Read Sector Protection Register (Serial/8-bit Mode).
#define AT45DBX_CMDA_RD_SECTOR_LKDN_REG 0x35 //!< Read Sector Lockdown Register (Serial/8-bit Mode).
#define AT45DBX_CMDA_RD_SECURITY_REG 0x77 //!< Read Security Register (Serial/8-bit Mode).
//! @}
/*! \name AT45DBX Group B Commands
*/
//! @{
#define AT45DBX_CMDB_ER_PAGE 0x81 //!< Page Erase (Serial/8-bit Mode).
#define AT45DBX_CMDB_ER_BLOCK 0x50 //!< Block Erase (Serial/8-bit Mode).
#define AT45DBX_CMDB_ER_SECTOR 0x7C //!< Sector Erase (Serial/8-bit Mode).
#define AT45DBX_CMDB_ER_CHIP 0xC794809A //!< Chip Erase (Serial/8-bit Mode).
#define AT45DBX_CMDB_XFR_PAGE_TO_BUF1 0x53 //!< Main Memory Page to Buffer 1 Transfer (Serial/8-bit Mode).
#define AT45DBX_CMDB_XFR_PAGE_TO_BUF2 0x55 //!< Main Memory Page to Buffer 2 Transfer (Serial/8-bit Mode).
#define AT45DBX_CMDB_CMP_PAGE_TO_BUF1 0x60 //!< Main Memory Page to Buffer 1 Compare (Serial/8-bit Mode).
#define AT45DBX_CMDB_CMP_PAGE_TO_BUF2 0x61 //!< Main Memory Page to Buffer 2 Compare (Serial/8-bit Mode).
#define AT45DBX_CMDB_PR_BUF1_TO_PAGE_ER 0x83 //!< Buffer 1 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode).
#define AT45DBX_CMDB_PR_BUF2_TO_PAGE_ER 0x86 //!< Buffer 2 to Main Memory Page Program with Built-in Erase (Serial/8-bit Mode).
#define AT45DBX_CMDB_PR_BUF1_TO_PAGE 0x88 //!< Buffer 1 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode).
#define AT45DBX_CMDB_PR_BUF2_TO_PAGE 0x89 //!< Buffer 2 to Main Memory Page Program without Built-in Erase (Serial/8-bit Mode).
#define AT45DBX_CMDB_PR_PAGE_TH_BUF1 0x82 //!< Main Memory Page Program through Buffer 1 (Serial/8-bit Mode).
#define AT45DBX_CMDB_PR_PAGE_TH_BUF2 0x85 //!< Main Memory Page Program through Buffer 2 (Serial/8-bit Mode).
#define AT45DBX_CMDB_RWR_PAGE_TH_BUF1 0x58 //!< Auto Page Rewrite through Buffer 1 (Serial/8-bit Mode).
#define AT45DBX_CMDB_RWR_PAGE_TH_BUF2 0x59 //!< Auto Page Rewrite through Buffer 2 (Serial/8-bit Mode).
//! @}
/*! \name AT45DBX Group C Commands
*/
//! @{
#define AT45DBX_CMDC_RD_BUF1_LF_SM 0xD1 //!< Buffer 1 Read, Low-Frequency Mode (Serial Mode).
#define AT45DBX_CMDC_RD_BUF2_LF_SM 0xD3 //!< Buffer 2 Read, Low-Frequency Mode (Serial Mode).
#define AT45DBX_CMDC_RD_BUF1_AF_SM 0xD4 //!< Buffer 1 Read, Any-Frequency Mode (Serial Mode).
#define AT45DBX_CMDC_RD_BUF2_AF_SM 0xD6 //!< Buffer 2 Read, Any-Frequency Mode (Serial Mode).
#define AT45DBX_CMDC_RD_BUF1_AF_8M 0x54 //!< Buffer 1 Read, Any-Frequency Mode (8-bit Mode).
#define AT45DBX_CMDC_RD_BUF2_AF_8M 0x56 //!< Buffer 2 Read, Any-Frequency Mode (8-bit Mode).
#define AT45DBX_CMDC_WR_BUF1 0x84 //!< Buffer 1 Write (Serial/8-bit Mode).
#define AT45DBX_CMDC_WR_BUF2 0x87 //!< Buffer 2 Write (Serial/8-bit Mode).
#define AT45DBX_CMDC_RD_STATUS_REG 0xD7 //!< Status Register Read (Serial/8-bit Mode).
#define AT45DBX_CMDC_RD_MNFCT_DEV_ID_SM 0x9F //!< Manufacturer and Device ID Read (Serial Mode).
//! @}
/*! \name AT45DBX Group D Commands
*/
//! @{
#define AT45DBX_CMDD_EN_SECTOR_PROT 0x3D2A7FA9 //!< Enable Sector Protection (Serial/8-bit Mode).
#define AT45DBX_CMDD_DIS_SECTOR_PROT 0x3D2A7F9A //!< Disable Sector Protection (Serial/8-bit Mode).
#define AT45DBX_CMDD_ER_SECTOR_PROT_REG 0x3D2A7FCF //!< Erase Sector Protection Register (Serial/8-bit Mode).
#define AT45DBX_CMDD_PR_SECTOR_PROT_REG 0x3D2A7FFC //!< Program Sector Protection Register (Serial/8-bit Mode).
#define AT45DBX_CMDD_LKDN_SECTOR 0x3D2A7F30 //!< Sector Lockdown (Serial/8-bit Mode).
#define AT45DBX_CMDD_PR_SECURITY_REG 0x9B000000 //!< Program Security Register (Serial/8-bit Mode).
#define AT45DBX_CMDD_PR_CONF_REG 0x3D2A80A6 //!< Program Configuration Register (Serial/8-bit Mode).
#define AT45DBX_CMDD_DEEP_PWR_DN 0xB9 //!< Deep Power-down (Serial/8-bit Mode).
#define AT45DBX_CMDD_RSM_DEEP_PWR_DN 0xAB //!< Resume from Deep Power-down (Serial/8-bit Mode).
//! @}
/*! \name Bit-Masks and Values for the Status Register
*/
//! @{
#define AT45DBX_MSK_BUSY 0x80 //!< Busy status bit-mask.
#define AT45DBX_BUSY 0x00 //!< Busy status value (0x00 when busy, 0x80 when ready).
#define AT45DBX_MSK_DENSITY 0x3C //!< Device density bit-mask.
//! @}
#if AT45DBX_MEM_SIZE == AT45DBX_1MB
/*! \name AT45DB081 Memories
*/
//! @{
#define AT45DBX_DENSITY 0x24 //!< Device density value.
#define AT45DBX_BYTE_ADDR_BITS 9 //!< Address bits for byte position within buffer.
//! @}
#elif AT45DBX_MEM_SIZE == AT45DBX_2MB
/*! \name AT45DB161 Memories
*/
//! @{
#define AT45DBX_DENSITY 0x2C //!< Device density value.
#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer.
//! @}
#elif AT45DBX_MEM_SIZE == AT45DBX_4MB
/*! \name AT45DB321 Memories
*/
//! @{
#define AT45DBX_DENSITY 0x34 //!< Device density value.
#define AT45DBX_BYTE_ADDR_BITS 10 //!< Address bits for byte position within buffer.
//! @}
#elif AT45DBX_MEM_SIZE == AT45DBX_8MB
/*! \name AT45DB642 Memories
*/
//! @{
#define AT45DBX_DENSITY 0x3C //!< Device density value.
#define AT45DBX_BYTE_ADDR_BITS 11 //!< Address bits for byte position within buffer.
//! @}
#else
#error AT45DBX_MEM_SIZE is not defined to a supported value
#endif
//! Address bits for page selection.
#define AT45DBX_PAGE_ADDR_BITS (AT45DBX_MEM_SIZE - AT45DBX_PAGE_BITS)
//! Number of bits for addresses within pages.
#define AT45DBX_PAGE_BITS (AT45DBX_BYTE_ADDR_BITS - 1)
//! Page size in bytes.
#define AT45DBX_PAGE_SIZE (1 << AT45DBX_PAGE_BITS)
//! Bit-mask for byte position within buffer in \ref gl_ptr_mem.
#define AT45DBX_MSK_PTR_BYTE ((1 << AT45DBX_PAGE_BITS) - 1)
//! Bit-mask for page selection in \ref gl_ptr_mem.
#define AT45DBX_MSK_PTR_PAGE (((1 << AT45DBX_PAGE_ADDR_BITS) - 1) << AT45DBX_PAGE_BITS)
//! Bit-mask for byte position within sector in \ref gl_ptr_mem.
#define AT45DBX_MSK_PTR_SECTOR ((1 << AT45DBX_SECTOR_BITS) - 1)
/*! \brief Sends a dummy byte through SPI.
*/
#define spi_write_dummy() spi_write(AT45DBX_SPI, 0xFF)
//! Boolean indicating whether memory is in busy state.
static Bool at45dbx_busy;
//! Memory data pointer.
static U32 gl_ptr_mem;
//! Sector buffer.
static U8 sector_buf[AT45DBX_SECTOR_SIZE];
/*! \name Control Functions
*/
//! @{
Bool at45dbx_init(spi_options_t spiOptions, unsigned int pba_hz)
{
// Setup SPI registers according to spiOptions.
for (spiOptions.reg = AT45DBX_SPI_FIRST_NPCS;
spiOptions.reg < AT45DBX_SPI_FIRST_NPCS + AT45DBX_MEM_CNT;
spiOptions.reg++)
{
if (spi_setupChipReg(AT45DBX_SPI, &spiOptions, pba_hz) != SPI_OK) return KO;
}
// Memory ready.
at45dbx_busy = FALSE;
return OK;
}
/*! \brief Selects or unselects a DF memory.
*
* \param memidx Memory ID of DF to select or unselect.
* \param bSelect Boolean indicating whether the DF memory has to be selected.
*/
static void at45dbx_chipselect_df(U8 memidx, Bool bSelect)
{
if (bSelect)
{
// Select SPI chip.
spi_selectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx);
}
else
{
// Unselect SPI chip.
spi_unselectChip(AT45DBX_SPI, AT45DBX_SPI_FIRST_NPCS + memidx);
}
}
Bool at45dbx_mem_check(void)
{
U8 df;
U16 status = 0;
// DF memory check.
for (df = 0; df < AT45DBX_MEM_CNT; df++)
{
// Select the DF memory to check.
at45dbx_chipselect_df(df, TRUE);
// Send the Status Register Read command.
spi_write(AT45DBX_SPI, AT45DBX_CMDC_RD_STATUS_REG);
// Send a dummy byte to read the status register.
spi_write_dummy();
spi_read(AT45DBX_SPI, &status);
// Unselect the checked DF memory.
at45dbx_chipselect_df(df, FALSE);
// Unexpected device density value.
if ((status & AT45DBX_MSK_DENSITY) < AT45DBX_DENSITY) return KO;
}
return OK;
}
/*! \brief Waits until the DF is ready.
*/
static void at45dbx_wait_ready(void)
{
U16 status;
// Select the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE);
// Send the Status Register Read command.
spi_write(AT45DBX_SPI, AT45DBX_CMDC_RD_STATUS_REG);
// Read the status register until the DF is ready.
do
{
// Send a dummy byte to read the status register.
spi_write_dummy();
spi_read(AT45DBX_SPI, &status);
} while ((status & AT45DBX_MSK_BUSY) == AT45DBX_BUSY);
// Unselect the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
}
Bool at45dbx_read_open(U32 sector)
{
U32 addr;
// Set the global memory pointer to a byte address.
gl_ptr_mem = sector << AT45DBX_SECTOR_BITS; // gl_ptr_mem = sector * AT45DBX_SECTOR_SIZE.
// If the DF memory is busy, wait until it's ready.
if (at45dbx_busy) at45dbx_wait_ready();
at45dbx_busy = FALSE;
// Select the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE);
// Initiate a page read at a given sector.
// Send the Main Memory Page Read command.
spi_write(AT45DBX_SPI, AT45DBX_CMDA_RD_PAGE);
// Send the three address bytes, which comprise:
// - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits;
// - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be read;
// - then AT45DBX_BYTE_ADDR_BITS bits specifying the starting byte address within that page.
// NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local
// DF addressing. They are used for DF discrimination when there are several DFs.
addr = (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS) |
Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE);
spi_write(AT45DBX_SPI, LSB2W(addr));
spi_write(AT45DBX_SPI, LSB1W(addr));
spi_write(AT45DBX_SPI, LSB0W(addr));
// Send 32 don't care clock cycles to initialize the read operation.
spi_write_dummy();
spi_write_dummy();
spi_write_dummy();
spi_write_dummy();
return OK;
}
void at45dbx_read_close(void)
{
// Unselect the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
// Memory ready.
at45dbx_busy = FALSE;
}
Bool at45dbx_write_open(U32 sector)
{
U32 addr;
// Set the global memory pointer to a byte address.
gl_ptr_mem = sector << AT45DBX_SECTOR_BITS; // gl_ptr_mem = sector * AT45DBX_SECTOR_SIZE.
// If the DF memory is busy, wait until it's ready.
if (at45dbx_busy) at45dbx_wait_ready();
at45dbx_busy = FALSE;
#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE
// Select the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE);
// Transfer the content of the current page to buffer 1.
// Send the Main Memory Page to Buffer 1 Transfer command.
spi_write(AT45DBX_SPI, AT45DBX_CMDB_XFR_PAGE_TO_BUF1);
// Send the three address bytes, which comprise:
// - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits;
// - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be read;
// - then AT45DBX_BYTE_ADDR_BITS don't care bits.
// NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local
// DF addressing. They are used for DF discrimination when there are several DFs.
addr = Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS;
spi_write(AT45DBX_SPI, LSB2W(addr));
spi_write(AT45DBX_SPI, LSB1W(addr));
spi_write(AT45DBX_SPI, LSB0W(addr));
// Unselect the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
// Wait for end of page transfer.
at45dbx_wait_ready();
#endif
// Select the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, TRUE);
// Initiate a page write at a given sector.
// Send the Main Memory Page Program through Buffer 1 command.
spi_write(AT45DBX_SPI, AT45DBX_CMDB_PR_PAGE_TH_BUF1);
// Send the three address bytes, which comprise:
// - (24 - (AT45DBX_PAGE_ADDR_BITS + AT45DBX_BYTE_ADDR_BITS)) reserved bits;
// - then AT45DBX_PAGE_ADDR_BITS bits specifying the page in main memory to be written;
// - then AT45DBX_BYTE_ADDR_BITS bits specifying the starting byte address within that page.
// NOTE: The bits of gl_ptr_mem above the AT45DBX_MEM_SIZE bits are useless for the local
// DF addressing. They are used for DF discrimination when there are several DFs.
addr = (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_PAGE) << AT45DBX_BYTE_ADDR_BITS) |
Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE);
spi_write(AT45DBX_SPI, LSB2W(addr));
spi_write(AT45DBX_SPI, LSB1W(addr));
spi_write(AT45DBX_SPI, LSB0W(addr));
return OK;
}
void at45dbx_write_close(void)
{
// While end of logical sector not reached, zero-fill remaining memory bytes.
while (Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_SECTOR))
{
spi_write(AT45DBX_SPI, 0x00);
gl_ptr_mem++;
}
// Unselect the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
// Memory busy.
at45dbx_busy = TRUE;
}
//! @}
/*! \name Single-Byte Access Functions
*/
//! @{
U8 at45dbx_read_byte(void)
{
U16 data;
// Memory busy.
if (at45dbx_busy)
{
// Being here, we know that we previously finished a page read.
// => We have to access the next page.
// Memory ready.
at45dbx_busy = FALSE;
// Eventually select the next DF and open the next page.
// NOTE: at45dbx_read_open input parameter is a sector.
at45dbx_read_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE.
}
// Send a dummy byte to read the next data byte.
spi_write_dummy();
spi_read(AT45DBX_SPI, &data);
gl_ptr_mem++;
// If end of page reached,
if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE))
{
// unselect the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
// Memory busy.
at45dbx_busy = TRUE;
}
return data;
}
Bool at45dbx_write_byte(U8 b)
{
// Memory busy.
if (at45dbx_busy)
{
// Being here, we know that we previously launched a page programming.
// => We have to access the next page.
// Eventually select the next DF and open the next page.
// NOTE: at45dbx_write_open input parameter is a sector.
at45dbx_write_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE.
}
// Write the next data byte.
spi_write(AT45DBX_SPI, b);
gl_ptr_mem++;
// If end of page reached,
if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE))
{
// unselect the DF memory gl_ptr_mem points to in order to program the page.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
// Memory busy.
at45dbx_busy = TRUE;
}
return OK;
}
//! @}
/*! \name Multiple-Sector Access Functions
*/
//! @{
Bool at45dbx_read_multiple_sector(U16 nb_sector)
{
while (nb_sector--)
{
// Read the next sector.
at45dbx_read_sector_2_ram(sector_buf);
at45dbx_read_multiple_sector_callback(sector_buf);
}
return OK;
}
Bool at45dbx_write_multiple_sector(U16 nb_sector)
{
while (nb_sector--)
{
// Write the next sector.
at45dbx_write_multiple_sector_callback(sector_buf);
at45dbx_write_sector_from_ram(sector_buf);
}
return OK;
}
//! @}
/*! \name Single-Sector Access Functions
*/
//! @{
Bool at45dbx_read_sector_2_ram(void *ram)
{
U8 *_ram = ram;
U16 i;
U16 data;
// Memory busy.
if (at45dbx_busy)
{
// Being here, we know that we previously finished a page read.
// => We have to access the next page.
// Memory ready.
at45dbx_busy = FALSE;
// Eventually select the next DF and open the next page.
// NOTE: at45dbx_read_open input parameter is a sector.
at45dbx_read_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE.
}
// Read the next sector.
for (i = AT45DBX_SECTOR_SIZE; i; i--)
{
// Send a dummy byte to read the next data byte.
spi_write_dummy();
spi_read(AT45DBX_SPI, &data);
*_ram++ = data;
}
// Update the memory pointer.
gl_ptr_mem += AT45DBX_SECTOR_SIZE;
#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE
// If end of page reached,
if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE))
#endif
{
// unselect the DF memory gl_ptr_mem points to.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
// Memory busy.
at45dbx_busy = TRUE;
}
return OK;
}
Bool at45dbx_write_sector_from_ram(const void *ram)
{
const U8 *_ram = ram;
U16 i;
// Memory busy.
if (at45dbx_busy)
{
// Being here, we know that we previously launched a page programming.
// => We have to access the next page.
// Eventually select the next DF and open the next page.
// NOTE: at45dbx_write_open input parameter is a sector.
at45dbx_write_open(gl_ptr_mem >> AT45DBX_SECTOR_BITS); // gl_ptr_mem / AT45DBX_SECTOR_SIZE.
}
// Write the next sector.
for (i = AT45DBX_SECTOR_SIZE; i; i--)
{
// Write the next data byte.
spi_write(AT45DBX_SPI, *_ram++);
}
// Update the memory pointer.
gl_ptr_mem += AT45DBX_SECTOR_SIZE;
#if AT45DBX_PAGE_SIZE > AT45DBX_SECTOR_SIZE
// If end of page reached,
if (!Rd_bitfield(gl_ptr_mem, AT45DBX_MSK_PTR_BYTE))
#endif
{
// unselect the DF memory gl_ptr_mem points to in order to program the page.
at45dbx_chipselect_df(gl_ptr_mem >> AT45DBX_MEM_SIZE, FALSE);
// Memory busy.
at45dbx_busy = TRUE;
}
return OK;
}
//! @}
#endif // AT45DBX_MEM == ENABLE

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Management of the AT45DBX data flash controller through SPI.
*
* This file manages the accesses to the AT45DBX data flash components.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SPI module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _AT45DBX_H_
#define _AT45DBX_H_
#include "conf_access.h"
#if AT45DBX_MEM == DISABLE
#error at45dbx.h is #included although AT45DBX_MEM is disabled
#endif
#include "spi.h"
//_____ D E F I N I T I O N S ______________________________________________
/*! \name Available AT45DBX Sizes
*
* Number of address bits of available AT45DBX data flash memories.
*
* \note Only memories with page sizes of at least 512 bytes (sector size) are
* supported.
*/
//! @{
#define AT45DBX_1MB 20
#define AT45DBX_2MB 21
#define AT45DBX_4MB 22
#define AT45DBX_8MB 23
//! @}
// AT45DBX_1MB
#define AT45DBX_SECTOR_BITS 8 //! Number of bits for addresses within sectors.
// AT45DBX_2MB AT45DBX_4MB AT45DBX_8MB
//#define AT45DBX_SECTOR_BITS 9 //! Number of bits for addresses within sectors.
//! Sector size in bytes.
#define AT45DBX_SECTOR_SIZE (1 << AT45DBX_SECTOR_BITS)
//_____ D E C L A R A T I O N S ____________________________________________
/*! \name Control Functions
*/
//! @{
/*! \brief Initializes the data flash controller and the SPI channel by which
* the DF is controlled.
*
* \param spiOptions Initialization options of the DF SPI channel.
* \param pba_hz SPI module input clock frequency (PBA clock, Hz).
*
* \retval OK Success.
* \retval KO Failure.
*/
extern Bool at45dbx_init(spi_options_t spiOptions, unsigned int pba_hz);
/*! \brief Performs a memory check on all DFs.
*
* \retval OK Success.
* \retval KO Failure.
*/
extern Bool at45dbx_mem_check(void);
/*! \brief Opens a DF memory in read mode at a given sector.
*
* \param sector Start sector.
*
* \retval OK Success.
* \retval KO Failure.
*
* \note Sector may be page-unaligned (depending on the DF page size).
*/
extern Bool at45dbx_read_open(U32 sector);
/*! \brief Unselects the current DF memory.
*/
extern void at45dbx_read_close(void);
/*! \brief This function opens a DF memory in write mode at a given sector.
*
* \param sector Start sector.
*
* \retval OK Success.
* \retval KO Failure.
*
* \note Sector may be page-unaligned (depending on the DF page size).
*
* \note If \ref AT45DBX_PAGE_SIZE > \ref AT45DBX_SECTOR_SIZE, page content is
* first loaded in buffer to then be partially updated by write byte or
* write sector functions.
*/
extern Bool at45dbx_write_open(U32 sector);
/*! \brief Fills the end of the current logical sector and launches page programming.
*/
extern void at45dbx_write_close(void);
//! @}
/*! \name Single-Byte Access Functions
*/
//! @{
/*! \brief Performs a single byte read from DF memory.
*
* \return The read byte.
*
* \note First call must be preceded by a call to the \ref at45dbx_read_open
* function.
*/
extern U8 at45dbx_read_byte(void);
/*! \brief Performs a single byte write to DF memory.
*
* \param b The byte to write.
*
* \retval OK Success.
* \retval KO Failure.
*
* \note First call must be preceded by a call to the \ref at45dbx_write_open
* function.
*/
extern Bool at45dbx_write_byte(U8 b);
//! @}
/*! \name Multiple-Sector Access Functions
*/
//! @{
/*! \brief Reads \a nb_sector sectors from DF memory.
*
* Data flow is: DF -> callback.
*
* \param nb_sector Number of contiguous sectors to read.
*
* \retval OK Success.
* \retval KO Failure.
*
* \note First call must be preceded by a call to the \ref at45dbx_read_open
* function.
*
* \note As \ref AT45DBX_PAGE_SIZE is always a multiple of
* \ref AT45DBX_SECTOR_SIZE, there is no need to check page end for each
* byte.
*/
extern Bool at45dbx_read_multiple_sector(U16 nb_sector);
/*! \brief Callback function invoked after each sector read during
* \ref at45dbx_read_multiple_sector.
*
* \param psector Pointer to read sector.
*/
extern void at45dbx_read_multiple_sector_callback(const void *psector);
/*! \brief Writes \a nb_sector sectors to DF memory.
*
* Data flow is: callback -> DF.
*
* \param nb_sector Number of contiguous sectors to write.
*
* \retval OK Success.
* \retval KO Failure.
*
* \note First call must be preceded by a call to the \ref at45dbx_write_open
* function.
*
* \note As \ref AT45DBX_PAGE_SIZE is always a multiple of
* \ref AT45DBX_SECTOR_SIZE, there is no need to check page end for each
* byte.
*/
extern Bool at45dbx_write_multiple_sector(U16 nb_sector);
/*! \brief Callback function invoked before each sector write during
* \ref at45dbx_write_multiple_sector.
*
* \param psector Pointer to sector to write.
*/
extern void at45dbx_write_multiple_sector_callback(void *psector);
//! @}
/*! \name Single-Sector Access Functions
*/
//! @{
/*! \brief Reads 1 DF sector to a RAM buffer.
*
* Data flow is: DF -> RAM.
*
* \param ram Pointer to RAM buffer.
*
* \retval OK Success.
* \retval KO Failure.
*
* \note First call must be preceded by a call to the \ref at45dbx_read_open
* function.
*/
extern Bool at45dbx_read_sector_2_ram(void *ram);
/*! \brief Writes 1 DF sector from a RAM buffer.
*
* Data flow is: RAM -> DF.
*
* \param ram Pointer to RAM buffer.
*
* \retval OK Success.
* \retval KO Failure.
*
* \note First call must be preceded by a call to the \ref at45dbx_write_open
* function.
*/
extern Bool at45dbx_write_sector_from_ram(const void *ram);
//! @}
#endif // _AT45DBX_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief CTRL_ACCESS interface for the AT45DBX data flash controller.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SPI module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
//_____ I N C L U D E S ___________________________________________________
#include "conf_access.h"
#if AT45DBX_MEM == ENABLE
#include "conf_at45dbx.h"
#include "at45dbx.h"
#include "at45dbx_mem.h"
//_____ D E F I N I T I O N S ______________________________________________
//! Whether to detect write accesses to the memory.
#define AT45DBX_MEM_TEST_CHANGE_STATE ENABLED
#if (ACCESS_USB == ENABLED || ACCESS_MEM_TO_RAM == ENABLED) && AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED
//! Memory data modified flag.
static volatile Bool s_b_data_modify = FALSE;
#endif
/*! \name Control Interface
*/
//! @{
Ctrl_status at45dbx_test_unit_ready(void)
{
return (at45dbx_mem_check() == OK) ? CTRL_GOOD : CTRL_NO_PRESENT;
}
Ctrl_status at45dbx_read_capacity(U32 *u32_nb_sector)
{
*u32_nb_sector = (AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) - 1;
return CTRL_GOOD;
}
Bool at45dbx_wr_protect(void)
{
return FALSE;
}
Bool at45dbx_removal(void)
{
return FALSE;
}
//! @}
#if ACCESS_USB == ENABLED
#include "usb_drv.h"
#include "scsi_decoder.h"
/*! \name MEM <-> USB Interface
*/
//! @{
Ctrl_status at45dbx_usb_read_10(U32 addr, U16 nb_sector)
{
if (addr + nb_sector > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL;
at45dbx_read_open(addr);
at45dbx_read_multiple_sector(nb_sector);
at45dbx_read_close();
return CTRL_GOOD;
}
void at45dbx_read_multiple_sector_callback(const void *psector)
{
U16 data_to_transfer = AT45DBX_SECTOR_SIZE;
// Transfer read sector to the USB interface.
while (data_to_transfer)
{
while (!Is_usb_in_ready(g_scsi_ep_ms_in))
{
if(!Is_usb_endpoint_enabled(g_scsi_ep_ms_in))
return; // USB Reset
}
Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_in);
data_to_transfer = usb_write_ep_txpacket(g_scsi_ep_ms_in, psector,
data_to_transfer, &psector);
Usb_ack_in_ready_send(g_scsi_ep_ms_in);
}
}
Ctrl_status at45dbx_usb_write_10(U32 addr, U16 nb_sector)
{
if (addr + nb_sector > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL;
#if AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED
if (nb_sector) s_b_data_modify = TRUE;
#endif
at45dbx_write_open(addr);
at45dbx_write_multiple_sector(nb_sector);
at45dbx_write_close();
return CTRL_GOOD;
}
void at45dbx_write_multiple_sector_callback(void *psector)
{
U16 data_to_transfer = AT45DBX_SECTOR_SIZE;
// Transfer sector to write from the USB interface.
while (data_to_transfer)
{
while (!Is_usb_out_received(g_scsi_ep_ms_out))
{
if(!Is_usb_endpoint_enabled(g_scsi_ep_ms_out))
return; // USB Reset
}
Usb_reset_endpoint_fifo_access(g_scsi_ep_ms_out);
data_to_transfer = usb_read_ep_rxpacket(g_scsi_ep_ms_out, psector,
data_to_transfer, &psector);
Usb_ack_out_received_free(g_scsi_ep_ms_out);
}
}
//! @}
#endif // ACCESS_USB == ENABLED
#if ACCESS_MEM_TO_RAM == ENABLED
/*! \name MEM <-> RAM Interface
*/
//! @{
Ctrl_status at45dbx_df_2_ram(U32 addr, void *ram)
{
if (addr + 1 > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL;
at45dbx_read_open(addr);
at45dbx_read_sector_2_ram(ram);
at45dbx_read_close();
return CTRL_GOOD;
}
Ctrl_status at45dbx_ram_2_df(U32 addr, const void *ram)
{
if (addr + 1 > AT45DBX_MEM_CNT << (AT45DBX_MEM_SIZE - AT45DBX_SECTOR_BITS)) return CTRL_FAIL;
#if AT45DBX_MEM_TEST_CHANGE_STATE == ENABLED
s_b_data_modify = TRUE;
#endif
at45dbx_write_open(addr);
at45dbx_write_sector_from_ram(ram);
at45dbx_write_close();
return CTRL_GOOD;
}
//! @}
#endif // ACCESS_MEM_TO_RAM == ENABLED
#endif // AT45DBX_MEM == ENABLE

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief CTRL_ACCESS interface for the AT45DBX data flash controller.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SPI module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _AT45DBX_MEM_H_
#define _AT45DBX_MEM_H_
#include "conf_access.h"
#if AT45DBX_MEM == DISABLE
#error at45dbx_mem.h is #included although AT45DBX_MEM is disabled
#endif
#include "ctrl_access.h"
//_____ D E C L A R A T I O N S ____________________________________________
/*! \name Control Interface
*/
//! @{
/*! \brief Tests the memory state and initializes the memory if required.
*
* The TEST UNIT READY SCSI primary command allows an application client to poll
* a LUN until it is ready without having to allocate memory for returned data.
*
* This command may be used to check the media status of LUNs with removable
* media.
*
* \return Status.
*/
extern Ctrl_status at45dbx_test_unit_ready(void);
/*! \brief Returns the address of the last valid sector in the memory.
*
* \param u32_nb_sector Pointer to the address of the last valid sector.
*
* \return Status.
*/
extern Ctrl_status at45dbx_read_capacity(U32 *u32_nb_sector);
/*! \brief Returns the write-protection state of the memory.
*
* \return \c TRUE if the memory is write-protected, else \c FALSE.
*
* \note Only used by removable memories with hardware-specific write
* protection.
*/
extern Bool at45dbx_wr_protect(void);
/*! \brief Tells whether the memory is removable.
*
* \return \c TRUE if the memory is removable, else \c FALSE.
*/
extern Bool at45dbx_removal(void);
//! @}
#if ACCESS_USB == ENABLED
/*! \name MEM <-> USB Interface
*/
//! @{
/*! \brief Tranfers data from the memory to USB.
*
* \param addr Address of first memory sector to read.
* \param nb_sector Number of sectors to transfer.
*
* \return Status.
*/
extern Ctrl_status at45dbx_usb_read_10(U32 addr, U16 nb_sector);
/*! \brief Tranfers data from USB to the memory.
*
* \param addr Address of first memory sector to write.
* \param nb_sector Number of sectors to transfer.
*
* \return Status.
*/
extern Ctrl_status at45dbx_usb_write_10(U32 addr, U16 nb_sector);
//! @}
#endif
#if ACCESS_MEM_TO_RAM == ENABLED
/*! \name MEM <-> RAM Interface
*/
//! @{
/*! \brief Copies 1 data sector from the memory to RAM.
*
* \param addr Address of first memory sector to read.
* \param ram Pointer to RAM buffer to write.
*
* \return Status.
*/
extern Ctrl_status at45dbx_df_2_ram(U32 addr, void *ram);
/*! \brief Copies 1 data sector from RAM to the memory.
*
* \param addr Address of first memory sector to write.
* \param ram Pointer to RAM buffer to read.
*
* \return Status.
*/
extern Ctrl_status at45dbx_ram_2_df(U32 addr, const void *ram);
//! @}
#endif
#endif // _AT45DBX_MEM_H_

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Revision: 2491

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#ifndef WL_OS_H
#define WL_OS_H
#include <stdarg.h>
#include <stdlib.h>
void *owl_os_alloc(size_t size);
void *owl_os_realloc(void *ptr, size_t size);
void owl_os_free(void *p);
void *owl_os_memcpy(void *dst, const void *src, size_t n);
void *owl_os_memset(void *s, int c, size_t n);
void *owl_os_memmove(void *dst, const void *src, size_t n);
size_t owl_os_strlen(char *s);
char *owl_os_strncpy(char *dst, const char *src, size_t n);
int owl_os_strncmp(const char *s1, const char *s2, size_t n);
int owl_os_strcmp(const char *s1, const char *s2);
char *owl_os_strcpy(char *dst, const char *src);
char *owl_os_strdup(const char *s);
char *owl_os_strndup(const char *s, size_t n);
int owl_os_memcmp(const void *s1, const void *s2, size_t n);
long int owl_os_strtol(const char *nptr, char **endptr, int base);
char *owl_os_strchr(const char *s, int c);
char *owl_os_strrchr(const char *s, int c);
int owl_os_strcasecmp(const char *s1, const char *s2);
char *owl_os_strstr(const char *haystack, const char *needle);
int owl_os_snprintf(char *str, size_t size, const char *format, ...)
__attribute__((format(printf, 3, 4)));
int owl_os_vprintf(const char *format, va_list arg); /* debug only */
int owl_os_printf(const char *format, ...) /* debug only */
__attribute__((format(printf, 1, 2)));
#endif /* WL_OS_H */

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/*!
* \file wl_sdio.h
* \brief SDIO interface for wl_api.
* Copyright (C) 2010 HD Wireless AB
*
* You should have received a copy of the license along with this library.
*/
#ifndef WL_SDIO_H
#define WL_SDIO_H
/** \defgroup wl_sdio SDIO Interface
*
* These functions implement the interface that the wl_api library
* needs to work with a SDIO transport layer.
*
* The functions prototyped here must be implemented when porting the
* wl_api library to a new platform with a different SDIO configuration
*
* On platforms supported by H&D Wireless these functions are
* implemented in the file avr32_sdio.c
*
* @{
*/
/**
* Maximum transfer size. This will set an upper limit on the len parameter
* passed to owl_sdio_tx() and owl_sdio_rx().
*
*/
#define MAX_BLOCK_LEN 512
/**
* This flag might be set when owl_sdio_cmd() is called in case the cmd will
* be followed by a data transfer. If the flag is set, the transfer direction is
* from the device to the host (read). Otherwise, the transfer direction is
* from the host to the device (write).
*
*/
#define CMD_FLAG_TO_HOST (1 << 0)
/**
* Indicates that the sdio driver needs to be polled in order to make
* forward progress, i.e. it does not support interrupts
*
* The actual polling will result in owl_sdio_cmd() being called to
* request status information from the device.
*
* To activate polling, this flag should be set in owl_sdio_init().
*/
#define SDIO_FLAG_POLL (1 << 0)
/**
* Indicates that the sdio driver only supports 1-bit mode.
*
* To set 1-bit mode, this flag should be set in owl_sdio_init().
*/
#define SDIO_FLAG_1BIT_MODE (1 << 1)
/**
* This function will be invoked when wlan initialization should be performed,
* this happens when the wl_fw_download() function in the transport group of
* wl_api is invoked.
*
* The wifi device supports sdio high speed mode and clock frequencies up to
* 50 MHz.
*
* The function is responsible for doing any necessary sdio initialization such
* as allocating gpio's, setting up the mci master, one time allocations of
* dma buffers etc.
*
* @param flags is an out parameter that should hold any sdio flags upon return.
* The avaible flags are prefixed with SDIO_FLAG_
*
*
*/
void owl_sdio_init(uint8_t *flags);
/**
* This function will be invoked when an sdio cmd should be sent to the
* device.
*
* @param idx is the sdio command number
* @param arg is the sdio command argument
* @param flags specifies other options, such as any transfer direction.
* @param rsp should hold the command response upon return. If null, the
* response can be ignored.
* @param data holds a pointer to any data that might follow the command. This
* allows the sdio driver to setup dma transfers while waiting for the
* command response. NULL if no data transfer will follow. Note that
* the same data pointer will be passed to owl_sdio_tx(), which should
* start the actual transfer.
* @param len is the length of the data buffer.
*
*/
void owl_sdio_cmd(uint8_t idx, uint32_t arg, uint8_t flags, uint32_t *rsp,
const uint8_t *data, uint16_t len);
/**
* This function will be invoked when data should be transmitted to the device.
*
* If wl_fw_downlad() was called with the size_align parameter set to non-zero,
* the pad parameter should be used. If the pad parameter is not 0, additional
* data must be transmitted after the data buffer has be sent. Depending on
* how the data buffer was first allocated (probably by an TCP/IP stack), it
* might be safe or unsafe to continue reading beyond the data buffer to
* transmit the additional padding bytes.
*
* @param data holds a pointer to the data to transmit, the pointer is the
* same as the one passed to wl_tx().
* @param len is the number of bytes that should be transmitted, including
* padding.
* @param pad is the number of padding bytes to send.
*
*/
void owl_sdio_tx(const uint8_t *data, uint16_t len, uint8_t pad);
/**
* This function will be invoked when data should be received from the device.
*
* @param data should hold the read data upon return.
* @param len is the number of bytes to read.
*
*/
void owl_sdio_rx(uint8_t *data, uint16_t len);
/**
* Invoked when sdio rx interrupts from the device should be enabled or
* disabled.
*
* If SDIO_FLAG_POLL was set in wl_spi_init(), then this function can be
* left empty.
*
* @param enable specifies if interrupts should be enabled or disabled.
*
*/
void owl_sdio_irq(uint8_t enable);
/**
* Delay executiom for the specified number of ms. This function will be called
* with delays in the 10-20 ms range during fw download and startup of the
* Wi-Fi device. This function can be implemented with a simple for-loop if
* desired (beware of optimization). The timing does not have to be accurate as
* long as the actual delay becomes at least the specified number of ms.
*
* @param ms is the minimal amount of time to wait [ms].
*
*/
void owl_sdio_mdelay(uint32_t ms);
/**
* This function should be called whenever an interrupt is detected. It can
* be called from an interrupt context.
*
* If SDIO_FLAG_POLL was set in owl_sdio_init(), then wl_sdio_irq()
* should never be called.
*
*/
extern void wl_sdio_irq(void);
/*! @} */
#endif

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/*!
* \file wl_spi.h
* \brief SPI interface for wl_api.
* Copyright (C) 2010 HD Wireless AB
*
* You should have received a copy of the license along with this library.
*/
#ifndef WL_SPI_H
#define WL_SPI_H
#ifndef WITHOUT_STDINT
#include <stdint.h>
#endif
/** \defgroup wl_spi SPI Interface
*
* These functions implement the interface that the wl_api library
* needs to work with a SPI transport layer.
*
* The functions prototyped here must be implemented when porting the
* wl_api library to a new platform with a different SPI configuration
*
* On platforms supported by H&D Wireless these functions are
* implemented in the file avr32_spi.c
*
* @{
*/
/**
* Maximum transfer size. This will set an upper limit on the len parameter
* passed to owl_spi_txrx().
*
*
*/
#define MAX_BLOCK_LEN 512
/**
* Indicates that the spi driver needs to be polled in order to make
* forward progress, i.e. it does not support interrupts through SD pin 8.
*
* The actual polling will result in owl_spi_txrx() being call to
* request status information from the device.
*
* To activate polling, this flag should be set in owl_spi_init().
*
* See wl_poll() and wl_register_rx_isr() for more information regarding
* polled and interrupt modes.
*
*/
#define SPI_FLAG_POLL (1 << 0)
/**
* This function will be invoked when wlan device initialization should be
* performed, this happens when the wl_fw_download() function in the transport
* group of wl_api is invoked.
*
* The wifi device requires spi mode 3, i.e. clock polarity high and sample
* on second phase. This corresponds to CPOL=1, CPHA=1. Maximum frequency on
* spi clock is 30 MHz.
*
* The function is also responsible for doing any necessary spi initialization
* such as allocating gpio's, setting up the SPI master, one time allocations of
* dma buffers etc.
*
*
* If the SPB105 device is used, two signals; POWER (pin 10 on SPB105) and
* SHUTDOWN (pin 4 on SPB105) might be connected to gpio's on the host.
* The GPIO_POWER_PIN is the main power supply to the device. The
* GPIO_SHUTDOWN_PIN (active low) should be defined as an input.
*
* After GPIO_POWER_PIN is pulled high by the host, the device will pull the
* GPIO_SHUTDOWN_PIN high once the device is properly powered.
*
* However, if pin 4 (GPIO_SHUTDOWN_PIN) is not connected to the host, a delay
* of up to 250 ms must be added after GPIO_POWER_PIN is pulled high to ensure
* that startup is completed. The actual time is usually much shorter, therefore
* one might try to reduce the delay for a particualar hardware design.
*
* On SPB104, the GPIO_POWER_PIN will be connected to VCC and GPIO_SHUTDOWN_PIN
* will be unconnected; hence we have to make sure that we have enough delay
* after powering on the host. Since the device power-on usually happens at the
* same time as the host power-on, the startup time of the host can be
* subtracted from any delay put into owl_spi_init().
*
* @param flags is an out parameter that should hold any spi flags upon return.
* The avaible flags are prefixed with SPI_FLAG_
*
* @return 0 on success
* -1 if any error occurs
*
*/
int owl_spi_init(uint8_t *flags);
/**
* Invoked when a spi transfer should be performed.
*
* All buffers that are allocated by the wl library will have a size that is
* aligned to 4. If size-unaligned data is passed to this function, it is
* always allocated by the ip stack. If 4-byte size alignment (e.g. for DMA)
* is required, 1-3 extra padding bytes can be transmitted after the in buffer.
* These bytes must be 0xff.
*
* Since size-unaligned data always comes from the ip stack, the out ptr is
* always NULL for such data.
*
* @param in points a buffer which holds the data to be transmitted. If NULL,
* then \a len bytes with the value 0xff should be transmitted on the
* bus.
* @param out points a buffer should hold the data received from the device. If
* NULL, any received data can be discarded.
* @param len is the length of the in and out buffers.
*
*/
void owl_spi_txrx(const uint8_t *in, uint8_t* out, uint16_t len);
/**
* Invoked when spi rx interrupts from the device should be enabled or disabled.
* Note that the spi interrupts are obtained from pin 8 on SPB104 or pin 3 from
* SPB105. This pin can be be connected to a gpio on the host. The irq line
* will signal an interrupt on both edges.
*
* In general, the wifi device will not issue a new interrupt unless the
* last interrupt has been handled. Also, during normal operation (i.e after
* the complete callback registered in wl_init() has been invoked),
* owl_spi_irq() will never be invoked so interrupts will be enabled all
* the time. For the SPI-mode, the purpose of owl_spi_irq() is basically to
* make sure that the first interrupt (coming after the reset performed in
* owl_spi_init()) is ignored.
*
* If SPI_FLAG_POLL was set in owl_spi_init(), then this function can be
* left empty and the wifi device will be used in polled mode. In polled mode,
* the interrupt line is not used. Regardless of polled or interrupt-mode,
* wl_poll() must be called to ensure progress of the driver.
*
* @param enable specifies if interrupts should be enabled or disabled.
*
*/
void owl_spi_irq(uint8_t enable);
/**
* Invoked when the spi cs for the wifi device should be enabled. Note that
* multiple calls to owl_spi_txrx() might be done during a 'single' chip
* select.
*
* @param enable specifies whether chip select should be asserted or deasserted,
* The chip select signal is active low, so if enable is '1' then the
* chip select connected to the wifi device should be set to '0'.
*
*/
void owl_spi_cs(uint8_t enable);
/**
* Delay executiom for the specified number of ms. This function will be called
* with delays in the 10-20 ms range during fw download and startup of the
* Wi-Fi device. This function can be implemented with a simple for-loop if
* desired (beware of optimization). The timing does not have to be accurate as
* long as the actual delay becomes at least the specified number of ms.
*
* @param ms is the minimal amount of time to wait [ms].
*
*/
void owl_spi_mdelay(uint32_t ms);
/**
* This function should be called whenever an interrupt is detected. It can
* be called from an interrupt context.
*
* If SPI_FLAG_POLL was set in owl_spi_init(), then wl_spi_irq()
* should never be called.
*
*/
extern void wl_spi_irq(void);
/*! @} */
#endif

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/*
* Programming interface for wlap_api.
* Copyright (C) 2011 HD Wireless AB
*
* You should have received a copy of the license along with this library.
*/
/*! \file wlap_api.h *************************************************************
*
* \brief WiFi AP API
*
* This file provides the wlap_api interface.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices:
* \li SPB104 + EVK1100
* \li SPB104 + EVK1101
* \li SPB104 + EVK1104
* \li SPB104 + EVK1105 (SPI)
* \li SPB104 + EVK1105 (SPI + irq)
* \li SPB105 + EVK1105 (SPI)
* - AppNote:
*
* \author H&D Wireless AB: \n
*
*****************************************************************************
*
* \section intro Introduction
* This is the documentation for the WiFi AP Driver API \a wlap_api.
*
* \section files Main Files
* - wlap_api.h : WiFi driver interface.
* - libwlap_api_*.*.a - Driver library.
*
*/
#ifndef WLAP_API_H
#define WLAP_API_H
#define WLAP_API_RELEASE_NAME "unknown"
#include <wl_api.h>
/** \defgroup wl_softap Access Point Mode
*
* \brief Support the WiFi Access Point mode.
*
* @{
*/
/*
* Station representation
*
*/
struct wl_sta_t
{
struct wl_mac_addr_t bssid; /**< The BSSID of the network. */
uint8_t queued_pkt_cnt; /**< Number of queueud packets for
this STA. */
uint8_t in_ps; /**< Is the STA in power save mode. */
uint8_t aid; /**< STA AID */
};
/* Station list representation. Array of pointers to wl_sta_t entries. */
struct wl_sta_list_t
{
struct wl_sta_t **sta; /**< The list of pointers to stations */
size_t cnt; /**< Number of stations */
};
/*! \brief Get the list of currently associated stations (SoftAP).
*
* Retrieves the list of current stations from
* the driver.
*
* This function is not thread safe. It must be called in the
* same execution context as wl_poll().
*
* @param network_list Output buffer. The API call returns
* a pointer to allocated memory containing the network list.
* @return
* - WL_SUCCESS
* - WL_FAILURE.
*/
wl_err_t wlap_get_sta_list(struct wl_sta_list_t **network_list);
/*! Callback used to read data from a TX packet.
* This function is supplied by the user of the API.
*
* @param dst Destination buffer. The data should be copied
* to this buffer.
* @param src_handle Handle to the source packet from where
* the data should be copied. This handle is the same one that
* is passed in parameter \a pkt_handle to \a wl_process_tx().
* @param read_len Number of bytes to copy from \a src_handle
* to \a dst.
* @param offset The offset in bytes, counting from the
* beginning of the Ethernet header, from where to copy data.
* @return
* - The number of bytes copied. This number may be smaller
* than the length requested in \a read_len but it may not
* be shorter than the length of the packet counting from
* \a offset. In other words, if the caller of this function
* receives a return count that is shorter than \a read_len
* he will assume that all packet data has been read.
* - < 0 on error.
*/
typedef ssize_t (*wl_pkt_read_cb_t)(char *dst,
void *src_handle,
size_t read_len,
int offset);
/*! \brief Register a data access function for TX packets (SoftAP).
*
* When a TX data packet has a different representation than a single
* contiguous buffer in memory then a packet read function must be
* implemented and registered with this call. Whenever the library
* needs to read packet data it will call this function to do it.
*
* This function can be ignored if the TX packet representation is
* a single contiguous buffer. This function is only needed in SoftAP
* mode.
*
* @param pkt_read_cb Read callback.
* @param ctx Context
*/
void wl_register_pkt_read_cb(wl_pkt_read_cb_t pkt_read_cb);
/*! \brief Start a network using the SoftAP mode.
*
* This call will cause the WiFi chip to start sending beacons
* and accept associations from WiFi stations.
*
*/
wl_err_t wlap_start_ap(const char *ssid,
const size_t ssid_len,
const uint8_t channel,
const enum wl_auth_mode auth_mode,
const enum wl_enc_type enc_type);
/*! \brief Disconnect a STA (SoftAP)
*
* @param bssid The BSSID of the station to disconnect.
* @return
* - WL_SUCCESS
* - WL_FAILURE.
*/
wl_err_t wlap_disconnect_sta(const struct wl_mac_addr_t bssid);
/*! @} */ /* End wl_softap group */
#endif

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Cycle counter driver.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32UC devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _CYCLE_COUNTER_H_
#define _CYCLE_COUNTER_H_
#include "compiler.h"
//! Structure holding private information, automatically initialized by the
//! cpu_set_timeout() function.
typedef struct
{
//! The cycle count at the begining of the timeout.
unsigned long delay_start_cycle;
//! The cycle count at the end of the timeout.
unsigned long delay_end_cycle;
//! Enable/disable the timout detection
unsigned char timer_state;
#define CPU_TIMER_STATE_STARTED 0
#define CPU_TIMER_STATE_REACHED 1
#define CPU_TIMER_STATE_STOPPED 2
} t_cpu_time;
/*!
* \brief Convert milli-seconds into CPU cycles.
*
* \param ms: Number of millisecond.
* \param fcpu_hz: CPU frequency in Hz.
*
* \return the converted number of CPU cycles.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ U32 cpu_ms_2_cy(unsigned long ms, unsigned long fcpu_hz)
{
return ((unsigned long long)ms * fcpu_hz + 999) / 1000;
}
/*!
* \brief Convert micro-seconds into CPU cycles.
*
* \param us: Number of microsecond.
* \param fcpu_hz: CPU frequency in Hz.
*
* \return the converted number of CPU cycles.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ U32 cpu_us_2_cy(unsigned long us, unsigned long fcpu_hz)
{
return ((unsigned long long)us * fcpu_hz + 999999) / 1000000;
}
/*!
* \brief Convert CPU cycles into milli-seconds.
*
* \param cy: Number of CPU cycles.
* \param fcpu_hz: CPU frequency in Hz.
*
* \return the converted number of milli-second.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ U32 cpu_cy_2_ms(unsigned long cy, unsigned long fcpu_hz)
{
return ((unsigned long long)cy * 1000 + fcpu_hz-1) / fcpu_hz;
}
/*!
* \brief Convert CPU cycles into micro-seconds.
*
* \param cy: Number of CPU cycles.
* \param fcpu_hz: CPU frequency in Hz.
*
* \return the converted number of micro-second.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ U32 cpu_cy_2_us(unsigned long cy, unsigned long fcpu_hz)
{
return ((unsigned long long)cy * 1000000 + fcpu_hz-1) / fcpu_hz;
}
/*!
* \brief Set a timer variable.
*
* Ex: t_cpu_time timer;
* cpu_set_timeout( cpu_ms_2_cy(10, FOSC0), &timer ); // timeout in 10 ms
* if( cpu_is_timeout(&timer) )
* cpu_stop_timeout(&timer);
* ../..
*
* \param delay: (input) delay in CPU cycles before timeout.
* \param cpu_time: (output) internal information used by the timer API.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void cpu_set_timeout(unsigned long delay, t_cpu_time *cpu_time)
{
cpu_time->delay_start_cycle = Get_system_register(AVR32_COUNT);
cpu_time->delay_end_cycle = cpu_time->delay_start_cycle + delay;
cpu_time->timer_state = CPU_TIMER_STATE_STARTED;
}
/*!
* \brief Test if a timer variable reached its timeout.
*
* Once the timeout is reached, the function will always return TRUE,
* until the cpu_stop_timeout() function is called.
*
* Ex: t_cpu_time timer;
* cpu_set_timeout( 10, FOSC0, &timer ); // timeout in 10 ms
* if( cpu_is_timeout(&timer) )
* cpu_stop_timeout(&timer);
* ../..
*
* \param cpu_time: (input) internal information used by the timer API.
*
* \return TRUE if timeout occured, otherwise FALSE.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned long cpu_is_timeout(t_cpu_time *cpu_time)
{
unsigned long current_cycle_count = Get_system_register(AVR32_COUNT);
if( cpu_time->timer_state==CPU_TIMER_STATE_STOPPED )
return FALSE;
// Test if the timeout as already occured.
else if (cpu_time->timer_state == CPU_TIMER_STATE_REACHED)
return TRUE;
// If the ending cycle count of this timeout is wrapped, ...
else if (cpu_time->delay_start_cycle > cpu_time->delay_end_cycle)
{
if (current_cycle_count < cpu_time->delay_start_cycle && current_cycle_count > cpu_time->delay_end_cycle)
{
cpu_time->timer_state = CPU_TIMER_STATE_REACHED;
return TRUE;
}
return FALSE;
}
else
{
if (current_cycle_count < cpu_time->delay_start_cycle || current_cycle_count > cpu_time->delay_end_cycle)
{
cpu_time->timer_state = CPU_TIMER_STATE_REACHED;
return TRUE;
}
return FALSE;
}
}
/*!
* \brief Stop a timeout detection.
*
* Ex: t_cpu_time timer;
* cpu_set_timeout( 10, FOSC0, &timer ); // timeout in 10 ms
* if( cpu_is_timeout(&timer) )
* cpu_stop_timeout(&timer);
* ../..
*
* \param cpu_time: (input) internal information used by the timer API.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void cpu_stop_timeout(t_cpu_time *cpu_time)
{
cpu_time->timer_state = CPU_TIMER_STATE_STOPPED;
}
/*!
* \brief Test if a timer is stopped.
*
* \param cpu_time: (input) internal information used by the timer API.
*
* \return TRUE if timer is stopped, otherwise FALSE.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned long cpu_is_timer_stopped(t_cpu_time *cpu_time)
{
if( cpu_time->timer_state==CPU_TIMER_STATE_STOPPED )
return TRUE;
else
return FALSE;
}
/*!
* \brief Waits during at least the specified delay (in millisecond) before returning.
*
* \param delay: Number of millisecond to wait.
* \param fcpu_hz: CPU frequency in Hz.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void cpu_delay_ms(unsigned long delay, unsigned long fcpu_hz)
{
t_cpu_time timer;
cpu_set_timeout( cpu_ms_2_cy(delay, fcpu_hz), &timer);
while( !cpu_is_timeout(&timer) );
}
/*!
* \brief Waits during at least the specified delay (in microsecond) before returning.
*
* \param delay: Number of microsecond to wait.
* \param fcpu_hz: CPU frequency in Hz.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void cpu_delay_us(unsigned long delay, unsigned long fcpu_hz)
{
t_cpu_time timer;
cpu_set_timeout( cpu_us_2_cy(delay, fcpu_hz), &timer);
while( !cpu_is_timeout(&timer) );
}
/*!
* \brief Waits during at least the specified delay (in CPU cycles) before returning.
*
* \param delay: Number of CPU cycles to wait.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void cpu_delay_cy(unsigned long delay)
{
t_cpu_time timer;
cpu_set_timeout( delay, &timer);
while( !cpu_is_timeout(&timer) );
}
#define Get_sys_count() ( Get_system_register(AVR32_COUNT) )
#define Set_sys_count(x) ( Set_system_register(AVR32_COUNT, (x)) )
#define Get_sys_compare() ( Get_system_register(AVR32_COMPARE) )
#define Set_sys_compare(x) ( Set_system_register(AVR32_COMPARE, (x)) )
#endif // _CYCLE_COUNTER_H_

995
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/DRIVERS/EBI/SMC/smc.c Normal file
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@ -0,0 +1,995 @@
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief SMC on EBI driver for AVR32 UC3.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a SMC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include "compiler.h"
#include "preprocessor.h"
#include "gpio.h"
#include "smc.h"
// Configure the SM Controller with SM setup and timing information for all chip select
#define SMC_CS_SETUP(ncs) { \
U32 nwe_setup = ((NWE_SETUP * hsb_mhz_up + 999) / 1000); \
U32 ncs_wr_setup = ((NCS_WR_SETUP * hsb_mhz_up + 999) / 1000); \
U32 nrd_setup = ((NRD_SETUP * hsb_mhz_up + 999) / 1000); \
U32 ncs_rd_setup = ((NCS_RD_SETUP * hsb_mhz_up + 999) / 1000); \
U32 nwe_pulse = ((NWE_PULSE * hsb_mhz_up + 999) / 1000); \
U32 ncs_wr_pulse = ((NCS_WR_PULSE * hsb_mhz_up + 999) / 1000); \
U32 nrd_pulse = ((NRD_PULSE * hsb_mhz_up + 999) / 1000); \
U32 ncs_rd_pulse = ((NCS_RD_PULSE * hsb_mhz_up + 999) / 1000); \
U32 nwe_cycle = ((NWE_CYCLE * hsb_mhz_up + 999) / 1000); \
U32 nrd_cycle = ((NRD_CYCLE * hsb_mhz_up + 999) / 1000); \
\
/* Some coherence checks... */ \
/* Ensures CS is active during Rd or Wr */ \
if( ncs_rd_setup + ncs_rd_pulse < nrd_setup + nrd_pulse ) \
ncs_rd_pulse = nrd_setup + nrd_pulse - ncs_rd_setup; \
if( ncs_wr_setup + ncs_wr_pulse < nwe_setup + nwe_pulse ) \
ncs_wr_pulse = nwe_setup + nwe_pulse - ncs_wr_setup; \
\
/* ncs_hold = n_cycle - ncs_setup - ncs_pulse */ \
/* n_hold = n_cycle - n_setup - n_pulse */ \
/* */ \
/* All holds parameters must be positive or null, so: */ \
/* nwe_cycle shall be >= ncs_wr_setup + ncs_wr_pulse */ \
if( nwe_cycle < ncs_wr_setup + ncs_wr_pulse ) \
nwe_cycle = ncs_wr_setup + ncs_wr_pulse; \
\
/* nwe_cycle shall be >= nwe_setup + nwe_pulse */ \
if( nwe_cycle < nwe_setup + nwe_pulse ) \
nwe_cycle = nwe_setup + nwe_pulse; \
\
/* nrd_cycle shall be >= ncs_rd_setup + ncs_rd_pulse */ \
if( nrd_cycle < ncs_rd_setup + ncs_rd_pulse ) \
nrd_cycle = ncs_rd_setup + ncs_rd_pulse; \
\
/* nrd_cycle shall be >= nrd_setup + nrd_pulse */ \
if( nrd_cycle < nrd_setup + nrd_pulse ) \
nrd_cycle = nrd_setup + nrd_pulse; \
\
AVR32_SMC.cs[ncs].setup = (nwe_setup << AVR32_SMC_SETUP0_NWE_SETUP_OFFSET) | \
(ncs_wr_setup << AVR32_SMC_SETUP0_NCS_WR_SETUP_OFFSET) | \
(nrd_setup << AVR32_SMC_SETUP0_NRD_SETUP_OFFSET) | \
(ncs_rd_setup << AVR32_SMC_SETUP0_NCS_RD_SETUP_OFFSET); \
AVR32_SMC.cs[ncs].pulse = (nwe_pulse << AVR32_SMC_PULSE0_NWE_PULSE_OFFSET) | \
(ncs_wr_pulse << AVR32_SMC_PULSE0_NCS_WR_PULSE_OFFSET) | \
(nrd_pulse << AVR32_SMC_PULSE0_NRD_PULSE_OFFSET) | \
(ncs_rd_pulse << AVR32_SMC_PULSE0_NCS_RD_PULSE_OFFSET); \
AVR32_SMC.cs[ncs].cycle = (nwe_cycle << AVR32_SMC_CYCLE0_NWE_CYCLE_OFFSET) | \
(nrd_cycle << AVR32_SMC_CYCLE0_NRD_CYCLE_OFFSET); \
AVR32_SMC.cs[ncs].mode = (((NCS_CONTROLLED_READ) ? AVR32_SMC_MODE0_READ_MODE_NCS_CONTROLLED : \
AVR32_SMC_MODE0_READ_MODE_NRD_CONTROLLED) << AVR32_SMC_MODE0_READ_MODE_OFFSET) | \
+ (((NCS_CONTROLLED_WRITE) ? AVR32_SMC_MODE0_WRITE_MODE_NCS_CONTROLLED : \
AVR32_SMC_MODE0_WRITE_MODE_NWE_CONTROLLED) << AVR32_SMC_MODE0_WRITE_MODE_OFFSET) | \
(NWAIT_MODE << AVR32_SMC_MODE0_EXNW_MODE_OFFSET) | \
(((SMC_8_BIT_CHIPS) ? AVR32_SMC_MODE0_BAT_BYTE_WRITE : \
AVR32_SMC_MODE0_BAT_BYTE_SELECT) << AVR32_SMC_MODE0_BAT_OFFSET) | \
(((SMC_DBW <= 8 ) ? AVR32_SMC_MODE0_DBW_8_BITS : \
(SMC_DBW <= 16) ? AVR32_SMC_MODE0_DBW_16_BITS : \
AVR32_SMC_MODE0_DBW_32_BITS) << AVR32_SMC_MODE0_DBW_OFFSET) | \
(TDF_CYCLES << AVR32_SMC_MODE0_TDF_CYCLES_OFFSET) | \
(TDF_OPTIM << AVR32_SMC_MODE0_TDF_MODE_OFFSET) | \
(PAGE_MODE << AVR32_SMC_MODE0_PMEN_OFFSET) | \
(PAGE_SIZE << AVR32_SMC_MODE0_PS_OFFSET); \
smc_tab_cs_size[ncs] = (U8)EXT_SM_SIZE; \
}
static U8 smc_tab_cs_size[6];
static void smc_enable_muxed_pins(void);
void smc_init(unsigned long hsb_hz)
{
unsigned long hsb_mhz_up = (hsb_hz + 999999) / 1000000;
//! Whether to use the NCS0 pin
#ifdef SMC_USE_NCS0
#include SMC_COMPONENT_CS0
// Setup SMC for NCS0
SMC_CS_SETUP(0)
#ifdef SMC_DBW_GLOBAL
#if (SMC_DBW_GLOBAL < SMC_DBW)
#undef SMC_DBW_GLOBAL
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#else
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#ifdef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT)
#undef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#else
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#ifdef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE_GLOBAL < NWAIT_MODE)
#undef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#else
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#undef EXT_SM_SIZE
#undef SMC_DBW
#undef SMC_8_BIT_CHIPS
#undef NWE_SETUP
#undef NCS_WR_SETUP
#undef NRD_SETUP
#undef NCS_RD_SETUP
#undef NCS_WR_PULSE
#undef NWE_PULSE
#undef NCS_RD_PULSE
#undef NRD_PULSE
#undef NCS_WR_HOLD
#undef NWE_HOLD
#undef NWE_CYCLE
#undef NCS_RD_HOLD
#undef NRD_CYCLE
#undef TDF_CYCLES
#undef TDF_OPTIM
#undef PAGE_MODE
#undef PAGE_SIZE
#undef NCS_CONTROLLED_READ
#undef NCS_CONTROLLED_WRITE
#undef NWAIT_MODE
#endif
//! Whether to use the NCS1 pin
#ifdef SMC_USE_NCS1
#include SMC_COMPONENT_CS1
// Enable SM mode for CS1 if necessary.
AVR32_HMATRIX.sfr[AVR32_EBI_HMATRIX_NR] &= ~(1 << AVR32_EBI_SDRAM_CS);
AVR32_HMATRIX.sfr[AVR32_EBI_HMATRIX_NR];
// Setup SMC for NCS1
SMC_CS_SETUP(1)
#ifdef SMC_DBW_GLOBAL
#if (SMC_DBW_GLOBAL < SMC_DBW)
#undef SMC_DBW_GLOBAL
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#else
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#ifdef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT)
#undef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#else
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#ifdef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE_GLOBAL < NWAIT_MODE)
#undef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#else
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#undef EXT_SM_SIZE
#undef SMC_DBW
#undef SMC_8_BIT_CHIPS
#undef NWE_SETUP
#undef NCS_WR_SETUP
#undef NRD_SETUP
#undef NCS_RD_SETUP
#undef NCS_WR_PULSE
#undef NWE_PULSE
#undef NCS_RD_PULSE
#undef NRD_PULSE
#undef NCS_WR_HOLD
#undef NWE_HOLD
#undef NWE_CYCLE
#undef NCS_RD_HOLD
#undef NRD_CYCLE
#undef TDF_CYCLES
#undef TDF_OPTIM
#undef PAGE_MODE
#undef PAGE_SIZE
#undef NCS_CONTROLLED_READ
#undef NCS_CONTROLLED_WRITE
#undef NWAIT_MODE
#endif
//! Whether to use the NCS2 pin
#ifdef SMC_USE_NCS2
#include SMC_COMPONENT_CS2
// Setup SMC for NCS2
SMC_CS_SETUP(2)
#ifdef SMC_DBW_GLOBAL
#if (SMC_DBW_GLOBAL < SMC_DBW)
#undef SMC_DBW_GLOBAL
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#else
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#ifdef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT)
#undef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#else
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#ifdef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE_GLOBAL < NWAIT_MODE)
#undef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#else
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#undef EXT_SM_SIZE
#undef SMC_DBW
#undef SMC_8_BIT_CHIPS
#undef NWE_SETUP
#undef NCS_WR_SETUP
#undef NRD_SETUP
#undef NCS_RD_SETUP
#undef NCS_WR_PULSE
#undef NWE_PULSE
#undef NCS_RD_PULSE
#undef NRD_PULSE
#undef NCS_WR_HOLD
#undef NWE_HOLD
#undef NWE_CYCLE
#undef NCS_RD_HOLD
#undef NRD_CYCLE
#undef TDF_CYCLES
#undef TDF_OPTIM
#undef PAGE_MODE
#undef PAGE_SIZE
#undef NCS_CONTROLLED_READ
#undef NCS_CONTROLLED_WRITE
#undef NWAIT_MODE
#endif
//! Whether to use the NCS3 pin
#ifdef SMC_USE_NCS3
#include SMC_COMPONENT_CS3
// Setup SMC for NCS3
SMC_CS_SETUP(3)
#ifdef SMC_DBW_GLOBAL
#if (SMC_DBW_GLOBAL < SMC_DBW)
#undef SMC_DBW_GLOBAL
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#else
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#ifdef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT)
#undef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#else
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#ifdef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE_GLOBAL < NWAIT_MODE)
#undef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#else
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#undef EXT_SM_SIZE
#undef SMC_DBW
#undef SMC_8_BIT_CHIPS
#undef NWE_SETUP
#undef NCS_WR_SETUP
#undef NRD_SETUP
#undef NCS_RD_SETUP
#undef NCS_WR_PULSE
#undef NWE_PULSE
#undef NCS_RD_PULSE
#undef NRD_PULSE
#undef NCS_WR_HOLD
#undef NWE_HOLD
#undef NWE_CYCLE
#undef NCS_RD_HOLD
#undef NRD_CYCLE
#undef TDF_CYCLES
#undef TDF_OPTIM
#undef PAGE_MODE
#undef PAGE_SIZE
#undef NCS_CONTROLLED_READ
#undef NCS_CONTROLLED_WRITE
#undef NWAIT_MODE
#endif
//! Whether to use the NCS4 pin
#ifdef SMC_USE_NCS4
#include SMC_COMPONENT_CS4
// Setup SMC for NCS4
SMC_CS_SETUP(4)
#ifdef SMC_DBW_GLOBAL
#if (SMC_DBW_GLOBAL < SMC_DBW)
#undef SMC_DBW_GLOBAL
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#else
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#ifdef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT)
#undef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#else
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#ifdef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE_GLOBAL < NWAIT_MODE)
#undef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#else
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#undef EXT_SM_SIZE
#undef SMC_DBW
#undef SMC_8_BIT_CHIPS
#undef NWE_SETUP
#undef NCS_WR_SETUP
#undef NRD_SETUP
#undef NCS_RD_SETUP
#undef NCS_WR_PULSE
#undef NWE_PULSE
#undef NCS_RD_PULSE
#undef NRD_PULSE
#undef NCS_WR_HOLD
#undef NWE_HOLD
#undef NWE_CYCLE
#undef NCS_RD_HOLD
#undef NRD_CYCLE
#undef TDF_CYCLES
#undef TDF_OPTIM
#undef PAGE_MODE
#undef PAGE_SIZE
#undef NCS_CONTROLLED_READ
#undef NCS_CONTROLLED_WRITE
#undef NWAIT_MODE
#endif
//! Whether to use the NCS5 pin
#ifdef SMC_USE_NCS5
#include SMC_COMPONENT_CS5
// Setup SMC for NCS5
SMC_CS_SETUP(5)
#ifdef SMC_DBW_GLOBAL
#if (SMC_DBW_GLOBAL < SMC_DBW)
#undef SMC_DBW_GLOBAL
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#else
#if (SMC_DBW == 8)
#define SMC_DBW_GLOBAL 8
#elif (SMC_DBW == 16)
#define SMC_DBW_GLOBAL 16
#elif (SMC_DBW == 32)
#define SMC_DBW_GLOBAL 32
#else
#error error in SMC_DBW size
#endif
#endif
#ifdef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS_GLOBAL < SMC_8_BIT)
#undef SMC_8_BIT_CHIPS_GLOBAL
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#else
#if (SMC_8_BIT_CHIPS == TRUE)
#define SMC_8_BIT_CHIPS_GLOBAL TRUE
#elif (SMC_8_BIT_CHIPS == FALSE)
#define SMC_8_BIT_CHIPS_GLOBAL FALSE
#else
#error error in SMC_8_BIT_CHIPS size
#endif
#endif
#ifdef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE_GLOBAL < NWAIT_MODE)
#undef NWAIT_MODE_GLOBAL
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#else
#if (NWAIT_MODE == AVR32_SMC_EXNW_MODE_DISABLED)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_DISABLED
#elif (NWAIT_MODE == AVR32_SMC_EXNW_MODE_FROZEN)
#define NWAIT_MODE_GLOBAL AVR32_SMC_EXNW_MODE_FROZEN
#else
#error error in NWAIT_MODE size
#endif
#endif
#undef EXT_SM_SIZE
#undef SMC_DBW
#undef SMC_8_BIT_CHIPS
#undef NWE_SETUP
#undef NCS_WR_SETUP
#undef NRD_SETUP
#undef NCS_RD_SETUP
#undef NCS_WR_PULSE
#undef NWE_PULSE
#undef NCS_RD_PULSE
#undef NRD_PULSE
#undef NCS_WR_HOLD
#undef NWE_HOLD
#undef NWE_CYCLE
#undef NCS_RD_HOLD
#undef NRD_CYCLE
#undef TDF_CYCLES
#undef TDF_OPTIM
#undef PAGE_MODE
#undef PAGE_SIZE
#undef NCS_CONTROLLED_READ
#undef NCS_CONTROLLED_WRITE
#undef NWAIT_MODE
#endif
// Put the multiplexed MCU pins used for the SM under control of the SMC.
smc_enable_muxed_pins();
}
/*! \brief Puts the multiplexed MCU pins used for the SMC
*
*/
static void smc_enable_muxed_pins(void)
{
static const gpio_map_t SMC_EBI_GPIO_MAP =
{
// Enable data pins.
#ifdef EBI_DATA_0
{ATPASTE2(EBI_DATA_0,_PIN),ATPASTE2(EBI_DATA_0,_FUNCTION)},
#endif
#ifdef EBI_DATA_1
{ATPASTE2(EBI_DATA_1,_PIN),ATPASTE2(EBI_DATA_1,_FUNCTION)},
#endif
#ifdef EBI_DATA_2
{ATPASTE2(EBI_DATA_2,_PIN),ATPASTE2(EBI_DATA_2,_FUNCTION)},
#endif
#ifdef EBI_DATA_3
{ATPASTE2(EBI_DATA_3,_PIN),ATPASTE2(EBI_DATA_3,_FUNCTION)},
#endif
#ifdef EBI_DATA_4
{ATPASTE2(EBI_DATA_4,_PIN),ATPASTE2(EBI_DATA_4,_FUNCTION)},
#endif
#ifdef EBI_DATA_5
{ATPASTE2(EBI_DATA_5,_PIN),ATPASTE2(EBI_DATA_5,_FUNCTION)},
#endif
#ifdef EBI_DATA_6
{ATPASTE2(EBI_DATA_6,_PIN),ATPASTE2(EBI_DATA_6,_FUNCTION)},
#endif
#ifdef EBI_DATA_7
{ATPASTE2(EBI_DATA_7,_PIN),ATPASTE2(EBI_DATA_7,_FUNCTION)},
#endif
#ifdef EBI_DATA_8
{ATPASTE2(EBI_DATA_8,_PIN),ATPASTE2(EBI_DATA_8,_FUNCTION)},
#endif
#ifdef EBI_DATA_9
{ATPASTE2(EBI_DATA_9,_PIN),ATPASTE2(EBI_DATA_9,_FUNCTION)},
#endif
#ifdef EBI_DATA_10
{ATPASTE2(EBI_DATA_10,_PIN),ATPASTE2(EBI_DATA_10,_FUNCTION)},
#endif
#ifdef EBI_DATA_11
{ATPASTE2(EBI_DATA_11,_PIN),ATPASTE2(EBI_DATA_11,_FUNCTION)},
#endif
#ifdef EBI_DATA_12
{ATPASTE2(EBI_DATA_12,_PIN),ATPASTE2(EBI_DATA_12,_FUNCTION)},
#endif
#ifdef EBI_DATA_13
{ATPASTE2(EBI_DATA_13,_PIN),ATPASTE2(EBI_DATA_13,_FUNCTION)},
#endif
#ifdef EBI_DATA_14
{ATPASTE2(EBI_DATA_14,_PIN),ATPASTE2(EBI_DATA_14,_FUNCTION)},
#endif
#ifdef EBI_DATA_15
{ATPASTE2(EBI_DATA_15,_PIN),ATPASTE2(EBI_DATA_15,_FUNCTION)},
#endif
#ifdef EBI_DATA_16
{ATPASTE2(EBI_DATA_16,_PIN),ATPASTE2(EBI_DATA_16,_FUNCTION)},
#endif
#ifdef EBI_DATA_17
{ATPASTE2(EBI_DATA_17,_PIN),ATPASTE2(EBI_DATA_17,_FUNCTION)},
#endif
#ifdef EBI_DATA_18
{ATPASTE2(EBI_DATA_18,_PIN),ATPASTE2(EBI_DATA_18,_FUNCTION)},
#endif
#ifdef EBI_DATA_19
{ATPASTE2(EBI_DATA_19,_PIN),ATPASTE2(EBI_DATA_19,_FUNCTION)},
#endif
#ifdef EBI_DATA_20
{ATPASTE2(EBI_DATA_20,_PIN),ATPASTE2(EBI_DATA_20,_FUNCTION)},
#endif
#ifdef EBI_DATA_21
{ATPASTE2(EBI_DATA_21,_PIN),ATPASTE2(EBI_DATA_21,_FUNCTION)},
#endif
#ifdef EBI_DATA_22
{ATPASTE2(EBI_DATA_22,_PIN),ATPASTE2(EBI_DATA_22,_FUNCTION)},
#endif
#ifdef EBI_DATA_23
{ATPASTE2(EBI_DATA_23,_PIN),ATPASTE2(EBI_DATA_23,_FUNCTION)},
#endif
#ifdef EBI_DATA_24
{ATPASTE2(EBI_DATA_24,_PIN),ATPASTE2(EBI_DATA_24,_FUNCTION)},
#endif
#ifdef EBI_DATA_25
{ATPASTE2(EBI_DATA_25,_PIN),ATPASTE2(EBI_DATA_25,_FUNCTION)},
#endif
#ifdef EBI_DATA_26
{ATPASTE2(EBI_DATA_26,_PIN),ATPASTE2(EBI_DATA_26,_FUNCTION)},
#endif
#ifdef EBI_DATA_27
{ATPASTE2(EBI_DATA_27,_PIN),ATPASTE2(EBI_DATA_27,_FUNCTION)},
#endif
#ifdef EBI_DATA_28
{ATPASTE2(EBI_DATA_28,_PIN),ATPASTE2(EBI_DATA_28,_FUNCTION)},
#endif
#ifdef EBI_DATA_29
{ATPASTE2(EBI_DATA_29,_PIN),ATPASTE2(EBI_DATA_29,_FUNCTION)},
#endif
#ifdef EBI_DATA_30
{ATPASTE2(EBI_DATA_30,_PIN),ATPASTE2(EBI_DATA_30,_FUNCTION)},
#endif
#ifdef EBI_DATA_31
{ATPASTE2(EBI_DATA_31,_PIN),ATPASTE2(EBI_DATA_31,_FUNCTION)},
#endif
// Enable address pins.
#if SMC_DBW_GLOBAL <= 8
#ifdef EBI_ADDR_0
{ATPASTE2(EBI_ADDR_0,_PIN),ATPASTE2(EBI_ADDR_0,_FUNCTION)},
#endif
#endif
#if SMC_DBW_GLOBAL <= 16
#ifdef EBI_ADDR_1
{ATPASTE2(EBI_ADDR_1,_PIN),ATPASTE2(EBI_ADDR_1,_FUNCTION)},
#endif
#endif
#ifdef EBI_ADDR_2
{ATPASTE2(EBI_ADDR_2,_PIN),ATPASTE2(EBI_ADDR_2,_FUNCTION)},
#endif
#ifdef EBI_ADDR_3
{ATPASTE2(EBI_ADDR_3,_PIN),ATPASTE2(EBI_ADDR_3,_FUNCTION)},
#endif
#ifdef EBI_ADDR_4
{ATPASTE2(EBI_ADDR_4,_PIN),ATPASTE2(EBI_ADDR_4,_FUNCTION)},
#endif
#ifdef EBI_ADDR_5
{ATPASTE2(EBI_ADDR_5,_PIN),ATPASTE2(EBI_ADDR_5,_FUNCTION)},
#endif
#ifdef EBI_ADDR_6
{ATPASTE2(EBI_ADDR_6,_PIN),ATPASTE2(EBI_ADDR_6,_FUNCTION)},
#endif
#ifdef EBI_ADDR_7
{ATPASTE2(EBI_ADDR_7,_PIN),ATPASTE2(EBI_ADDR_7,_FUNCTION)},
#endif
#ifdef EBI_ADDR_8
{ATPASTE2(EBI_ADDR_8,_PIN),ATPASTE2(EBI_ADDR_8,_FUNCTION)},
#endif
#ifdef EBI_ADDR_9
{ATPASTE2(EBI_ADDR_9,_PIN),ATPASTE2(EBI_ADDR_9,_FUNCTION)},
#endif
#ifdef EBI_ADDR_10
{ATPASTE2(EBI_ADDR_10,_PIN),ATPASTE2(EBI_ADDR_10,_FUNCTION)},
#endif
#ifdef EBI_ADDR_11
{ATPASTE2(EBI_ADDR_11,_PIN),ATPASTE2(EBI_ADDR_11,_FUNCTION)},
#endif
#ifdef EBI_ADDR_12
{ATPASTE2(EBI_ADDR_12,_PIN),ATPASTE2(EBI_ADDR_12,_FUNCTION)},
#endif
#ifdef EBI_ADDR_13
{ATPASTE2(EBI_ADDR_13,_PIN),ATPASTE2(EBI_ADDR_13,_FUNCTION)},
#endif
#ifdef EBI_ADDR_14
{ATPASTE2(EBI_ADDR_14,_PIN),ATPASTE2(EBI_ADDR_14,_FUNCTION)},
#endif
#ifdef EBI_ADDR_15
{ATPASTE2(EBI_ADDR_15,_PIN),ATPASTE2(EBI_ADDR_15,_FUNCTION)},
#endif
#ifdef EBI_ADDR_16
{ATPASTE2(EBI_ADDR_16,_PIN),ATPASTE2(EBI_ADDR_16,_FUNCTION)},
#endif
#ifdef EBI_ADDR_17
{ATPASTE2(EBI_ADDR_17,_PIN),ATPASTE2(EBI_ADDR_17,_FUNCTION)},
#endif
#ifdef EBI_ADDR_18
{ATPASTE2(EBI_ADDR_18,_PIN),ATPASTE2(EBI_ADDR_18,_FUNCTION)},
#endif
#ifdef EBI_ADDR_19
{ATPASTE2(EBI_ADDR_19,_PIN),ATPASTE2(EBI_ADDR_19,_FUNCTION)},
#endif
#ifdef EBI_ADDR_20
{ATPASTE2(EBI_ADDR_20,_PIN),ATPASTE2(EBI_ADDR_20,_FUNCTION)},
#endif
#ifdef EBI_ADDR_21
{ATPASTE2(EBI_ADDR_21,_PIN),ATPASTE2(EBI_ADDR_21,_FUNCTION)},
#endif
#ifdef EBI_ADDR_22
{ATPASTE2(EBI_ADDR_22,_PIN),ATPASTE2(EBI_ADDR_22,_FUNCTION)},
#endif
#ifdef EBI_ADDR_23
{ATPASTE2(EBI_ADDR_23,_PIN),ATPASTE2(EBI_ADDR_23,_FUNCTION)},
#endif
#if SMC_DBW_GLOBAL <= 8
#undef SMC_8_BIT_CHIPS
#define SMC_8_BIT_CHIPS TRUE
#endif
// Enable data mask pins.
#if !SMC_8_BIT_CHIPS_GLOBAL
#ifdef EBI_ADDR_0
{ATPASTE2(EBI_ADDR_0,_PIN),ATPASTE2(EBI_ADDR_0,_FUNCTION)},
#endif
#endif
#ifdef EBI_NWE0
{ATPASTE2(EBI_NWE0,_PIN),ATPASTE2(EBI_NWE0,_FUNCTION)},
#endif
#if SMC_DBW_GLOBAL >= 16
#ifdef EBI_NWE1
{ATPASTE2(EBI_NWE1,_PIN),ATPASTE2(EBI_NWE1,_FUNCTION)},
#endif
#if SMC_DBW_GLOBAL >= 32
#ifdef EBI_ADDR_1
{ATPASTE2(EBI_ADDR_1,_PIN),ATPASTE2(EBI_ADDR_1,_FUNCTION)},
#endif
#ifdef EBI_NWE3
{ATPASTE2(EBI_NWE3,_PIN),ATPASTE2(EBI_NWE3,_FUNCTION)},
#endif
#endif
#endif
#ifdef EBI_NRD
{ATPASTE2(EBI_NRD,_PIN),ATPASTE2(EBI_NRD,_FUNCTION)},
#endif
// Enable control pins.
#if NWAIT_MODE_GLOBAL != AVR32_SMC_EXNW_MODE_DISABLED
#ifdef EBI_NWAIT
{ATPASTE2(EBI_NWAIT,_PIN),ATPASTE2(EBI_NWAIT,_FUNCTION)},
#endif
#endif
#ifdef SMC_USE_NCS0
#ifdef EBI_NCS_0
{ATPASTE2(EBI_NCS_0,_PIN),ATPASTE2(EBI_NCS_0,_FUNCTION)},
#endif
#endif
#ifdef SMC_USE_NCS1
#ifdef EBI_NCS_1
{ATPASTE2(EBI_NCS_1,_PIN),ATPASTE2(EBI_NCS_1,_FUNCTION)},
#endif
#endif
#ifdef SMC_USE_NCS2
#ifdef EBI_NCS_2
{ATPASTE2(EBI_NCS_2,_PIN),ATPASTE2(EBI_NCS_2,_FUNCTION)},
#endif
#endif
#ifdef SMC_USE_NCS3
#ifdef EBI_NCS_3
{ATPASTE2(EBI_NCS_3,_PIN),ATPASTE2(EBI_NCS_3,_FUNCTION)},
#endif
#endif
#ifdef SMC_USE_NCS4
#ifdef EBI_NCS_4
{ATPASTE2(EBI_NCS_4,_PIN),ATPASTE2(EBI_NCS_4,_FUNCTION)},
#endif
#endif
#ifdef SMC_USE_NCS5
#ifdef EBI_NCS_5
{ATPASTE2(EBI_NCS_5,_PIN),ATPASTE2(EBI_NCS_5,_FUNCTION)},
#endif
#endif
};
gpio_enable_module(SMC_EBI_GPIO_MAP, sizeof(SMC_EBI_GPIO_MAP) / sizeof(SMC_EBI_GPIO_MAP[0]));
}
unsigned char smc_get_cs_size(unsigned char cs)
{
return smc_tab_cs_size[cs];
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief SMC on EBI driver for AVR32 UC3.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a SMC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _SMC_H_
#define _SMC_H_
#include <avr32/io.h>
#include "compiler.h"
#include "conf_ebi.h"
/*! \brief Initializes the AVR32 SMC module and the connected SRAM(s).
* \param hsb_hz HSB frequency in Hz (the HSB frequency is applied to the SMC).
* \note Each access to the SMC address space validates the mode of the SMC
* and generates an operation corresponding to this mode.
*/
extern void smc_init(unsigned long hsb_hz);
/*! \brief Return the size of the peripheral connected .
* \param cs The chip select value
*/
extern unsigned char smc_get_cs_size(unsigned char cs);
#endif // _SMC_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief EIC driver for AVR32 UC3.
*
* AVR32 External Interrupt Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an EIC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include <avr32/io.h>
#include "compiler.h"
#include "preprocessor.h"
#include "eic.h"
void eic_init(volatile avr32_eic_t *eic, const eic_options_t *opt, unsigned int nb_lines)
{
int i;
for (i = 0; i < nb_lines; i++)
{
// Set up mode level
eic->mode = (opt[i].eic_mode == 1) ? (eic->mode | (1 << opt[i].eic_line)) : (eic->mode & ~(1 << opt[i].eic_line));
// Set up edge type
eic->edge = (opt[i].eic_edge == 1) ? (eic->edge | (1 << opt[i].eic_line)) : (eic->edge & ~(1 << opt[i].eic_line));
// Set up level
eic->level = (opt[i].eic_level == 1) ? (eic->level | (1 << opt[i].eic_line)) : (eic->level & ~(1 << opt[i].eic_line));
// Set up if filter is used
eic->filter = (opt[i].eic_filter == 1) ? (eic->filter | (1 << opt[i].eic_line)) : (eic->filter & ~(1 << opt[i].eic_line));
// Set up which mode is used : asynchronous mode/ synchronous mode
eic->async = (opt[i].eic_async == 1) ? (eic->async | (1 << opt[i].eic_line)) : (eic->async & ~(1 << opt[i].eic_line));
}
}
void eic_enable_lines(volatile avr32_eic_t *eic, unsigned int mask_lines)
{
eic->en = mask_lines;
}
void eic_enable_line(volatile avr32_eic_t *eic, unsigned int line_number)
{
// Enable line line_number
eic->en = 1 << line_number;
}
void eic_disable_lines(volatile avr32_eic_t *eic, unsigned int mask_lines)
{
eic->dis = mask_lines;
}
void eic_disable_line(volatile avr32_eic_t *eic, unsigned int line_number)
{
// Disable line line_number
eic->dis = 1 << line_number;
}
Bool eic_is_line_enabled(volatile avr32_eic_t *eic, unsigned int line_number)
{
return (eic->ctrl & (1 << line_number)) != 0;
}
void eic_enable_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines)
{
eic->ier = mask_lines;
}
void eic_enable_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number)
{
// Enable line line_number
eic->ier = 1 << line_number;
}
void eic_disable_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
eic->idr = mask_lines;
eic->imr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void eic_disable_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
// Disable line line_number
if (global_interrupt_enabled) Disable_global_interrupt();
eic->idr = 1 << line_number;
eic->imr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
Bool eic_is_interrupt_line_enabled(volatile avr32_eic_t *eic, unsigned int line_number)
{
return (eic->imr & (1 << line_number)) != 0;
}
void eic_clear_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
eic->icr = mask_lines;
eic->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void eic_clear_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
// Clear line line_number
if (global_interrupt_enabled) Disable_global_interrupt();
eic->icr = 1 << line_number;
eic->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
Bool eic_is_interrupt_line_pending(volatile avr32_eic_t *eic, unsigned int line_number)
{
return (eic->isr & (1 << line_number)) != 0;
}
#if !defined(AVR32_EIC_301_H_INCLUDED)
void eic_enable_interrupt_scan(volatile avr32_eic_t *eic,unsigned int presc)
{
// Enable SCAN function with PRESC value
eic->scan |= (presc << AVR32_EIC_SCAN_PRESC_OFFSET) | (1 << AVR32_EIC_SCAN_EN_OFFSET);
}
void eic_disable_interrupt_scan(volatile avr32_eic_t *eic)
{
// Disable SCAN function
eic->scan = 0 << AVR32_EIC_SCAN_EN_OFFSET;
}
unsigned long eic_get_interrupt_pad_scan(volatile avr32_eic_t *eic)
{
// Return pad number that causes interrupt
return(eic->scan>>AVR32_EIC_SCAN_PIN_OFFSET);
}
#endif

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief EIC driver for AVR32 UC3.
*
* AVR32 External Interrupt Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an EIC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _EIC_H_
#define _EIC_H_
#include "compiler.h"
/*! \name External Interrupt lines
*/
//! @{
#if (UC3A || UC3B)
#define EXT_INT0 AVR32_EIC_INT0 //!< Line 0
#define EXT_INT1 AVR32_EIC_INT1 //!< Line 1
#define EXT_INT2 AVR32_EIC_INT2 //!< Line 2
#define EXT_INT3 AVR32_EIC_INT3 //!< Line 3
#define EXT_INT4 AVR32_EIC_INT4 //!< Line 4
#define EXT_INT5 AVR32_EIC_INT5 //!< Line 5
#define EXT_INT6 AVR32_EIC_INT6 //!< Line 6
#define EXT_INT7 AVR32_EIC_INT7 //!< Line 7
#define EXT_NMI AVR32_EIC_NMI //!< Line 8
#else
#define EXT_INT0 AVR32_EIC_INT1 //!< Line 0
#define EXT_INT1 AVR32_EIC_INT2 //!< Line 1
#define EXT_INT2 AVR32_EIC_INT3 //!< Line 2
#define EXT_INT3 AVR32_EIC_INT4 //!< Line 3
#define EXT_INT4 AVR32_EIC_INT5 //!< Line 4
#define EXT_INT5 AVR32_EIC_INT6 //!< Line 5
#define EXT_INT6 AVR32_EIC_INT7 //!< Line 6
#define EXT_INT7 AVR32_EIC_INT8 //!< Line 7
#define EXT_NMI AVR32_EIC_NMI //!< Line 8
#endif
//! @}
/*! \name Mode Trigger Options
*/
//! @{
#define EIC_MODE_EDGE_TRIGGERED AVR32_EIC_EDGE_IRQ //!<
#define EIC_MODE_LEVEL_TRIGGERED AVR32_EIC_LEVEL_IRQ //!<
//! @}
/*! \name Edge level Options
*/
//! @{
#define EIC_EDGE_FALLING_EDGE AVR32_EIC_FALLING_EDGE //!<
#define EIC_EDGE_RISING_EDGE AVR32_EIC_RISING_EDGE //!<
//! @}
/*! \name Level Options
*/
//! @{
#define EIC_LEVEL_LOW_LEVEL AVR32_EIC_LOW_LEVEL //!<
#define EIC_LEVEL_HIGH_LEVEL AVR32_EIC_HIGH_LEVEL //!<
//! @}
/*! \name Filter Options
*/
//! @{
#define EIC_FILTER_ENABLED AVR32_EIC_FILTER_ON //!<
#define EIC_FILTER_DISABLED AVR32_EIC_FILTER_OFF //!<
//! @}
/*! \name Synch Mode Options
*/
//! @{
#define EIC_SYNCH_MODE AVR32_EIC_SYNC //!<
#define EIC_ASYNCH_MODE AVR32_EIC_USE_ASYNC //!<
//! @}
//! Configuration parameters of the EIC module.
typedef struct
{
//!Line
unsigned char eic_line;
//! Mode : EDGE_LEVEL or TRIGGER_LEVEL
unsigned char eic_mode;
//! Edge : FALLING_EDGE or RISING_EDGE
unsigned char eic_edge;
//! Level : LOW_LEVEL or HIGH_LEVEL
unsigned char eic_level;
//! Filter: NOT_FILTERED or FILTERED
unsigned char eic_filter;
//! Async: SYNC mode or ASYNC
unsigned char eic_async;
} eic_options_t;
/*! \brief Init the EIC driver.
*
* \param eic Base address of the EIC module
* \param opt Configuration parameters of the EIC module (see \ref eic_options_t)
* \param nb_lines Number of lines to consider, equal to size of opt buffer
*/
extern void eic_init(volatile avr32_eic_t *eic, const eic_options_t *opt, unsigned int nb_lines);
/*! \brief Enable the EIC driver.
*
* \param eic Base address of the EIC module
* \param mask_lines Mask for current selected lines
*/
extern void eic_enable_lines(volatile avr32_eic_t *eic, unsigned int mask_lines);
/*! \brief Enable the EIC driver.
*
* \param eic Base address of the EIC module
* \param line_number Line number to enable
*/
extern void eic_enable_line(volatile avr32_eic_t *eic, unsigned int line_number);
/*! \brief Disable the EIC driver.
*
* \param eic Base address of the EIC module
* \param mask_lines Mask for current selected lines
*/
extern void eic_disable_lines(volatile avr32_eic_t *eic, unsigned int mask_lines);
/*! \brief Disable the EIC driver.
*
* \param eic Base address of the EIC module
* \param line_number Line number to disable
*/
extern void eic_disable_line(volatile avr32_eic_t *eic, unsigned int line_number);
/*! \brief Tells whether an EIC line is enabled.
*
* \param eic Base address of the EIC module
* \param line_number Line number to test
*
* \return Whether an EIC line is enabled.
*/
extern Bool eic_is_line_enabled(volatile avr32_eic_t *eic, unsigned int line_number);
/*! \name Interrupt Control Functions
*/
//! @{
/*! \brief Enable the interrupt feature of the EIC.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
* \param mask_lines Mask for current selected lines
*/
extern void eic_enable_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines);
/*! \brief Enable the interrupt feature of the EIC.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
* \param line_number Line number to enable
*/
extern void eic_enable_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number);
/*! \brief Disable the interrupt feature of the EIC.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
* \param mask_lines Mask for current selected lines
*/
extern void eic_disable_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines);
/*! \brief Disable the interrupt feature of the EIC.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
* \param line_number Line number to disable
*/
extern void eic_disable_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number);
/*! \brief Tells whether an EIC interrupt line is enabled.
*
* \param eic Base address of the EIC module
* \param line_number Line number to test
*
* \return Whether an EIC interrupt line is enabled.
*/
extern Bool eic_is_interrupt_line_enabled(volatile avr32_eic_t *eic, unsigned int line_number);
/*! \brief Clear the interrupt flag.
* Call this function once you've handled the interrupt.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
* \param mask_lines Mask for current selected lines
*/
extern void eic_clear_interrupt_lines(volatile avr32_eic_t *eic, unsigned int mask_lines);
/*! \brief Clear the interrupt flag.
* Call this function once you've handled the interrupt.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
* \param line_number Line number to clear
*/
extern void eic_clear_interrupt_line(volatile avr32_eic_t *eic, unsigned int line_number);
/*! \brief Tells whether an EIC interrupt line is pending.
*
* \param eic Base address of the EIC module
* \param line_number Line number to test
*
* \return Whether an EIC interrupt line is pending.
*/
extern Bool eic_is_interrupt_line_pending(volatile avr32_eic_t *eic, unsigned int line_number);
/*! \brief Enable the interrupt scan feature of the EIC.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
* \param presc Prescale select for the keypad scan rate in the range [0,31].
*/
extern void eic_enable_interrupt_scan(volatile avr32_eic_t *eic, unsigned int presc);
/*! \brief Disable the interrupt scan feature of the EIC.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
*/
extern void eic_disable_interrupt_scan(volatile avr32_eic_t *eic);
/*! \brief Return scan pad number that causes interrupt.
*
* \param eic Base address of the EIC (i.e. &AVR32_EIC).
*/
extern unsigned long eic_get_interrupt_pad_scan(volatile avr32_eic_t *eic);
//! @}
#endif // _EIC_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief GPIO driver for AVR32 UC3.
*
* This file defines a useful set of functions for the GPIO.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a GPIO module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include "gpio.h"
//! GPIO module instance.
#define GPIO AVR32_GPIO
/*! \name Peripheral Bus Interface
*/
//! @{
int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size)
{
int status = GPIO_SUCCESS;
unsigned int i;
for (i = 0; i < size; i++)
{
status |= gpio_enable_module_pin(gpiomap->pin, gpiomap->function);
gpiomap++;
}
return status;
}
int gpio_enable_module_pin(unsigned int pin, unsigned int function)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
// Enable the correct function.
switch (function)
{
case 0: // A function.
gpio_port->pmr0c = 1 << (pin & 0x1F);
gpio_port->pmr1c = 1 << (pin & 0x1F);
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
gpio_port->pmr2c = 1 << (pin & 0x1F);
#endif
break;
case 1: // B function.
gpio_port->pmr0s = 1 << (pin & 0x1F);
gpio_port->pmr1c = 1 << (pin & 0x1F);
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
gpio_port->pmr2c = 1 << (pin & 0x1F);
#endif
break;
case 2: // C function.
gpio_port->pmr0c = 1 << (pin & 0x1F);
gpio_port->pmr1s = 1 << (pin & 0x1F);
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
gpio_port->pmr2c = 1 << (pin & 0x1F);
#endif
break;
case 3: // D function.
gpio_port->pmr0s = 1 << (pin & 0x1F);
gpio_port->pmr1s = 1 << (pin & 0x1F);
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
gpio_port->pmr2c = 1 << (pin & 0x1F);
#endif
break;
#if defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
case 4: // E function.
gpio_port->pmr0c = 1 << (pin & 0x1F);
gpio_port->pmr1c = 1 << (pin & 0x1F);
gpio_port->pmr2s = 1 << (pin & 0x1F);
break;
case 5: // F function.
gpio_port->pmr0s = 1 << (pin & 0x1F);
gpio_port->pmr1c = 1 << (pin & 0x1F);
gpio_port->pmr2s = 1 << (pin & 0x1F);
break;
case 6: // G function.
gpio_port->pmr0c = 1 << (pin & 0x1F);
gpio_port->pmr1s = 1 << (pin & 0x1F);
gpio_port->pmr2s = 1 << (pin & 0x1F);
break;
case 7: // H function.
gpio_port->pmr0s = 1 << (pin & 0x1F);
gpio_port->pmr1s = 1 << (pin & 0x1F);
gpio_port->pmr2s = 1 << (pin & 0x1F);
break;
#endif
default:
return GPIO_INVALID_ARGUMENT;
}
// Disable GPIO control.
gpio_port->gperc = 1 << (pin & 0x1F);
return GPIO_SUCCESS;
}
void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size)
{
unsigned int i;
for (i = 0; i < size; i++)
{
gpio_enable_gpio_pin(gpiomap->pin);
gpiomap++;
}
}
void gpio_enable_gpio_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->oderc = 1 << (pin & 0x1F);
gpio_port->gpers = 1 << (pin & 0x1F);
}
// The open-drain mode is not synthesized on the current AVR32 products.
// If one day some AVR32 products have this feature, the corresponding part
// numbers should be listed in the #if below.
// Note that other functions are available in this driver to use pins with open
// drain in GPIO mode. The advantage of the open-drain mode functions over these
// other functions is that they can be used not only in GPIO mode but also in
// module mode.
#if 0
void gpio_enable_pin_open_drain(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->odmers = 1 << (pin & 0x1F);
}
void gpio_disable_pin_open_drain(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->odmerc = 1 << (pin & 0x1F);
}
#endif
void gpio_enable_pin_pull_up(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->puers = 1 << (pin & 0x1F);
#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
gpio_port->pderc = 1 << (pin & 0x1F);
#endif
}
void gpio_disable_pin_pull_up(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->puerc = 1 << (pin & 0x1F);
}
#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
/*! \brief Enables the pull-down resistor of a pin.
*
* \param pin The pin number.
*/
void gpio_enable_pin_pull_down(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->puerc = 1 << (pin & 0x1F);
gpio_port->pders = 1 << (pin & 0x1F);
}
/*! \brief Disables the pull-down resistor of a pin.
*
* \param pin The pin number.
*/
void gpio_disable_pin_pull_down(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->pderc = 1 << (pin & 0x1F);
}
/*! \brief Enables the buskeeper functionality on a pin.
*
* \param pin The pin number.
*/
void gpio_enable_pin_buskeeper(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->puers = 1 << (pin & 0x1F);
gpio_port->pders = 1 << (pin & 0x1F);
}
/*! \brief Disables the buskeeper functionality on a pin.
*
* \param pin The pin number.
*/
void gpio_disable_pin_buskeeper(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->puerc = 1 << (pin & 0x1F);
gpio_port->pderc = 1 << (pin & 0x1F);
}
#endif
int gpio_get_pin_value(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
return (gpio_port->pvr >> (pin & 0x1F)) & 1;
}
int gpio_get_gpio_pin_output_value(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
return (gpio_port->ovr >> (pin & 0x1F)) & 1;
}
int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
return ((gpio_port->oder >> (pin & 0x1F)) & 1) ^ 1;
}
void gpio_set_gpio_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ovrs = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 1.
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_clr_gpio_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_tgl_gpio_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ovrt = 1 << (pin & 0x1F); // Toggle the I/O line.
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_set_gpio_open_drain_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_clr_gpio_open_drain_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line: 0.
gpio_port->oders = 1 << (pin & 0x1F); // The GPIO output driver is enabled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_tgl_gpio_open_drain_pin(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ovrc = 1 << (pin & 0x1F); // Value to be driven on the I/O line if the GPIO output driver is enabled: 0.
gpio_port->odert = 1 << (pin & 0x1F); // The GPIO output driver is toggled for that pin.
gpio_port->gpers = 1 << (pin & 0x1F); // The GPIO module controls that pin.
}
void gpio_enable_pin_glitch_filter(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->gfers = 1 << (pin & 0x1F);
}
void gpio_disable_pin_glitch_filter(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->gferc = 1 << (pin & 0x1F);
}
/*! \brief Configure the edge detector of an input pin
*
* \param pin The pin number.
* \param mode The edge detection mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE
* or \ref GPIO_FALLING_EDGE).
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
static int gpio_configure_edge_detector(unsigned int pin, unsigned int mode)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
// Configure the edge detector.
switch (mode)
{
case GPIO_PIN_CHANGE:
gpio_port->imr0c = 1 << (pin & 0x1F);
gpio_port->imr1c = 1 << (pin & 0x1F);
break;
case GPIO_RISING_EDGE:
gpio_port->imr0s = 1 << (pin & 0x1F);
gpio_port->imr1c = 1 << (pin & 0x1F);
break;
case GPIO_FALLING_EDGE:
gpio_port->imr0c = 1 << (pin & 0x1F);
gpio_port->imr1s = 1 << (pin & 0x1F);
break;
default:
return GPIO_INVALID_ARGUMENT;
}
return GPIO_SUCCESS;
}
int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
// Enable the glitch filter.
gpio_port->gfers = 1 << (pin & 0x1F);
// Configure the edge detector.
if(GPIO_INVALID_ARGUMENT == gpio_configure_edge_detector(pin, mode))
return(GPIO_INVALID_ARGUMENT);
// Enable interrupt.
gpio_port->iers = 1 << (pin & 0x1F);
return GPIO_SUCCESS;
}
void gpio_disable_pin_interrupt(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ierc = 1 << (pin & 0x1F);
}
int gpio_get_pin_interrupt_flag(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
return (gpio_port->ifr >> (pin & 0x1F)) & 1;
}
void gpio_clear_pin_interrupt_flag(unsigned int pin)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
gpio_port->ifrc = 1 << (pin & 0x1F);
}
//#
//# Peripheral Event System Support.
//#
#if UC3L
int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf)
{
volatile avr32_gpio_port_t *gpio_port = &GPIO.port[pin >> 5];
if(TRUE == use_igf)
{
// Enable the glitch filter.
gpio_port->gfers = 1 << (pin & 0x1F);
}
else
{
// Disable the glitch filter.
gpio_port->gferc = 1 << (pin & 0x1F);
}
// Configure the edge detector.
return(gpio_configure_edge_detector(pin, mode));
}
#endif
//! @}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief GPIO header for AVR32 UC3.
*
* This file contains basic GPIO driver functions.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a GPIO module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _GPIO_H_
#define _GPIO_H_
#include <avr32/io.h>
#include "compiler.h"
/*! \name Return Values of the GPIO API
*/
//! @{
#define GPIO_SUCCESS 0 //!< Function successfully completed.
#define GPIO_INVALID_ARGUMENT 1 //!< Input parameters are out of range.
//! @}
/*! \name Interrupt Trigger Modes
*/
//! @{
#define GPIO_PIN_CHANGE 0 //!< Interrupt triggered upon pin change.
#define GPIO_RISING_EDGE 1 //!< Interrupt triggered upon rising edge.
#define GPIO_FALLING_EDGE 2 //!< Interrupt triggered upon falling edge.
//! @}
//! A type definition of pins and modules connectivity.
typedef struct
{
unsigned char pin; //!< Module pin.
unsigned char function; //!< Module function.
} gpio_map_t[];
/*! \name Peripheral Bus Interface
*
* Low-speed interface with a non-deterministic number of clock cycles per
* access.
*
* This interface operates with lower clock frequencies (fPB <= fCPU), and its
* timing is not deterministic since it needs to access a shared bus which may
* be heavily loaded.
*
* \note This interface is immediately available without initialization.
*/
//! @{
/*! \brief Enables specific module modes for a set of pins.
*
* \param gpiomap The pin map.
* \param size The number of pins in \a gpiomap.
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
extern int gpio_enable_module(const gpio_map_t gpiomap, unsigned int size);
/*! \brief Enables a specific module mode for a pin.
*
* \param pin The pin number.\n
* Refer to the product header file `uc3x.h' (where x is the part
* number; e.g. x = a0512) for module pins. E.g., to enable a PWM
* channel output, the pin number can be AVR32_PWM_3_PIN for PWM
* channel 3.
* \param function The pin function.\n
* Refer to the product header file `uc3x.h' (where x is the
* part number; e.g. x = a0512) for module pin functions. E.g.,
* to enable a PWM channel output, the pin function can be
* AVR32_PWM_3_FUNCTION for PWM channel 3.
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
extern int gpio_enable_module_pin(unsigned int pin, unsigned int function);
/*! \brief Enables the GPIO mode of a set of pins.
*
* \param gpiomap The pin map.
* \param size The number of pins in \a gpiomap.
*/
extern void gpio_enable_gpio(const gpio_map_t gpiomap, unsigned int size);
/*! \brief Enables the GPIO mode of a pin.
*
* \param pin The pin number.\n
* Refer to the product header file `uc3x.h' (where x is the part
* number; e.g. x = a0512) for pin definitions. E.g., to enable the
* GPIO mode of PX21, AVR32_PIN_PX21 can be used. Module pins such as
* AVR32_PWM_3_PIN for PWM channel 3 can also be used to release
* module pins for GPIO.
*/
extern void gpio_enable_gpio_pin(unsigned int pin);
// The open-drain mode is not synthesized on the current AVR32 products.
// If one day some AVR32 products have this feature, the corresponding part
// numbers should be listed in the #if below.
// Note that other functions are available in this driver to use pins with open
// drain in GPIO mode. The advantage of the open-drain mode functions over these
// other functions is that they can be used not only in GPIO mode but also in
// module mode.
#if 0
/*! \brief Enables the open-drain mode of a pin.
*
* \param pin The pin number.
*/
extern void gpio_enable_pin_open_drain(unsigned int pin);
/*! \brief Disables the open-drain mode of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_open_drain(unsigned int pin);
#endif
/*! \brief Enables the pull-up resistor of a pin.
*
* \param pin The pin number.
*/
extern void gpio_enable_pin_pull_up(unsigned int pin);
/*! \brief Disables the pull-up resistor of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_pull_up(unsigned int pin);
#if defined(AVR32_GPIO_200_H_INCLUDED) || defined(AVR32_GPIO_210_H_INCLUDED) || defined(AVR32_GPIO_211_H_INCLUDED)
// Added support of Pull-up Resistor, Pull-down Resistor and Buskeeper Control.
/*! \brief Enables the pull-down resistor of a pin.
*
* \param pin The pin number.
*/
extern void gpio_enable_pin_pull_down(unsigned int pin);
/*! \brief Disables the pull-down resistor of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_pull_down(unsigned int pin);
/*! \brief Enables the buskeeper functionality on a pin.
*
* \param pin The pin number.
*/
extern void gpio_enable_pin_buskeeper(unsigned int pin);
/*! \brief Disables the buskeeper functionality on a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_buskeeper(unsigned int pin);
#endif
/*! \brief Returns the value of a pin.
*
* \param pin The pin number.
*
* \return The pin value.
*/
extern int gpio_get_pin_value(unsigned int pin);
/*! \brief Returns the output value set for a GPIO pin.
*
* \param pin The pin number.
*
* \return The pin output value.
*
* \note This function must be used in conjunction with \ref gpio_set_gpio_pin,
* \ref gpio_clr_gpio_pin and \ref gpio_tgl_gpio_pin.
*/
extern int gpio_get_gpio_pin_output_value(unsigned int pin);
/*! \brief Returns the output value set for a GPIO pin using open drain.
*
* \param pin The pin number.
*
* \return The pin output value.
*
* \note This function must be used in conjunction with
* \ref gpio_set_gpio_open_drain_pin, \ref gpio_clr_gpio_open_drain_pin
* and \ref gpio_tgl_gpio_open_drain_pin.
*/
extern int gpio_get_gpio_open_drain_pin_output_value(unsigned int pin);
/*! \brief Drives a GPIO pin to 1.
*
* \param pin The pin number.
*/
extern void gpio_set_gpio_pin(unsigned int pin);
/*! \brief Drives a GPIO pin to 0.
*
* \param pin The pin number.
*/
extern void gpio_clr_gpio_pin(unsigned int pin);
/*! \brief Toggles a GPIO pin.
*
* \param pin The pin number.
*/
extern void gpio_tgl_gpio_pin(unsigned int pin);
/*! \brief Drives a GPIO pin to 1 using open drain.
*
* \param pin The pin number.
*/
extern void gpio_set_gpio_open_drain_pin(unsigned int pin);
/*! \brief Drives a GPIO pin to 0 using open drain.
*
* \param pin The pin number.
*/
extern void gpio_clr_gpio_open_drain_pin(unsigned int pin);
/*! \brief Toggles a GPIO pin using open drain.
*
* \param pin The pin number.
*/
extern void gpio_tgl_gpio_open_drain_pin(unsigned int pin);
/*! \brief Enables the glitch filter of a pin.
*
* When the glitch filter is enabled, a glitch with duration of less than 1
* clock cycle is automatically rejected, while a pulse with duration of 2 clock
* cycles or more is accepted. For pulse durations between 1 clock cycle and 2
* clock cycles, the pulse may or may not be taken into account, depending on
* the precise timing of its occurrence. Thus for a pulse to be guaranteed
* visible it must exceed 2 clock cycles, whereas for a glitch to be reliably
* filtered out, its duration must not exceed 1 clock cycle. The filter
* introduces 2 clock cycles latency.
*
* \param pin The pin number.
*/
extern void gpio_enable_pin_glitch_filter(unsigned int pin);
/*! \brief Disables the glitch filter of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_glitch_filter(unsigned int pin);
/*! \brief Enables the interrupt of a pin with the specified settings.
*
* \param pin The pin number.
* \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
* \ref GPIO_FALLING_EDGE).
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
extern int gpio_enable_pin_interrupt(unsigned int pin, unsigned int mode);
/*! \brief Disables the interrupt of a pin.
*
* \param pin The pin number.
*/
extern void gpio_disable_pin_interrupt(unsigned int pin);
/*! \brief Gets the interrupt flag of a pin.
*
* \param pin The pin number.
*
* \return The pin interrupt flag.
*/
extern int gpio_get_pin_interrupt_flag(unsigned int pin);
/*! \brief Clears the interrupt flag of a pin.
*
* \param pin The pin number.
*/
extern void gpio_clear_pin_interrupt_flag(unsigned int pin);
//! @}
#if (defined AVR32_GPIO_LOCAL_ADDRESS)
/*! \name Local Bus Interface
*
* High-speed interface with only one clock cycle per access.
*
* This interface operates with high clock frequency (fCPU), and its timing is
* deterministic since it does not need to access a shared bus which may be
* heavily loaded.
*
* \warning To use this interface, the clock frequency of the peripheral bus on
* which the GPIO peripheral is connected must be set to the CPU clock
* frequency (fPB = fCPU).
*
* \note This interface has to be initialized in order to be available.
*/
//! @{
/*! \brief Enables the local bus interface for GPIO.
*
* \note This function must have been called at least once before using other
* functions in this interface.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_init(void)
{
Set_system_register(AVR32_CPUCR,
Get_system_register(AVR32_CPUCR) | AVR32_CPUCR_LOCEN_MASK);
}
/*! \brief Enables the output driver of a pin.
*
* \param pin The pin number.
*
* \note \ref gpio_local_init must have been called beforehand.
*
* \note This function does not enable the GPIO mode of the pin.
* \ref gpio_enable_gpio_pin can be called for this purpose.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_enable_pin_output_driver(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
}
/*! \brief Disables the output driver of a pin.
*
* \param pin The pin number.
*
* \note \ref gpio_local_init must have been called beforehand.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_disable_pin_output_driver(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
}
/*! \brief Returns the value of a pin.
*
* \param pin The pin number.
*
* \return The pin value.
*
* \note \ref gpio_local_init must have been called beforehand.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int gpio_local_get_pin_value(unsigned int pin)
{
return (AVR32_GPIO_LOCAL.port[pin >> 5].pvr >> (pin & 0x1F)) & 1;
}
/*! \brief Drives a GPIO pin to 1.
*
* \param pin The pin number.
*
* \note \ref gpio_local_init must have been called beforehand.
*
* \note This function does not enable the GPIO mode of the pin nor its output
* driver. \ref gpio_enable_gpio_pin and
* \ref gpio_local_enable_pin_output_driver can be called for this
* purpose.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_set_gpio_pin(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].ovrs = 1 << (pin & 0x1F);
}
/*! \brief Drives a GPIO pin to 0.
*
* \param pin The pin number.
*
* \note \ref gpio_local_init must have been called beforehand.
*
* \note This function does not enable the GPIO mode of the pin nor its output
* driver. \ref gpio_enable_gpio_pin and
* \ref gpio_local_enable_pin_output_driver can be called for this
* purpose.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_clr_gpio_pin(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
}
/*! \brief Toggles a GPIO pin.
*
* \param pin The pin number.
*
* \note \ref gpio_local_init must have been called beforehand.
*
* \note This function does not enable the GPIO mode of the pin nor its output
* driver. \ref gpio_enable_gpio_pin and
* \ref gpio_local_enable_pin_output_driver can be called for this
* purpose.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_tgl_gpio_pin(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].ovrt = 1 << (pin & 0x1F);
}
/*! \brief Initializes the configuration of a GPIO pin so that it can be used
* with GPIO open-drain functions.
*
* \note This function must have been called at least once before using
* \ref gpio_local_set_gpio_open_drain_pin,
* \ref gpio_local_clr_gpio_open_drain_pin or
* \ref gpio_local_tgl_gpio_open_drain_pin.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_init_gpio_open_drain_pin(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].ovrc = 1 << (pin & 0x1F);
}
/*! \brief Drives a GPIO pin to 1 using open drain.
*
* \param pin The pin number.
*
* \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
* have been called beforehand.
*
* \note This function does not enable the GPIO mode of the pin.
* \ref gpio_enable_gpio_pin can be called for this purpose.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_set_gpio_open_drain_pin(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].oderc = 1 << (pin & 0x1F);
}
/*! \brief Drives a GPIO pin to 0 using open drain.
*
* \param pin The pin number.
*
* \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
* have been called beforehand.
*
* \note This function does not enable the GPIO mode of the pin.
* \ref gpio_enable_gpio_pin can be called for this purpose.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_clr_gpio_open_drain_pin(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].oders = 1 << (pin & 0x1F);
}
/*! \brief Toggles a GPIO pin using open drain.
*
* \param pin The pin number.
*
* \note \ref gpio_local_init and \ref gpio_local_init_gpio_open_drain_pin must
* have been called beforehand.
*
* \note This function does not enable the GPIO mode of the pin.
* \ref gpio_enable_gpio_pin can be called for this purpose.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_local_tgl_gpio_open_drain_pin(unsigned int pin)
{
AVR32_GPIO_LOCAL.port[pin >> 5].odert = 1 << (pin & 0x1F);
}
//! @}
#endif // AVR32_GPIO_LOCAL_ADDRESS
#if UC3L
//! @{
/*! \name Peripheral Event System support
*
* The GPIO can be programmed to output peripheral events whenever an interrupt
* condition is detected, such as pin value change, or only when a rising or
* falling edge is detected.
*
*/
/*! \brief Enables the peripheral event generation of a pin.
*
* \param pin The pin number.
*
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_enable_pin_periph_event(unsigned int pin)
{
AVR32_GPIO.port[pin >> 5].oderc = 1 << (pin & 0x1F); // The GPIO output driver is disabled for that pin.
AVR32_GPIO.port[pin >> 5].evers = 1 << (pin & 0x1F);
}
/*! \brief Disables the peripheral event generation of a pin.
*
* \param pin The pin number.
*
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void gpio_disable_pin_periph_event(unsigned int pin)
{
AVR32_GPIO.port[pin >> 5].everc = 1 << (pin & 0x1F);
}
/*! \brief Configure the peripheral event trigger mode of a pin
*
* \param pin The pin number.
* \param mode The trigger mode (\ref GPIO_PIN_CHANGE, \ref GPIO_RISING_EDGE or
* \ref GPIO_FALLING_EDGE).
* \param use_igf use the Input Glitch Filter (TRUE) or not (FALSE).
*
* \return \ref GPIO_SUCCESS or \ref GPIO_INVALID_ARGUMENT.
*/
extern int gpio_configure_pin_periph_event_mode(unsigned int pin, unsigned int mode, unsigned int use_igf);
//! @}
#endif
#endif // _GPIO_H_

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/* This file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Exception and interrupt vectors.
*
* This file maps all events supported by an AVR32.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an INTC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#if !__AVR32_UC__ && !__AVR32_AP__
#error Implementation of the AVR32 architecture not supported by the INTC driver.
#endif
#include <avr32/io.h>
//! @{
//! \verbatim
.section .exception, "ax", @progbits
// Start of Exception Vector Table.
// EVBA must be aligned with a power of two strictly greater than the EVBA-
// relative offset of the last vector.
.balign 0x200
// Export symbol.
.global _evba
.type _evba, @function
_evba:
.org 0x000
// Unrecoverable Exception.
_handle_Unrecoverable_Exception:
rjmp $
.org 0x004
// TLB Multiple Hit.
_handle_TLB_Multiple_Hit:
rjmp $
.org 0x008
// Bus Error Data Fetch.
_handle_Bus_Error_Data_Fetch:
rjmp $
.org 0x00C
// Bus Error Instruction Fetch.
_handle_Bus_Error_Instruction_Fetch:
rjmp $
.org 0x010
// NMI.
_handle_NMI:
rjmp $
.org 0x014
// Instruction Address.
_handle_Instruction_Address:
rjmp $
.org 0x018
// ITLB Protection.
_handle_ITLB_Protection:
rjmp $
.org 0x01C
// Breakpoint.
_handle_Breakpoint:
rjmp $
.org 0x020
// Illegal Opcode.
_handle_Illegal_Opcode:
rjmp $
.org 0x024
// Unimplemented Instruction.
_handle_Unimplemented_Instruction:
rjmp $
.org 0x028
// Privilege Violation.
_handle_Privilege_Violation:
rjmp $
.org 0x02C
// Floating-Point: UNUSED IN AVR32UC and AVR32AP.
_handle_Floating_Point:
rjmp $
.org 0x030
// Coprocessor Absent: UNUSED IN AVR32UC.
_handle_Coprocessor_Absent:
rjmp $
.org 0x034
// Data Address (Read).
_handle_Data_Address_Read:
rjmp $
.org 0x038
// Data Address (Write).
_handle_Data_Address_Write:
rjmp $
.org 0x03C
// DTLB Protection (Read).
_handle_DTLB_Protection_Read:
rjmp $
.org 0x040
// DTLB Protection (Write).
_handle_DTLB_Protection_Write:
rjmp $
.org 0x044
// DTLB Modified: UNUSED IN AVR32UC.
_handle_DTLB_Modified:
rjmp $
.org 0x050
// ITLB Miss.
_handle_ITLB_Miss:
rjmp $
.org 0x060
// DTLB Miss (Read).
_handle_DTLB_Miss_Read:
rjmp $
.org 0x070
// DTLB Miss (Write).
_handle_DTLB_Miss_Write:
rjmp $
.org 0x100
// Supervisor Call.
_handle_Supervisor_Call:
rjmp $
// Interrupt support.
// The interrupt controller must provide the offset address relative to EVBA.
// Important note:
// All interrupts call a C function named _get_interrupt_handler.
// This function will read group and interrupt line number to then return in
// R12 a pointer to a user-provided interrupt handler.
.balign 4
.irp priority, 0, 1, 2, 3
_int\priority:
#if __AVR32_UC__
// R8-R12, LR, PC and SR are automatically pushed onto the system stack by the
// CPU upon interrupt entry. No other register is saved by hardware.
#elif __AVR32_AP__
// PC and SR are automatically saved in respectively RAR_INTx and RSR_INTx by
// the CPU upon interrupt entry. No other register is saved by hardware.
pushm r8-r12, lr
#endif
mov r12, \priority // Pass the int_level parameter to the _get_interrupt_handler function.
call _get_interrupt_handler
cp.w r12, 0 // Get the pointer to the interrupt handler returned by the function.
#if __AVR32_UC__
movne pc, r12 // If this was not a spurious interrupt (R12 != NULL), jump to the handler.
#elif __AVR32_AP__
breq spint\priority // If this was a spurious interrupt (R12 == NULL), branch.
st.w --sp, r12 // Push the pointer to the interrupt handler onto the system stack since no register may be altered.
popm r8-r12, lr, pc // Restore registers and jump to the handler.
spint\priority:
popm r8-r12, lr
#endif
rete // If this was a spurious interrupt (R12 == NULL), return from event handler.
.endr
// Constant data area.
.balign 4
// Values to store in the interrupt priority registers for the various interrupt priority levels.
// The interrupt priority registers contain the interrupt priority level and
// the EVBA-relative interrupt vector offset.
.global ipr_val
.type ipr_val, @object
ipr_val:
.word (AVR32_INTC_INT0 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int0 - _evba),\
(AVR32_INTC_INT1 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int1 - _evba),\
(AVR32_INTC_INT2 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int2 - _evba),\
(AVR32_INTC_INT3 << AVR32_INTC_IPR_INTLEVEL_OFFSET) | (_int3 - _evba)
//! \endverbatim
//! @}

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief INTC driver for AVR32 UC3.
*
* AVR32 Interrupt Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an INTC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include <avr32/io.h>
#include "compiler.h"
#include "preprocessor.h"
#include "intc.h"
// define _evba from exception.S
extern void _evba;
//! Values to store in the interrupt priority registers for the various interrupt priority levels.
extern const unsigned int ipr_val[AVR32_INTC_NUM_INT_LEVELS];
//! Creates a table of interrupt line handlers per interrupt group in order to optimize RAM space.
//! Each line handler table contains a set of pointers to interrupt handlers.
#if (defined __GNUC__)
#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
static volatile __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
#elif (defined __ICCAVR32__)
#define DECL_INT_LINE_HANDLER_TABLE(GRP, unused) \
static volatile __no_init __int_handler _int_line_handler_table_##GRP[Max(AVR32_INTC_NUM_IRQS_PER_GRP##GRP, 1)];
#endif
MREPEAT(AVR32_INTC_NUM_INT_GRPS, DECL_INT_LINE_HANDLER_TABLE, ~);
#undef DECL_INT_LINE_HANDLER_TABLE
//! Table containing for each interrupt group the number of interrupt request
//! lines and a pointer to the table of interrupt line handlers.
static const struct
{
unsigned int num_irqs;
volatile __int_handler *_int_line_handler_table;
} _int_handler_table[AVR32_INTC_NUM_INT_GRPS] =
{
#define INSERT_INT_LINE_HANDLER_TABLE(GRP, unused) \
{AVR32_INTC_NUM_IRQS_PER_GRP##GRP, _int_line_handler_table_##GRP},
MREPEAT(AVR32_INTC_NUM_INT_GRPS, INSERT_INT_LINE_HANDLER_TABLE, ~)
#undef INSERT_INT_LINE_HANDLER_TABLE
};
/*! \brief Default interrupt handler.
*
* \note Taken and adapted from Newlib.
*/
#if (defined __GNUC__)
__attribute__((__interrupt__))
#elif (defined __ICCAVR32__)
__interrupt
#endif
static void _unhandled_interrupt(void)
{
// Catch unregistered interrupts.
while (TRUE);
}
/*! \brief Gets the interrupt handler of the current event at the \a int_level
* interrupt priority level (called from exception.S).
*
* \param int_level Interrupt priority level to handle.
*
* \return Interrupt handler to execute.
*
* \note Taken and adapted from Newlib.
*/
__int_handler _get_interrupt_handler(unsigned int int_level)
{
// ICR3 is mapped first, ICR0 last.
// Code in exception.S puts int_level in R12 which is used by AVR32-GCC to
// pass a single argument to a function.
unsigned int int_grp = AVR32_INTC.icr[AVR32_INTC_INT3 - int_level];
unsigned int int_req = AVR32_INTC.irr[int_grp];
// As an interrupt may disappear while it is being fetched by the CPU
// (spurious interrupt caused by a delayed response from an MCU peripheral to
// an interrupt flag clear or interrupt disable instruction), check if there
// are remaining interrupt lines to process.
// If a spurious interrupt occurs, the status register (SR) contains an
// execution mode and interrupt level masks corresponding to a level 0
// interrupt, whatever the interrupt priority level causing the spurious
// event. This behavior has been chosen because a spurious interrupt has not
// to be a priority one and because it may not cause any trouble to other
// interrupts.
// However, these spurious interrupts place the hardware in an unstable state
// and could give problems in other/future versions of the CPU, so the
// software has to be written so that they never occur. The only safe way of
// achieving this is to always clear or disable peripheral interrupts with the
// following sequence:
// 1: Mask the interrupt in the CPU by setting GM (or IxM) in SR.
// 2: Perform the bus access to the peripheral register that clears or
// disables the interrupt.
// 3: Wait until the interrupt has actually been cleared or disabled by the
// peripheral. This is usually performed by reading from a register in the
// same peripheral (it DOES NOT have to be the same register that was
// accessed in step 2, but it MUST be in the same peripheral), what takes
// bus system latencies into account, but peripheral internal latencies
// (generally 0 cycle) also have to be considered.
// 4: Unmask the interrupt in the CPU by clearing GM (or IxM) in SR.
// Note that steps 1 and 4 are useless inside interrupt handlers as the
// corresponding interrupt level is automatically masked by IxM (unless IxM is
// explicitly cleared by the software).
//
// Get the right IRQ handler.
//
// If several interrupt lines are active in the group, the interrupt line with
// the highest number is selected. This is to be coherent with the
// prioritization of interrupt groups performed by the hardware interrupt
// controller.
//
// If no handler has been registered for the pending interrupt,
// _unhandled_interrupt will be selected thanks to the initialization of
// _int_line_handler_table_x by INTC_init_interrupts.
//
// exception.S will provide the interrupt handler with a clean interrupt stack
// frame, with nothing more pushed onto the stack. The interrupt handler must
// manage the `rete' instruction, what can be done thanks to pure assembly,
// inline assembly or the `__attribute__((__interrupt__))' C function
// attribute.
return (int_req) ? _int_handler_table[int_grp]._int_line_handler_table[32 - clz(int_req) - 1] : NULL;
}
//! Init EVBA address. This sequence might also be done in the UTILS/STARTUP/GCC/crt0.S
static __inline__ void INTC_init_evba(void)
{
Set_system_register(AVR32_EVBA, (int)&_evba );
}
void INTC_init_interrupts(void)
{
unsigned int int_grp, int_req;
INTC_init_evba();
// For all interrupt groups,
for (int_grp = 0; int_grp < AVR32_INTC_NUM_INT_GRPS; int_grp++)
{
// For all interrupt request lines of each group,
for (int_req = 0; int_req < _int_handler_table[int_grp].num_irqs; int_req++)
{
// Assign _unhandled_interrupt as default interrupt handler.
_int_handler_table[int_grp]._int_line_handler_table[int_req] = &_unhandled_interrupt;
}
// Set the interrupt group priority register to its default value.
// By default, all interrupt groups are linked to the interrupt priority
// level 0 and to the interrupt vector _int0.
AVR32_INTC.ipr[int_grp] = ipr_val[AVR32_INTC_INT0];
}
}
void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level)
{
// Determine the group of the IRQ.
unsigned int int_grp = irq / AVR32_INTC_MAX_NUM_IRQS_PER_GRP;
// Store in _int_line_handler_table_x the pointer to the interrupt handler, so
// that _get_interrupt_handler can retrieve it when the interrupt is vectored.
_int_handler_table[int_grp]._int_line_handler_table[irq % AVR32_INTC_MAX_NUM_IRQS_PER_GRP] = handler;
// Program the corresponding IPRX register to set the interrupt priority level
// and the interrupt vector offset that will be fetched by the core interrupt
// system.
// NOTE: The _intx functions are intermediate assembly functions between the
// core interrupt system and the user interrupt handler.
AVR32_INTC.ipr[int_grp] = ipr_val[int_level & (AVR32_INTC_IPR_INTLEVEL_MASK >> AVR32_INTC_IPR_INTLEVEL_OFFSET)];
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief INTC driver for AVR32 UC3.
*
* AVR32 Interrupt Controller driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an INTC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _INTC_H_
#define _INTC_H_
#include "compiler.h"
//! Maximal number of interrupt request lines per group.
#define AVR32_INTC_MAX_NUM_IRQS_PER_GRP 32
//! Number of interrupt priority levels.
#define AVR32_INTC_NUM_INT_LEVELS (1 << AVR32_INTC_IPR_INTLEVEL_SIZE)
#ifdef __AVR32_ABI_COMPILER__ // Automatically defined when compiling for AVR32, not when assembling.
//! Pointer to interrupt handler.
#if (defined __GNUC__)
typedef void (*__int_handler)(void);
#elif (defined __ICCAVR32__)
typedef void (__interrupt *__int_handler)(void);
#endif
/*! \brief Initializes the hardware interrupt controller driver.
*
* \note Taken and adapted from Newlib.
*/
extern void INTC_init_interrupts(void);
/*! \brief Registers an interrupt handler.
*
* \param handler Interrupt handler to register.
* \param irq IRQ of the interrupt handler to register.
* \param int_level Interrupt priority level to assign to the group of this IRQ.
*
* \warning The interrupt handler must manage the `rete' instruction, what can
* be done thanks to pure assembly, inline assembly or the
* `__attribute__((__interrupt__))' C function attribute.
*
* \warning If several interrupt handlers of a same group are registered with
* different priority levels, only the latest priority level set will
* be effective.
*
* \note Taken and adapted from Newlib.
*/
extern void INTC_register_interrupt(__int_handler handler, unsigned int irq, unsigned int int_level);
#endif // __AVR32_ABI_COMPILER__
#endif // _INTC_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief PDCA driver for AVR32 UC3.
*
* This file defines a useful set of functions for the PDCA interface on AVR32
* devices.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a PDCA module.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include "compiler.h"
#include "pdca.h"
volatile avr32_pdca_channel_t *pdca_get_handler(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = &AVR32_PDCA.channel[pdca_ch_number];
if (pdca_ch_number >= AVR32_PDCA_CHANNEL_LENGTH)
return (volatile avr32_pdca_channel_t *)PDCA_INVALID_ARGUMENT;
return pdca_channel;
}
int pdca_init_channel(unsigned int pdca_ch_number, const pdca_channel_options_t *opt)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
pdca_disable_interrupt_transfer_complete(pdca_ch_number); // disable channel interrupt
pdca_disable_interrupt_reload_counter_zero(pdca_ch_number); // disable channel interrupt
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
pdca_channel->mar = (unsigned long)opt->addr;
pdca_channel->tcr = opt->size;
pdca_channel->psr = opt->pid;
pdca_channel->marr = (unsigned long)opt->r_addr;
pdca_channel->tcrr = opt->r_size;
pdca_channel->mr =
#if (defined AVR32_PDCA_120_H_INCLUDED ) || (defined AVR32_PDCA_121_H_INCLUDED ) || (defined AVR32_PDCA_122_H_INCLUDED )
opt->etrig << AVR32_PDCA_ETRIG_OFFSET |
#endif // #ifdef AVR32_PDCA_120_H_INCLUDED
opt->transfer_size << AVR32_PDCA_SIZE_OFFSET;
pdca_channel->cr = AVR32_PDCA_ECLR_MASK;
pdca_channel->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
return PDCA_SUCCESS;
}
unsigned int pdca_get_channel_status(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
return (pdca_channel->sr & AVR32_PDCA_TEN_MASK) != 0;
}
void pdca_disable(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
// Disable transfer
pdca_channel->cr = AVR32_PDCA_TDIS_MASK;
}
void pdca_enable(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
// Enable transfer
pdca_channel->cr = AVR32_PDCA_TEN_MASK;
}
unsigned int pdca_get_load_size(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
return pdca_channel->tcr;
}
void pdca_load_channel(unsigned int pdca_ch_number, volatile void *addr, unsigned int size)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
pdca_channel->mar = (unsigned long)addr;
pdca_channel->tcr = size;
pdca_channel->cr = AVR32_PDCA_ECLR_MASK;
pdca_channel->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
unsigned int pdca_get_reload_size(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
return pdca_channel->tcrr;
}
void pdca_reload_channel(unsigned int pdca_ch_number, volatile void *addr, unsigned int size)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
// set up next memory address
pdca_channel->marr = (unsigned long)addr;
// set up next memory size
pdca_channel->tcrr = size;
pdca_channel->cr = AVR32_PDCA_ECLR_MASK;
pdca_channel->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void pdca_set_peripheral_select(unsigned int pdca_ch_number, unsigned int pid)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
pdca_channel->psr = pid;
}
void pdca_set_transfer_size(unsigned int pdca_ch_number, unsigned int transfer_size)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
pdca_channel->mr = (pdca_channel->mr & ~AVR32_PDCA_SIZE_MASK) |
transfer_size << AVR32_PDCA_SIZE_OFFSET;
}
#if (defined AVR32_PDCA_120_H_INCLUDED ) || (defined AVR32_PDCA_121_H_INCLUDED ) || (defined AVR32_PDCA_122_H_INCLUDED )
void pdca_disable_event_trigger(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
pdca_channel->mr &= ~AVR32_PDCA_ETRIG_MASK;
}
void pdca_enable_event_trigger(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
pdca_channel->mr |= AVR32_PDCA_ETRIG_MASK;
}
#endif // #ifdef AVR32_PDCA_120_H_INCLUDED
void pdca_disable_interrupt_transfer_error(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
pdca_channel->idr = AVR32_PDCA_TERR_MASK;
pdca_channel->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void pdca_enable_interrupt_transfer_error(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
pdca_channel->ier = AVR32_PDCA_TERR_MASK;
}
void pdca_disable_interrupt_transfer_complete(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
pdca_channel->idr = AVR32_PDCA_TRC_MASK;
pdca_channel->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void pdca_enable_interrupt_transfer_complete(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
pdca_channel->ier = AVR32_PDCA_TRC_MASK;
}
void pdca_disable_interrupt_reload_counter_zero(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
pdca_channel->idr = AVR32_PDCA_RCZ_MASK;
pdca_channel->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void pdca_enable_interrupt_reload_counter_zero(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
pdca_channel->ier = AVR32_PDCA_RCZ_MASK;
}
unsigned long pdca_get_transfer_status(unsigned int pdca_ch_number)
{
// get the correct channel pointer
volatile avr32_pdca_channel_t *pdca_channel = pdca_get_handler(pdca_ch_number);
return pdca_channel->isr;
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief PDCA driver for AVR32 UC3.
*
* This file defines a useful set of functions for the PDCA interface on AVR32
* devices.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a PDCA module.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _PDCA_H_
#define _PDCA_H_
#include <avr32/io.h>
//! Size of PDCA transfer: byte.
#define PDCA_TRANSFER_SIZE_BYTE AVR32_PDCA_BYTE
//! Size of PDCA transfer: half-word.
#define PDCA_TRANSFER_SIZE_HALF_WORD AVR32_PDCA_HALF_WORD
//! Size of PDCA transfer: word.
#define PDCA_TRANSFER_SIZE_WORD AVR32_PDCA_WORD
/*! \name PDCA Driver Status Codes
*/
//! @{
#define PDCA_SUCCESS 0
#define PDCA_INVALID_ARGUMENT -1
//! @}
/*! \name PDCA Transfer Status Codes
*/
//! @{
#define PDCA_TRANSFER_ERROR AVR32_PDCA_TERR_MASK
#define PDCA_TRANSFER_COMPLETE AVR32_PDCA_TRC_MASK
#define PDCA_TRANSFER_COUNTER_RELOAD_IS_ZERO AVR32_PDCA_RCZ_MASK
//! @}
//! PDCA channel options.
typedef struct
{
//! Memory address.
volatile void *addr ;
//! Transfer counter.
unsigned int size ;
//! Next memory address.
volatile void *r_addr ;
//! Next transfer counter.
unsigned int r_size ;
//! Select peripheral ID.
unsigned int pid ;
//! Select the size of the transfer (byte, half-word or word).
unsigned int transfer_size ;
#if (defined AVR32_PDCA_120_H_INCLUDED ) || (defined AVR32_PDCA_121_H_INCLUDED ) || (defined AVR32_PDCA_122_H_INCLUDED )
// Note: the options in this preprocessor section are only available from the PDCA IP version 1.2.0 on.
//! Enable (\c 1) or disable (\c 0) the transfer upon event trigger.
unsigned char etrig ;
#endif // #ifdef AVR32_PDCA_120_H_INCLUDED
} pdca_channel_options_t;
/*! \brief Get PDCA channel handler
*
* \param pdca_ch_number PDCA channel
*
* \return channel handled or PDCA_INVALID_ARGUMENT
*/
extern volatile avr32_pdca_channel_t *pdca_get_handler(unsigned int pdca_ch_number);
/*! \brief Set the channel configuration
*
* \param pdca_ch_number PDCA channel
* \param opt channel option
*/
extern int pdca_init_channel(unsigned int pdca_ch_number, const pdca_channel_options_t *opt);
/*! \brief Get the PDCA channel transfer enable status
*
* \param pdca_ch_number PDCA channel
*
* \return \c 1 if channel transfer is enabled, else \c 0
*/
extern unsigned int pdca_get_channel_status(unsigned int pdca_ch_number);
/*! \brief Disable the PDCA for the given channel
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_disable(unsigned int pdca_ch_number);
/*! \brief Enable the PDCA for the given channel
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_enable(unsigned int pdca_ch_number);
/*! \brief Get PDCA channel load size (or remaining size if transfer started)
*
* \param pdca_ch_number PDCA channel
*
* \return size current size to transfer
*/
extern unsigned int pdca_get_load_size(unsigned int pdca_ch_number);
/*! \brief Set PDCA channel load values
*
* \param pdca_ch_number PDCA channel
* \param addr address where data to load are stored
* \param size size of the data block to load
*/
extern void pdca_load_channel(unsigned int pdca_ch_number, volatile void *addr, unsigned int size);
/*! \brief Get PDCA channel reload size
*
* \param pdca_ch_number PDCA channel
*
* \return size current reload size
*/
extern unsigned int pdca_get_reload_size(unsigned int pdca_ch_number);
/*! \brief Set PDCA channel reload values
*
* \param pdca_ch_number PDCA channel
* \param addr address where data to load are stored
* \param size size of the data block to load
*/
extern void pdca_reload_channel(unsigned int pdca_ch_number, volatile void *addr, unsigned int size);
/*! \brief Set the peripheral function to use with the PDCA channel
*
* \param pdca_ch_number PDCA channel
* \param pid the peripheral ID
*/
extern void pdca_set_peripheral_select(unsigned int pdca_ch_number, unsigned int pid);
/*! \brief Set the size of the transfer
*
* \param pdca_ch_number PDCA channel
* \param transfer_size size of the transfer (byte, half-word or word)
*/
extern void pdca_set_transfer_size(unsigned int pdca_ch_number, unsigned int transfer_size);
#if (defined AVR32_PDCA_120_H_INCLUDED ) || (defined AVR32_PDCA_121_H_INCLUDED ) || (defined AVR32_PDCA_122_H_INCLUDED )
// Note: the functions in this preprocessor section are only available from the PDCA IP version 1.2.0 on.
/*! \brief Disable the event-triggered transfer feature
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_disable_event_trigger(unsigned int pdca_ch_number);
/*! \brief Enable the event-triggered transfer feature
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_enable_event_trigger(unsigned int pdca_ch_number);
#endif // #ifdef AVR32_PDCA_120_H_INCLUDED
/*! \brief Disable PDCA transfer error interrupt
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_disable_interrupt_transfer_error(unsigned int pdca_ch_number);
/*! \brief Enable PDCA transfer error interrupt
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_enable_interrupt_transfer_error(unsigned int pdca_ch_number);
/*! \brief Disable PDCA transfer interrupt when completed (ie TCR and TCRR are both zero)
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_disable_interrupt_transfer_complete(unsigned int pdca_ch_number);
/*! \brief Enable PDCA transfer interrupt when completed (ie TCR and TCRR are both zero)
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_enable_interrupt_transfer_complete(unsigned int pdca_ch_number);
/*! \brief Disable PDCA transfer interrupt when TCRR reaches zero
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_disable_interrupt_reload_counter_zero(unsigned int pdca_ch_number);
/*! \brief Enable PDCA transfer interrupt when TCRR reaches zero
*
* \param pdca_ch_number PDCA channel
*/
extern void pdca_enable_interrupt_reload_counter_zero(unsigned int pdca_ch_number);
/*! \brief Get PDCA channel transfer status
*
* \param pdca_ch_number PDCA channel
*
* \return PDCA transfer status with the following bit-masks:\n
* - \c PDCA_TRANSFER_ERROR;\n
* - \c PDCA_TRANSFER_COMPLETE;\n
* - \c PDCA_TRANSFER_COUNTER_RELOAD_IS_ZERO.
*/
extern unsigned long pdca_get_transfer_status(unsigned int pdca_ch_number);
#endif // _PDCA_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Power Manager driver.
*
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include "compiler.h"
#include "pm.h"
/*! \name PM Writable Bit-Field Registers
*/
//! @{
typedef union
{
unsigned long mcctrl;
avr32_pm_mcctrl_t MCCTRL;
} u_avr32_pm_mcctrl_t;
typedef union
{
unsigned long cksel;
avr32_pm_cksel_t CKSEL;
} u_avr32_pm_cksel_t;
typedef union
{
unsigned long pll;
avr32_pm_pll_t PLL;
} u_avr32_pm_pll_t;
typedef union
{
unsigned long oscctrl0;
avr32_pm_oscctrl0_t OSCCTRL0;
} u_avr32_pm_oscctrl0_t;
typedef union
{
unsigned long oscctrl1;
avr32_pm_oscctrl1_t OSCCTRL1;
} u_avr32_pm_oscctrl1_t;
typedef union
{
unsigned long oscctrl32;
avr32_pm_oscctrl32_t OSCCTRL32;
} u_avr32_pm_oscctrl32_t;
typedef union
{
unsigned long ier;
avr32_pm_ier_t IER;
} u_avr32_pm_ier_t;
typedef union
{
unsigned long idr;
avr32_pm_idr_t IDR;
} u_avr32_pm_idr_t;
typedef union
{
unsigned long icr;
avr32_pm_icr_t ICR;
} u_avr32_pm_icr_t;
typedef union
{
unsigned long gcctrl;
avr32_pm_gcctrl_t GCCTRL;
} u_avr32_pm_gcctrl_t;
typedef union
{
unsigned long rccr;
avr32_pm_rccr_t RCCR;
} u_avr32_pm_rccr_t;
typedef union
{
unsigned long bgcr;
avr32_pm_bgcr_t BGCR;
} u_avr32_pm_bgcr_t;
typedef union
{
unsigned long vregcr;
avr32_pm_vregcr_t VREGCR;
} u_avr32_pm_vregcr_t;
typedef union
{
unsigned long bod;
avr32_pm_bod_t BOD;
} u_avr32_pm_bod_t;
//! @}
/*! \brief Sets the mode of the oscillator 0.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
* \param mode Oscillator 0 mode (i.e. AVR32_PM_OSCCTRL0_MODE_x).
*/
static void pm_set_osc0_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
// Read
u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
// Modify
u_avr32_pm_oscctrl0.OSCCTRL0.mode = mode;
// Write
pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
}
void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm)
{
pm_set_osc0_mode(pm, AVR32_PM_OSCCTRL0_MODE_EXT_CLOCK);
}
void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0)
{
pm_set_osc0_mode(pm, (fosc0 < 900000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G0 :
(fosc0 < 3000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G1 :
(fosc0 < 8000000) ? AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G2 :
AVR32_PM_OSCCTRL0_MODE_CRYSTAL_G3);
}
void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup)
{
pm_enable_clk0_no_wait(pm, startup);
pm_wait_for_clk0_ready(pm);
}
void pm_disable_clk0(volatile avr32_pm_t *pm)
{
pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC0EN_MASK;
}
void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
// Read register
u_avr32_pm_oscctrl0_t u_avr32_pm_oscctrl0 = {pm->oscctrl0};
// Modify
u_avr32_pm_oscctrl0.OSCCTRL0.startup = startup;
// Write back
pm->oscctrl0 = u_avr32_pm_oscctrl0.oscctrl0;
pm->mcctrl |= AVR32_PM_MCCTRL_OSC0EN_MASK;
}
void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC0RDY_MASK));
}
/*! \brief Sets the mode of the oscillator 1.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
* \param mode Oscillator 1 mode (i.e. AVR32_PM_OSCCTRL1_MODE_x).
*/
static void pm_set_osc1_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
// Read
u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
// Modify
u_avr32_pm_oscctrl1.OSCCTRL1.mode = mode;
// Write
pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
}
void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm)
{
pm_set_osc1_mode(pm, AVR32_PM_OSCCTRL1_MODE_EXT_CLOCK);
}
void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1)
{
pm_set_osc1_mode(pm, (fosc1 < 900000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G0 :
(fosc1 < 3000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G1 :
(fosc1 < 8000000) ? AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G2 :
AVR32_PM_OSCCTRL1_MODE_CRYSTAL_G3);
}
void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup)
{
pm_enable_clk1_no_wait(pm, startup);
pm_wait_for_clk1_ready(pm);
}
void pm_disable_clk1(volatile avr32_pm_t *pm)
{
pm->mcctrl &= ~AVR32_PM_MCCTRL_OSC1EN_MASK;
}
void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
// Read register
u_avr32_pm_oscctrl1_t u_avr32_pm_oscctrl1 = {pm->oscctrl1};
// Modify
u_avr32_pm_oscctrl1.OSCCTRL1.startup = startup;
// Write back
pm->oscctrl1 = u_avr32_pm_oscctrl1.oscctrl1;
pm->mcctrl |= AVR32_PM_MCCTRL_OSC1EN_MASK;
}
void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC1RDY_MASK));
}
/*! \brief Sets the mode of the 32-kHz oscillator.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
* \param mode 32-kHz oscillator mode (i.e. AVR32_PM_OSCCTRL32_MODE_x).
*/
static void pm_set_osc32_mode(volatile avr32_pm_t *pm, unsigned int mode)
{
// Read
u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
// Modify
u_avr32_pm_oscctrl32.OSCCTRL32.mode = mode;
// Write
pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
}
void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm)
{
pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_EXT_CLOCK);
}
void pm_enable_osc32_crystal(volatile avr32_pm_t *pm)
{
pm_set_osc32_mode(pm, AVR32_PM_OSCCTRL32_MODE_CRYSTAL);
}
void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup)
{
pm_enable_clk32_no_wait(pm, startup);
pm_wait_for_clk32_ready(pm);
}
void pm_disable_clk32(volatile avr32_pm_t *pm)
{
pm->oscctrl32 &= ~AVR32_PM_OSCCTRL32_OSC32EN_MASK;
}
void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup)
{
// Read register
u_avr32_pm_oscctrl32_t u_avr32_pm_oscctrl32 = {pm->oscctrl32};
// Modify
u_avr32_pm_oscctrl32.OSCCTRL32.osc32en = 1;
u_avr32_pm_oscctrl32.OSCCTRL32.startup = startup;
// Write back
pm->oscctrl32 = u_avr32_pm_oscctrl32.oscctrl32;
}
void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_OSC32RDY_MASK));
}
void pm_cksel(volatile avr32_pm_t *pm,
unsigned int pbadiv,
unsigned int pbasel,
unsigned int pbbdiv,
unsigned int pbbsel,
unsigned int hsbdiv,
unsigned int hsbsel)
{
u_avr32_pm_cksel_t u_avr32_pm_cksel = {0};
u_avr32_pm_cksel.CKSEL.cpusel = hsbsel;
u_avr32_pm_cksel.CKSEL.cpudiv = hsbdiv;
u_avr32_pm_cksel.CKSEL.hsbsel = hsbsel;
u_avr32_pm_cksel.CKSEL.hsbdiv = hsbdiv;
u_avr32_pm_cksel.CKSEL.pbasel = pbasel;
u_avr32_pm_cksel.CKSEL.pbadiv = pbadiv;
u_avr32_pm_cksel.CKSEL.pbbsel = pbbsel;
u_avr32_pm_cksel.CKSEL.pbbdiv = pbbdiv;
pm->cksel = u_avr32_pm_cksel.cksel;
// Wait for ckrdy bit and then clear it
while (!(pm->poscsr & AVR32_PM_POSCSR_CKRDY_MASK));
}
void pm_gc_setup(volatile avr32_pm_t *pm,
unsigned int gc,
unsigned int osc_or_pll, // Use Osc (=0) or PLL (=1)
unsigned int pll_osc, // Sel Osc0/PLL0 or Osc1/PLL1
unsigned int diven,
unsigned int div)
{
u_avr32_pm_gcctrl_t u_avr32_pm_gcctrl = {0};
u_avr32_pm_gcctrl.GCCTRL.oscsel = pll_osc;
u_avr32_pm_gcctrl.GCCTRL.pllsel = osc_or_pll;
u_avr32_pm_gcctrl.GCCTRL.diven = diven;
u_avr32_pm_gcctrl.GCCTRL.div = div;
pm->gcctrl[gc] = u_avr32_pm_gcctrl.gcctrl;
}
void pm_gc_enable(volatile avr32_pm_t *pm,
unsigned int gc)
{
pm->gcctrl[gc] |= AVR32_PM_GCCTRL_CEN_MASK;
}
void pm_gc_disable(volatile avr32_pm_t *pm,
unsigned int gc)
{
pm->gcctrl[gc] &= ~AVR32_PM_GCCTRL_CEN_MASK;
}
void pm_pll_setup(volatile avr32_pm_t *pm,
unsigned int pll,
unsigned int mul,
unsigned int div,
unsigned int osc,
unsigned int lockcount)
{
u_avr32_pm_pll_t u_avr32_pm_pll = {0};
u_avr32_pm_pll.PLL.pllosc = osc;
u_avr32_pm_pll.PLL.plldiv = div;
u_avr32_pm_pll.PLL.pllmul = mul;
u_avr32_pm_pll.PLL.pllcount = lockcount;
pm->pll[pll] = u_avr32_pm_pll.pll;
}
void pm_pll_set_option(volatile avr32_pm_t *pm,
unsigned int pll,
unsigned int pll_freq,
unsigned int pll_div2,
unsigned int pll_wbwdisable)
{
u_avr32_pm_pll_t u_avr32_pm_pll = {pm->pll[pll]};
u_avr32_pm_pll.PLL.pllopt = pll_freq | (pll_div2 << 1) | (pll_wbwdisable << 2);
pm->pll[pll] = u_avr32_pm_pll.pll;
}
unsigned int pm_pll_get_option(volatile avr32_pm_t *pm,
unsigned int pll)
{
return (pm->pll[pll] & AVR32_PM_PLLOPT_MASK) >> AVR32_PM_PLLOPT_OFFSET;
}
void pm_pll_enable(volatile avr32_pm_t *pm,
unsigned int pll)
{
pm->pll[pll] |= AVR32_PM_PLLEN_MASK;
}
void pm_pll_disable(volatile avr32_pm_t *pm,
unsigned int pll)
{
pm->pll[pll] &= ~AVR32_PM_PLLEN_MASK;
}
void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK0_MASK));
}
void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm)
{
while (!(pm->poscsr & AVR32_PM_POSCSR_LOCK1_MASK));
}
void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock)
{
// Read
u_avr32_pm_mcctrl_t u_avr32_pm_mcctrl = {pm->mcctrl};
// Modify
u_avr32_pm_mcctrl.MCCTRL.mcsel = clock;
// Write back
pm->mcctrl = u_avr32_pm_mcctrl.mcctrl;
}
void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup)
{
pm_enable_osc0_crystal(pm, fosc0); // Enable the Osc0 in crystal mode
pm_enable_clk0(pm, startup); // Crystal startup time - This parameter is critical and depends on the characteristics of the crystal
pm_switch_to_clock(pm, AVR32_PM_MCSEL_OSC0); // Then switch main clock to Osc0
}
void pm_bod_enable_irq(volatile avr32_pm_t *pm)
{
pm->ier = AVR32_PM_IER_BODDET_MASK;
}
void pm_bod_disable_irq(volatile avr32_pm_t *pm)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
pm->idr = AVR32_PM_IDR_BODDET_MASK;
pm->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void pm_bod_clear_irq(volatile avr32_pm_t *pm)
{
pm->icr = AVR32_PM_ICR_BODDET_MASK;
}
unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm)
{
return ((pm->isr & AVR32_PM_ISR_BODDET_MASK) != 0);
}
unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm)
{
return ((pm->imr & AVR32_PM_IMR_BODDET_MASK) != 0);
}
unsigned long pm_bod_get_level(volatile avr32_pm_t *pm)
{
return (pm->bod & AVR32_PM_BOD_LEVEL_MASK) >> AVR32_PM_BOD_LEVEL_OFFSET;
}
unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp)
{
return pm->gplp[gplp];
}
void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value)
{
pm->gplp[gplp] = value;
}
long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module)
{
unsigned long domain = module>>5;
unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
// Implementation-specific shortcut: the ckMASK registers are contiguous and
// memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
*regptr |= (1<<(module%32));
return PASS;
}
long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module)
{
unsigned long domain = module>>5;
unsigned long *regptr = (unsigned long*)(&(pm->cpumask) + domain);
// Implementation-specific shortcut: the ckMASK registers are contiguous and
// memory-mapped in that order: CPUMASK, HSBMASK, PBAMASK, PBBMASK.
*regptr &= ~(1<<(module%32));
return PASS;
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Power Manager driver.
*
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _PM_H_
#define _PM_H_
#include <avr32/io.h>
#include "compiler.h"
#include "preprocessor.h"
/*! \brief Sets the MCU in the specified sleep mode.
*
* \param mode Sleep mode:
* \arg \c AVR32_PM_SMODE_IDLE: Idle;
* \arg \c AVR32_PM_SMODE_FROZEN: Frozen;
* \arg \c AVR32_PM_SMODE_STANDBY: Standby;
* \arg \c AVR32_PM_SMODE_STOP: Stop;
* \arg \c AVR32_PM_SMODE_DEEP_STOP: DeepStop;
* \arg \c AVR32_PM_SMODE_STATIC: Static.
*/
#define SLEEP(mode) {__asm__ __volatile__ ("sleep "STRINGZ(mode));}
//! Input and output parameters when initializing PM clocks using pm_configure_clocks().
typedef struct
{
//! CPU frequency (input/output argument).
unsigned long cpu_f;
//! PBA frequency (input/output argument).
unsigned long pba_f;
//! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
unsigned long osc0_f;
//! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
unsigned long osc0_startup;
} pm_freq_param_t;
#define PM_FREQ_STATUS_FAIL (-1)
#define PM_FREQ_STATUS_OK (0)
/*! \brief Gets the MCU reset cause.
*
* \param pm Base address of the Power Manager instance (i.e. &AVR32_PM).
*
* \return The MCU reset cause which can be masked with the
* \c AVR32_PM_RCAUSE_x_MASK bit-masks to isolate specific causes.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned int pm_get_reset_cause(volatile avr32_pm_t *pm)
{
return pm->rcause;
}
/*!
* \brief This function will enable the external clock mode of the oscillator 0.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_enable_osc0_ext_clock(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the crystal mode of the oscillator 0.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param fosc0 Oscillator 0 crystal frequency (Hz)
*/
extern void pm_enable_osc0_crystal(volatile avr32_pm_t *pm, unsigned int fosc0);
/*!
* \brief This function will enable the oscillator 0 to be used with a startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
*/
extern void pm_enable_clk0(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will disable the oscillator 0.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_disable_clk0(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the oscillator 0 to be used with no startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 0 startup time, for which the function does not wait. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
*/
extern void pm_enable_clk0_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will wait until the Osc0 clock is ready.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_clk0_ready(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the external clock mode of the oscillator 1.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_enable_osc1_ext_clock(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the crystal mode of the oscillator 1.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param fosc1 Oscillator 1 crystal frequency (Hz)
*/
extern void pm_enable_osc1_crystal(volatile avr32_pm_t *pm, unsigned int fosc1);
/*!
* \brief This function will enable the oscillator 1 to be used with a startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 1 startup time. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
*/
extern void pm_enable_clk1(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will disable the oscillator 1.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_disable_clk1(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the oscillator 1 to be used with no startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 1 startup time, for which the function does not wait. AVR32_PM_OSCCTRL1_STARTUP_x_RCOSC.
*/
extern void pm_enable_clk1_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will wait until the Osc1 clock is ready.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_clk1_ready(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the external clock mode of the 32-kHz oscillator.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_enable_osc32_ext_clock(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the crystal mode of the 32-kHz oscillator.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_enable_osc32_crystal(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the oscillator 32 to be used with a startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 32 kHz startup time. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
*/
extern void pm_enable_clk32(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will disable the oscillator 32.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_disable_clk32(volatile avr32_pm_t *pm);
/*!
* \brief This function will enable the oscillator 32 to be used with no startup time.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param startup Clock 32 kHz startup time, for which the function does not wait. AVR32_PM_OSCCTRL32_STARTUP_x_RCOSC.
*/
extern void pm_enable_clk32_no_wait(volatile avr32_pm_t *pm, unsigned int startup);
/*!
* \brief This function will wait until the osc32 clock is ready.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_clk32_ready(volatile avr32_pm_t *pm);
/*!
* \brief This function will select all the power manager clocks.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pbadiv Peripheral Bus A clock divisor enable
* \param pbasel Peripheral Bus A select
* \param pbbdiv Peripheral Bus B clock divisor enable
* \param pbbsel Peripheral Bus B select
* \param hsbdiv High Speed Bus clock divisor enable (CPU clock = HSB clock)
* \param hsbsel High Speed Bus select (CPU clock = HSB clock )
*/
extern void pm_cksel(volatile avr32_pm_t *pm, unsigned int pbadiv, unsigned int pbasel, unsigned int pbbdiv, unsigned int pbbsel, unsigned int hsbdiv, unsigned int hsbsel);
/*!
* \brief This function will setup a generic clock.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param gc generic clock number (0 for gc0...)
* \param osc_or_pll Use OSC (=0) or PLL (=1)
* \param pll_osc Select Osc0/PLL0 or Osc1/PLL1
* \param diven Generic clock divisor enable
* \param div Generic clock divisor
*/
extern void pm_gc_setup(volatile avr32_pm_t *pm, unsigned int gc, unsigned int osc_or_pll, unsigned int pll_osc, unsigned int diven, unsigned int div);
/*!
* \brief This function will enable a generic clock.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param gc generic clock number (0 for gc0...)
*/
extern void pm_gc_enable(volatile avr32_pm_t *pm, unsigned int gc);
/*!
* \brief This function will disable a generic clock.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param gc generic clock number (0 for gc0...)
*/
extern void pm_gc_disable(volatile avr32_pm_t *pm, unsigned int gc);
/*!
* \brief This function will setup a PLL.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
* \param mul PLL MUL in the PLL formula
* \param div PLL DIV in the PLL formula
* \param osc OSC number (0 for osc0, 1 for osc1)
* \param lockcount PLL lockount
*/
extern void pm_pll_setup(volatile avr32_pm_t *pm, unsigned int pll, unsigned int mul, unsigned int div, unsigned int osc, unsigned int lockcount);
/*!
* \brief This function will set a PLL option.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
* \param pll_freq Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
* \param pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
* \param pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
*/
extern void pm_pll_set_option(volatile avr32_pm_t *pm, unsigned int pll, unsigned int pll_freq, unsigned int pll_div2, unsigned int pll_wbwdisable);
/*!
* \brief This function will get a PLL option.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
* \return Option
*/
extern unsigned int pm_pll_get_option(volatile avr32_pm_t *pm, unsigned int pll);
/*!
* \brief This function will enable a PLL.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
*/
extern void pm_pll_enable(volatile avr32_pm_t *pm, unsigned int pll);
/*!
* \brief This function will disable a PLL.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param pll PLL number(0 for PLL0, 1 for PLL1)
*/
extern void pm_pll_disable(volatile avr32_pm_t *pm, unsigned int pll);
/*!
* \brief This function will wait for PLL0 locked
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_pll0_locked(volatile avr32_pm_t *pm);
/*!
* \brief This function will wait for PLL1 locked
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
*/
extern void pm_wait_for_pll1_locked(volatile avr32_pm_t *pm);
/*!
* \brief This function will switch the power manager main clock.
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param clock Clock to be switched on. AVR32_PM_MCSEL_SLOW for RCOsc, AVR32_PM_MCSEL_OSC0 for Osc0, AVR32_PM_MCSEL_PLL0 for PLL0.
*/
extern void pm_switch_to_clock(volatile avr32_pm_t *pm, unsigned long clock);
/*!
* \brief Switch main clock to clock Osc0 (crystal mode)
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param fosc0 Oscillator 0 crystal frequency (Hz)
* \param startup Crystal 0 startup time. AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC.
*/
extern void pm_switch_to_osc0(volatile avr32_pm_t *pm, unsigned int fosc0, unsigned int startup);
/*! \brief Enables the Brown-Out Detector interrupt.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
*/
extern void pm_bod_enable_irq(volatile avr32_pm_t *pm);
/*! \brief Disables the Brown-Out Detector interrupt.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
*/
extern void pm_bod_disable_irq(volatile avr32_pm_t *pm);
/*! \brief Clears the Brown-Out Detector interrupt flag.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
*/
extern void pm_bod_clear_irq(volatile avr32_pm_t *pm);
/*! \brief Gets the Brown-Out Detector interrupt flag.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
*
* \retval 0 No BOD interrupt.
* \retval 1 BOD interrupt pending.
*/
extern unsigned long pm_bod_get_irq_status(volatile avr32_pm_t *pm);
/*! \brief Gets the Brown-Out Detector interrupt enable status.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
*
* \retval 0 BOD interrupt disabled.
* \retval 1 BOD interrupt enabled.
*/
extern unsigned long pm_bod_get_irq_enable_bit(volatile avr32_pm_t *pm);
/*! \brief Gets the triggering threshold of the Brown-Out Detector.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM).
*
* \return Triggering threshold of the BOD. See the electrical characteristics
* in the part datasheet for actual voltage levels.
*/
extern unsigned long pm_bod_get_level(volatile avr32_pm_t *pm);
/*!
* \brief Read the content of the PM GPLP registers
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
*
* \return The content of the chosen GPLP register.
*/
extern unsigned long pm_read_gplp(volatile avr32_pm_t *pm, unsigned long gplp);
/*!
* \brief Write into the PM GPLP registers
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
* \param value Value to write
*/
extern void pm_write_gplp(volatile avr32_pm_t *pm, unsigned long gplp, unsigned long value);
/*! \brief Enable the clock of a module.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param module The module to clock (use one of the defines in the part-specific
* header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
* clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
*
* \return Status.
* \retval 0 Success.
* \retval <0 An error occured.
*/
extern long pm_enable_module(volatile avr32_pm_t *pm, unsigned long module);
/*! \brief Disable the clock of a module.
*
* \param pm Base address of the Power Manager (i.e. &AVR32_PM)
* \param module The module to shut down (use one of the defines in the part-specific
* header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
* clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks")
*
* \return Status.
* \retval 0 Success.
* \retval <0 An error occured.
*/
extern long pm_disable_module(volatile avr32_pm_t *pm, unsigned long module);
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
* according to the user wishes.
*
* This function needs some parameters stored in a pm_freq_param_t structure:
* - cpu_f and pba_f are the wanted frequencies,
* - osc0_f is the oscillator 0 on-board frequency (e.g. FOSC0),
* - osc0_startup is the oscillator 0 startup time (e.g. OSC0_STARTUP).
*
* The function will then configure the clocks using the following rules:
* - It first try to find a valid PLL frequency (the highest possible value to avoid jitter) in order
* to satisfy the CPU frequency,
* - It optimizes the configuration depending the various divide stages,
* - Then, the PBA frequency is configured from the CPU freq.
* - Note that HSB and PBB are configured with the same frequency as CPU.
* - Note also that the number of wait states of the flash read accesses is automatically set-up depending
* the CPU frequency. As a consequence, the application needs the FLASHC driver to compile.
*
* The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
*
* \param param pointer on the configuration structure.
*
* \retval PM_FREQ_STATUS_OK Mode successfully initialized.
* \retval PM_FREQ_STATUS_FAIL The configuration can not be done.
*/
extern int pm_configure_clocks(pm_freq_param_t *param);
/*! \brief Automatically configure the USB clock.
*
* USB clock is configured to 48MHz, using the PLL1 from the Oscillator0, assuming
* a 12 MHz crystal is connected to it.
*/
extern void pm_configure_usb_clock(void);
#endif // _PM_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Power Manager clocks configuration helper.
*
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include <string.h>
#include "compiler.h"
#include "pm.h"
extern void flashc_set_wait_state(unsigned int wait_state);
#if (defined AVR32_FLASHC_210_H_INCLUDED)
extern void flashc_issue_command(unsigned int command, int page_number);
#endif
#define PM_MAX_MUL ((1 << AVR32_PM_PLL0_PLLMUL_SIZE) - 1)
int pm_configure_clocks(pm_freq_param_t *param)
{
// Supported frequencies:
// Fosc0 mul div PLL div2_en cpu_f pba_f Comment
// 12 15 1 192 1 12 12
// 12 9 3 40 1 20 20 PLL out of spec
// 12 15 1 192 1 24 12
// 12 9 1 120 1 30 15
// 12 9 3 40 0 40 20 PLL out of spec
// 12 15 1 192 1 48 12
// 12 15 1 192 1 48 24
// 12 8 1 108 1 54 27
// 12 9 1 120 1 60 15
// 12 9 1 120 1 60 30
// 12 10 1 132 1 66 16.5
//
unsigned long in_cpu_f = param->cpu_f;
unsigned long in_osc0_f = param->osc0_f;
unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
unsigned long pll_freq, rest;
Bool b_div2_pba, b_div2_cpu;
// Switch to external Oscillator 0
pm_switch_to_osc0(&AVR32_PM, in_osc0_f, param->osc0_startup);
// Start with CPU freq config
if (in_cpu_f == in_osc0_f)
{
param->cpu_f = in_osc0_f;
param->pba_f = in_osc0_f;
return PM_FREQ_STATUS_OK;
}
else if (in_cpu_f < in_osc0_f)
{
// TBD
}
rest = in_cpu_f % in_osc0_f;
for (div = 1; div < 32; div++)
{
if ((div * rest) % in_osc0_f == 0)
break;
}
if (div == 32)
return PM_FREQ_STATUS_FAIL;
mul = (in_cpu_f * div) / in_osc0_f;
if (mul > PM_MAX_MUL)
return PM_FREQ_STATUS_FAIL;
// export 2power from PLL div to div2_cpu
while (!(div % 2))
{
div /= 2;
div2_cpu++;
}
// Here we know the mul and div parameter of the PLL config.
// . Check out if the PLL has a valid in_cpu_f.
// . Try to have for the PLL frequency (VCO output) the highest possible value
// to reduce jitter.
while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
{
if (2 * mul > PM_MAX_MUL)
break;
mul *= 2;
div2_cpu++;
}
if (div2_cpu != 0)
{
div2_cpu--;
div2_en = 1;
}
pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
// Update real CPU Frequency
param->cpu_f = pll_freq / (1 << div2_cpu);
mul--;
pm_pll_setup(&AVR32_PM
, 0 // pll
, mul // mul
, div // div
, 0 // osc
, 16 // lockcount
);
pm_pll_set_option(&AVR32_PM
, 0 // pll
// PLL clock is lower than 160MHz: need to set pllopt.
, (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0 // pll_freq
, div2_en // pll_div2
, 0 // pll_wbwdisable
);
rest = pll_freq;
while (rest > AVR32_PM_PBA_MAX_FREQ ||
rest != param->pba_f)
{
div2_pba++;
rest = pll_freq / (1 << div2_pba);
if (rest < param->pba_f)
break;
}
// Update real PBA Frequency
param->pba_f = pll_freq / (1 << div2_pba);
// Enable PLL0
pm_pll_enable(&AVR32_PM, 0);
// Wait for PLL0 locked
pm_wait_for_pll0_locked(&AVR32_PM);
if (div2_cpu)
{
b_div2_cpu = TRUE;
div2_cpu--;
}
else
b_div2_cpu = FALSE;
if (div2_pba)
{
b_div2_pba = TRUE;
div2_pba--;
}
else
b_div2_pba = FALSE;
pm_cksel(&AVR32_PM
, b_div2_pba, div2_pba // PBA
, b_div2_cpu, div2_cpu // PBB
, b_div2_cpu, div2_cpu // HSB
);
if (param->cpu_f > AVR32_FLASHC_FWS_0_MAX_FREQ)
{
flashc_set_wait_state(1);
#if (defined AVR32_FLASHC_210_H_INCLUDED)
if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_1_MAX_FREQ)
flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
else
flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
#endif
}
else
{
flashc_set_wait_state(0);
#if (defined AVR32_FLASHC_210_H_INCLUDED)
if (param->cpu_f > AVR32_FLASHC_HSEN_FWS_0_MAX_FREQ)
flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSEN, -1);
else
flashc_issue_command(AVR32_FLASHC_FCMD_CMD_HSDIS, -1);
#endif
}
pm_switch_to_clock(&AVR32_PM, AVR32_PM_MCCTRL_MCSEL_PLL0);
return PM_FREQ_STATUS_OK;
}
void pm_configure_usb_clock(void)
{
#if UC3A3
// Setup USB GCLK.
pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc
0, // osc_or_pll: use Osc (if 0) or PLL (if 1)
0, // pll_osc: select Osc0/PLL0 or Osc1/PLL1
0, // diven
0); // div
// Enable USB GCLK.
pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
#else
// Use 12MHz from OSC0 and generate 96 MHz
pm_pll_setup(&AVR32_PM, 1, // pll.
7, // mul.
1, // div.
0, // osc.
16); // lockcount.
pm_pll_set_option(&AVR32_PM, 1, // pll.
1, // pll_freq: choose the range 80-180MHz.
1, // pll_div2.
0); // pll_wbwdisable.
// start PLL1 and wait forl lock
pm_pll_enable(&AVR32_PM, 1);
// Wait for PLL1 locked.
pm_wait_for_pll1_locked(&AVR32_PM);
pm_gc_setup(&AVR32_PM, AVR32_PM_GCLK_USBB, // gc.
1, // osc_or_pll: use Osc (if 0) or PLL (if 1).
1, // pll_osc: select Osc0/PLL0 or Osc1/PLL1.
0, // diven.
0); // div.
pm_gc_enable(&AVR32_PM, AVR32_PM_GCLK_USBB);
#endif
}

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief High-level library abstracting features such as oscillators/pll/dfll
* configuration, clock configuration, System-sensible parameters
* configuration, buses clocks configuration, sleep mode, reset.
*
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include "power_clocks_lib.h"
//! Device-specific data
#if UC3L
static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param); // FORWARD declaration
#endif
#if UC3C
static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param); // FORWARD declaration
#endif
long int pcl_configure_clocks(pcl_freq_param_t *param)
{
#ifndef AVR32_PM_VERSION_RESETVALUE
// Implementation for UC3A, UC3A3, UC3B parts.
return(pm_configure_clocks(param));
#else
#ifdef AVR32_PM_410_H_INCLUDED
// Implementation for UC3C parts.
return(pcl_configure_clocks_uc3c(param));
#else
// Implementation for UC3L parts.
return(pcl_configure_clocks_uc3l(param));
#endif
#endif
}
//! Device-specific implementation
#if UC3L
// FORWARD declaration
static long int pcl_configure_synchronous_clocks( pm_clk_src_t main_clk_src,
unsigned long main_clock_freq_hz,
pcl_freq_param_t *param);
long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param)
{
// Supported main clock sources: PCL_MC_RCSYS
// Supported synchronous clocks frequencies if RCSYS is the main clock source:
// 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
// NOTE: by default, this implementation doesn't perform thorough checks on the
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
#ifdef AVR32SFW_INPUT_CHECK
// Verify that fCPU >= fPBx
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
return(-1);
#endif
#ifdef AVR32SFW_INPUT_CHECK
// Verify that the target frequencies are reachable.
if((param->cpu_f > SCIF_SLOWCLOCK_FREQ_HZ) || (param->pba_f > SCIF_SLOWCLOCK_FREQ_HZ)
|| (param->pbb_f > SCIF_SLOWCLOCK_FREQ_HZ))
return(-1);
#endif
return(pcl_configure_synchronous_clocks(PM_CLK_SRC_SLOW, SCIF_SLOWCLOCK_FREQ_HZ, param));
}
long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param)
{
// Supported main clock sources: PCL_MC_RC120M
// Supported synchronous clocks frequencies if RC120M is the main clock source:
// 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
// NOTE: by default, this implementation doesn't perform thorough checks on the
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
#ifdef AVR32SFW_INPUT_CHECK
// Verify that fCPU >= fPBx
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
return(-1);
#endif
#ifdef AVR32SFW_INPUT_CHECK
// Verify that the target frequencies are reachable.
if((param->cpu_f > SCIF_RC120M_FREQ_HZ) || (param->pba_f > SCIF_RC120M_FREQ_HZ)
|| (param->pbb_f > SCIF_RC120M_FREQ_HZ))
return(-1);
#endif
// Start the 120MHz internal RCosc (RC120M) clock
scif_start_rc120M();
return(pcl_configure_synchronous_clocks(PM_CLK_SRC_RC120M, SCIF_RC120M_FREQ_HZ, param));
}
long int pcl_configure_clocks_osc0(pcl_freq_param_t *param)
{
// Supported main clock sources: PCL_MC_OSC0
// Supported synchronous clocks frequencies if OSC0 is the main clock source:
// (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
// 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
// NOTE: by default, this implementation doesn't perform thorough checks on the
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
unsigned long main_clock_freq;
#ifdef AVR32SFW_INPUT_CHECK
// Verify that fCPU >= fPBx
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
return(-1);
#endif
main_clock_freq = param->osc0_f;
#ifdef AVR32SFW_INPUT_CHECK
// Verify that the target frequencies are reachable.
if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
|| (param->pbb_f > main_clock_freq))
return(-1);
#endif
// Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
scif_configure_osc_crystalmode(SCIF_OSC0, main_clock_freq);
// Enable the OSC0
scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
return(pcl_configure_synchronous_clocks(PM_CLK_SRC_OSC0, main_clock_freq, param));
}
long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param)
{
// Supported main clock sources: PCL_MC_DFLL
// Supported synchronous clocks frequencies if DFLL is the main clock source:
// (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
// 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
// NOTE: by default, this implementation doesn't perform thorough checks on the
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
unsigned long main_clock_freq;
scif_gclk_opt_t *pgc_dfllif_ref_opt;
#ifdef AVR32SFW_INPUT_CHECK
// Verify that fCPU >= fPBx
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
return(-1);
#endif
main_clock_freq = param->dfll_f;
#ifdef AVR32SFW_INPUT_CHECK
// Verify that the target DFLL output frequency is in the correct range.
if((main_clock_freq > SCIF_DFLL_MAXFREQ_HZ) || (main_clock_freq < SCIF_DFLL_MINFREQ_HZ))
return(-1);
// Verify that the target frequencies are reachable.
if((param->cpu_f > main_clock_freq) || (param->pba_f > main_clock_freq)
|| (param->pbb_f > main_clock_freq))
return(-1);
#endif
pgc_dfllif_ref_opt = (scif_gclk_opt_t *)param->pextra_params;
// Implementation note: this implementation configures the DFLL in closed-loop
// mode (because it gives the best accuracy) which enables the generic clock CLK_DFLLIF_REF
// as a reference (RCSYS being used as the generic clock source, undivided).
scif_dfll0_closedloop_configure_and_start(pgc_dfllif_ref_opt, main_clock_freq, TRUE);
return(pcl_configure_synchronous_clocks(PM_CLK_SRC_DFLL0, main_clock_freq, param));
}
static long int pcl_configure_clocks_uc3l(pcl_freq_param_t *param)
{
// Supported main clock sources: PCL_MC_RCSYS, PCL_MC_OSC0, PCL_MC_DFLL0, PCL_MC_RC120M
// Supported synchronous clocks frequencies if RCSYS is the main clock source:
// 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
// Supported synchronous clocks frequencies if RC120M is the main clock source:
// 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
// Supported synchronous clocks frequencies if OSC0 is the main clock source:
// (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
// 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
// Supported synchronous clocks frequencies if DFLL is the main clock source:
// (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
// 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
// NOTE: by default, this implementation doesn't perform thorough checks on the
// input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
#ifdef AVR32SFW_INPUT_CHECK
// Verify that fCPU >= fPBx
if((param->cpu_f < param->pba_f) || (param->cpu_f < param->pbb_f))
return(-1);
#endif
if(PCL_MC_RCSYS == param->main_clk_src)
{
return(pcl_configure_clocks_rcsys(param));
}
else if(PCL_MC_RC120M == param->main_clk_src)
{
return(pcl_configure_clocks_rc120m(param));
}
else if(PCL_MC_OSC0 == param->main_clk_src)
{
return(pcl_configure_clocks_osc0(param));
}
else // PCL_MC_DFLL0 == param->main_clk_src
{
return(pcl_configure_clocks_dfll0(param));
}
}
static long int pcl_configure_synchronous_clocks(pm_clk_src_t main_clk_src, unsigned long main_clock_freq_hz, pcl_freq_param_t *param)
{
//#
//# Set the Synchronous clock division ratio for each clock domain
//#
pm_set_all_cksel(main_clock_freq_hz, param->cpu_f, param->pba_f, param->pbb_f);
//#
//# Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
//#
#if UC3L
flashcdw_set_flash_waitstate_and_readmode(param->cpu_f);
#elif UC3C
flashc_set_flash_waitstate_and_readmode(param->cpu_f);
#endif
//#
//# Switch the main clock source to the selected clock.
//#
pm_set_mclk_source(main_clk_src);
return PASS;
}
#endif // UC3L device-specific implementation
//! UC3C Device-specific implementation
#if UC3C
static long int pcl_configure_clocks_uc3c(pcl_freq_param_t *param)
{
#define PM_MAX_MUL ((1 << AVR32_SCIF_PLLMUL_SIZE) - 1)
#define AVR32_PM_PBA_MAX_FREQ 66000000
#define AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ 240000000
#define AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ 160000000
// Implementation for UC3C parts.
// Supported frequencies:
// Fosc0 mul div PLL div2_en cpu_f pba_f Comment
// 12 15 1 192 1 12 12
// 12 9 3 40 1 20 20 PLL out of spec
// 12 15 1 192 1 24 12
// 12 9 1 120 1 30 15
// 12 9 3 40 0 40 20 PLL out of spec
// 12 15 1 192 1 48 12
// 12 15 1 192 1 48 24
// 12 8 1 108 1 54 27
// 12 9 1 120 1 60 15
// 12 9 1 120 1 60 30
// 12 10 1 132 1 66 16.5
//
unsigned long in_cpu_f = param->cpu_f;
unsigned long in_osc0_f = param->osc0_f;
unsigned long mul, div, div2_en = 0, div2_cpu = 0, div2_pba = 0;
unsigned long pll_freq, rest;
Bool b_div2_pba, b_div2_cpu;
// Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency.
scif_configure_osc_crystalmode(SCIF_OSC0, in_osc0_f);
// Enable the OSC0
scif_enable_osc(SCIF_OSC0, param->osc0_startup, true);
// Set the main clock source as being OSC0.
pm_set_mclk_source(PM_CLK_SRC_OSC0);
// Start with CPU freq config
if (in_cpu_f == in_osc0_f)
{
param->cpu_f = in_osc0_f;
param->pba_f = in_osc0_f;
return PASS;
}
else if (in_cpu_f < in_osc0_f)
{
// TBD
}
rest = in_cpu_f % in_osc0_f;
for (div = 1; div < 32; div++)
{
if ((div * rest) % in_osc0_f == 0)
break;
}
if (div == 32)
return FAIL;
mul = (in_cpu_f * div) / in_osc0_f;
if (mul > PM_MAX_MUL)
return FAIL;
// export 2power from PLL div to div2_cpu
while (!(div % 2))
{
div /= 2;
div2_cpu++;
}
// Here we know the mul and div parameter of the PLL config.
// . Check out if the PLL has a valid in_cpu_f.
// . Try to have for the PLL frequency (VCO output) the highest possible value
// to reduce jitter.
while (in_osc0_f * 2 * mul / div < AVR32_PM_PLL_VCO_RANGE0_MAX_FREQ)
{
if (2 * mul > PM_MAX_MUL)
break;
mul *= 2;
div2_cpu++;
}
if (div2_cpu != 0)
{
div2_cpu--;
div2_en = 1;
}
pll_freq = in_osc0_f * mul / (div * (1 << div2_en));
// Update real CPU Frequency
param->cpu_f = pll_freq / (1 << div2_cpu);
mul--;
scif_pll_opt_t opt;
opt.osc = SCIF_OSC0, // Sel Osc0 or Osc1
opt.lockcount = 16, // lockcount in main clock for the PLL wait lock
opt.div = div, // DIV=1 in the formula
opt.mul = mul, // MUL=7 in the formula
opt.pll_div2 = div2_en, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
opt.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
opt.pll_freq = (pll_freq < AVR32_PM_PLL_VCO_RANGE0_MIN_FREQ) ? 1 : 0, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
scif_pll_setup(SCIF_PLL0, opt); // lockcount in main clock for the PLL wait lock
/* Enable PLL0 */
scif_pll_enable(SCIF_PLL0);
/* Wait for PLL0 locked */
scif_wait_for_pll_locked(SCIF_PLL0) ;
rest = pll_freq;
while (rest > AVR32_PM_PBA_MAX_FREQ ||
rest != param->pba_f)
{
div2_pba++;
rest = pll_freq / (1 << div2_pba);
if (rest < param->pba_f)
break;
}
// Update real PBA Frequency
param->pba_f = pll_freq / (1 << div2_pba);
if (div2_cpu)
{
b_div2_cpu = TRUE;
div2_cpu--;
}
else
b_div2_cpu = FALSE;
if (div2_pba)
{
b_div2_pba = TRUE;
div2_pba--;
}
else
b_div2_pba = FALSE;
if (b_div2_cpu == TRUE )
{
pm_set_clk_domain_div(PM_CLK_DOMAIN_0, (pm_divratio_t) div2_cpu); // CPU
pm_set_clk_domain_div(PM_CLK_DOMAIN_1, (pm_divratio_t) div2_cpu); // HSB
pm_set_clk_domain_div(PM_CLK_DOMAIN_3, (pm_divratio_t) div2_cpu); // PBB
}
if (b_div2_pba == TRUE )
{
pm_set_clk_domain_div(PM_CLK_DOMAIN_2, (pm_divratio_t) div2_pba); // PBA
pm_set_clk_domain_div(PM_CLK_DOMAIN_4, (pm_divratio_t) div2_pba); // PBC
}
// Set Flashc Wait State
flashc_set_flash_waitstate_and_readmode(param->cpu_f);
// Set the main clock source as being PLL0.
pm_set_mclk_source(PM_CLK_SRC_PLL0);
return PASS;
}
#endif // UC3C device-specific implementation
long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup)
{
#ifndef AVR32_PM_VERSION_RESETVALUE
// Implementation for UC3A, UC3A3, UC3B parts.
if(PCL_OSC0 == osc)
{
// Configure OSC0 in crystal mode, external crystal with a FOSC0 Hz frequency,
// enable the OSC0, set the main clock source as being OSC0.
pm_switch_to_osc0(&AVR32_PM, fcrystal, startup);
}
else
{
return PCL_NOT_SUPPORTED;
}
#else
// Implementation for UC3C, UC3L parts.
#if AVR32_PM_VERSION_RESETVALUE < 0x400
return PCL_NOT_SUPPORTED;
#else
if(PCL_OSC0 == osc)
{
// Configure OSC0 in crystal mode, external crystal with a fcrystal Hz frequency.
scif_configure_osc_crystalmode(SCIF_OSC0, fcrystal);
// Enable the OSC0
scif_enable_osc(SCIF_OSC0, startup, true);
// Set the Flash wait state and the speed read mode (depending on the target CPU frequency).
#if UC3L
flashcdw_set_flash_waitstate_and_readmode(fcrystal);
#elif UC3C
flashc_set_flash_waitstate_and_readmode(fcrystal);
#endif
// Set the main clock source as being OSC0.
pm_set_mclk_source(PM_CLK_SRC_OSC0);
}
else
{
return PCL_NOT_SUPPORTED;
}
#endif
#endif
return PASS;
}
long int pcl_configure_usb_clock(void)
{
#ifndef AVR32_PM_VERSION_RESETVALUE
// Implementation for UC3A, UC3A3, UC3B parts.
pm_configure_usb_clock();
return PASS;
#else
#ifdef AVR32_PM_410_H_INCLUDED
const scif_pll_opt_t opt = {
.osc = SCIF_OSC0, // Sel Osc0 or Osc1
.lockcount = 16, // lockcount in main clock for the PLL wait lock
.div = 1, // DIV=1 in the formula
.mul = 5, // MUL=7 in the formula
.pll_div2 = 1, // pll_div2 Divide the PLL output frequency by 2 (this settings does not change the FVCO value)
.pll_wbwdisable = 0, //pll_wbwdisable 1 Disable the Wide-Bandith Mode (Wide-Bandwith mode allow a faster startup time and out-of-lock time). 0 to enable the Wide-Bandith Mode.
.pll_freq = 1, // Set to 1 for VCO frequency range 80-180MHz, set to 0 for VCO frequency range 160-240Mhz.
};
/* Setup PLL1 on Osc0, mul=7 ,no divisor, lockcount=16, ie. 16Mhzx6 = 96MHz output */
scif_pll_setup(SCIF_PLL1, opt); // lockcount in main clock for the PLL wait lock
/* Enable PLL1 */
scif_pll_enable(SCIF_PLL1);
/* Wait for PLL1 locked */
scif_wait_for_pll_locked(SCIF_PLL1) ;
// Implementation for UC3C parts.
// Setup the generic clock for USB
scif_gc_setup(AVR32_SCIF_GCLK_USB,
SCIF_GCCTRL_PLL1,
AVR32_SCIF_GC_NO_DIV_CLOCK,
0);
// Now enable the generic clock
scif_gc_enable(AVR32_SCIF_GCLK_USB);
return PASS;
#else
return PCL_NOT_SUPPORTED;
#endif
#endif
}
#if UC3L
#else
void pcl_write_gplp(unsigned long gplp, unsigned long value)
{
#ifndef AVR32_PM_VERSION_RESETVALUE
// Implementation for UC3A, UC3A3, UC3B parts.
pm_write_gplp(&AVR32_PM,gplp,value);
#else
scif_write_gplp(gplp,value);
#endif
}
unsigned long pcl_read_gplp(unsigned long gplp)
{
#ifndef AVR32_PM_VERSION_RESETVALUE
// Implementation for UC3A, UC3A3, UC3B parts.
return pm_read_gplp(&AVR32_PM,gplp);
#else
return scif_read_gplp(gplp);
#endif
}
#endif

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file has been prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief High-level library abstracting features such as oscillators/pll/dfll
* configuration, clock configuration, System-sensible parameters
* configuration, buses clocks configuration, sleep mode, reset.
*
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
*****************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _POWER_CLOCKS_LIB_H_
#define _POWER_CLOCKS_LIB_H_
#ifdef __cplusplus
extern "C" {
#endif
#include <avr32/io.h>
#include "compiler.h"
#ifndef AVR32_PM_VERSION_RESETVALUE
// Support for UC3A, UC3A3, UC3B parts.
#include "pm.h"
#else
//! Device-specific data
#if UC3L
#include "pm_uc3l.h"
#include "scif_uc3l.h"
#include "flashcdw.h"
#elif UC3C
#include "pm_uc3c.h"
#include "scif_uc3c.h"
#include "flashc.h"
#endif
#endif
/*! \name Clocks Management
*/
//! @{
//! The different oscillators
typedef enum
{
PCL_OSC0 = 0,
PCL_OSC1 = 1
} pcl_osc_t;
//! The different DFLLs
typedef enum
{
PCL_DFLL0 = 0,
PCL_DFLL1 = 1
} pcl_dfll_t;
//! Possible Main Clock Sources
typedef enum
{
PCL_MC_RCSYS, // Default main clock source, supported by all (aka Slow Clock)
PCL_MC_OSC0, // Supported by all
PCL_MC_OSC1, // Supported by UC3C only
PCL_MC_OSC0_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC0 as reference)
PCL_MC_OSC1_PLL0, // Supported by UC3A, UC3B, UC3A3, UC3C (the main clock source is PLL0 with OSC1 as reference)
PCL_MC_OSC0_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC0 as reference)
PCL_MC_OSC1_PLL1, // Supported by UC3C (the main clock source is PLL1 with OSC1 as reference)
PCL_MC_DFLL0, // Supported by UC3L
PCL_MC_DFLL1, // Not supported yet
PCL_MC_RC120M, // Supported by UC3L, UC3C
PCL_MC_RC8M, // Supported by UC3C
PCL_MC_CRIPOSC // Supported by UC3C
} pcl_mainclk_t;
//! Input and output parameters to configure clocks with pcl_configure_clocks().
// NOTE: regarding the frequency settings, always abide by the datasheet rules and min & max supported frequencies.
#ifndef AVR32_PM_VERSION_RESETVALUE
// Support for UC3A, UC3A3, UC3B parts.
#define pcl_freq_param_t pm_freq_param_t // See pm.h
#else
// Support for UC3C, UC3L parts.
typedef struct
{
//! Main clock source selection (input argument).
pcl_mainclk_t main_clk_src;
//! Target CPU frequency (input/output argument).
unsigned long cpu_f;
//! Target PBA frequency (input/output argument).
unsigned long pba_f;
//! Target PBB frequency (input/output argument).
unsigned long pbb_f;
//! Target PBC frequency (input/output argument).
unsigned long pbc_f;
//! Oscillator 0's external crystal(or external clock) frequency (board dependant) (input argument).
unsigned long osc0_f;
//! Oscillator 0's external crystal(or external clock) startup time: AVR32_PM_OSCCTRL0_STARTUP_x_RCOSC (input argument).
unsigned long osc0_startup;
//! DFLL target frequency (input/output argument) (NOTE: the bigger, the most stable the frequency)
unsigned long dfll_f;
//! Other parameters that might be necessary depending on the device (implementation-dependent).
// For the UC3L DFLL setup, this parameter should be pointing to a structure of
// type (scif_gclk_opt_t *).
void *pextra_params;
} pcl_freq_param_t;
#endif
//! Define "not supported" for the lib.
#define PCL_NOT_SUPPORTED (-10000)
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks
*
* This function needs some parameters stored in a pcl_freq_param_t structure:
* - main_clk_src is the id of the main clock source to use,
* - cpu_f and pba_f and pbb_f are the wanted frequencies,
* - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
* - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
* - dfll_f is the target DFLL frequency to set-up if main_clk_src is the dfll.
*
* The CPU, HSB and PBA frequencies programmed after configuration are stored back into cpu_f and pba_f.
*
* \note: since it is dynamically computing the appropriate field values of the
* configuration registers from the parameters structure, this function is not
* optimal in terms of code size. For a code size optimal solution, it is better
* to create a new function from pcl_configure_clocks() and modify it to use
* preprocessor computation from pre-defined target frequencies.
*
* \param param pointer on the configuration structure.
*
* \retval 0 Success.
* \retval <0 The configuration cannot be performed.
*/
extern long int pcl_configure_clocks(pcl_freq_param_t *param);
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RCSYS osc as main source clock.
*
* This function needs some parameters stored in a pcl_freq_param_t structure:
* - cpu_f and pba_f and pbb_f are the wanted frequencies
*
* Supported main clock sources: PCL_MC_RCSYS
*
* Supported synchronous clocks frequencies:
* 115200Hz, 57600Hz, 28800Hz, 14400Hz, 7200Hz, 3600Hz, 1800Hz, 900Hz, 450Hz.
*
* \note: by default, this implementation doesn't perform thorough checks on the
* input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
*
* \note: since it is dynamically computing the appropriate field values of the
* configuration registers from the parameters structure, this function is not
* optimal in terms of code size. For a code size optimal solution, it is better
* to create a new function from pcl_configure_clocks_rcsys() and modify it to use
* preprocessor computation from pre-defined target frequencies.
*
* \param param pointer on the configuration structure.
*
* \retval 0 Success.
* \retval <0 The configuration cannot be performed.
*/
extern long int pcl_configure_clocks_rcsys(pcl_freq_param_t *param);
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the RC120M osc as main source clock.
*
* This function needs some parameters stored in a pcl_freq_param_t structure:
* - cpu_f and pba_f and pbb_f are the wanted frequencies
*
* Supported main clock sources: PCL_MC_RC120M
*
* Supported synchronous clocks frequencies:
* 30MHz, 15MHz, 7.5MHz, 3.75MHz, 1.875MHz, 937.5kHz, 468.75kHz.
*
* \note: by default, this implementation doesn't perform thorough checks on the
* input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
*
* \note: since it is dynamically computing the appropriate field values of the
* configuration registers from the parameters structure, this function is not
* optimal in terms of code size. For a code size optimal solution, it is better
* to create a new function from pcl_configure_clocks_rc120m() and modify it to
* use preprocessor computation from pre-defined target frequencies.
*
* \param param pointer on the configuration structure.
*
* \retval 0 Success.
* \retval <0 The configuration cannot be performed.
*/
extern long int pcl_configure_clocks_rc120m(pcl_freq_param_t *param);
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the OSC0 osc as main source clock
*
* This function needs some parameters stored in a pcl_freq_param_t structure:
* - cpu_f and pba_f and pbb_f are the wanted frequencies,
* - osc0_f is the oscillator 0's external crystal (or external clock) on-board frequency (e.g. FOSC0),
* - osc0_startup is the oscillator 0's external crystal (or external clock) startup time (e.g. OSC0_STARTUP).
*
* Supported main clock sources: PCL_MC_OSC0
*
* Supported synchronous clocks frequencies:
* (these obviously depend on the OSC0 frequency; we'll take 16MHz as an example)
* 16MHz, 8MHz, 4MHz, 2MHz, 1MHz, 500kHz, 250kHz, 125kHz, 62.5kHz.
*
* \note: by default, this implementation doesn't perform thorough checks on the
* input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
*
* \note: since it is dynamically computing the appropriate field values of the
* configuration registers from the parameters structure, this function is not
* optimal in terms of code size. For a code size optimal solution, it is better
* to create a new function from pcl_configure_clocks_osc0() and modify it to use
* preprocessor computation from pre-defined target frequencies.
*
* \param param pointer on the configuration structure.
*
* \retval 0 Success.
* \retval <0 The configuration cannot be performed.
*/
extern long int pcl_configure_clocks_osc0(pcl_freq_param_t *param);
/*! \brief Automatically configure the CPU, PBA, PBB, and HSB clocks using the DFLL0 as main source clock
*
* This function needs some parameters stored in a pcl_freq_param_t structure:
* - cpu_f and pba_f and pbb_f are the wanted frequencies,
* - dfll_f is the target DFLL frequency to set-up
*
* \note: when the DFLL0 is to be used as main source clock for the synchronous clocks,
* the target frequency of the DFLL should be chosen to be as high as possible
* within the specification range (for stability reasons); the target cpu and pbx
* frequencies will then be reached by appropriate division ratio.
*
* Supported main clock sources: PCL_MC_DFLL0
*
* Supported synchronous clocks frequencies:
* (these obviously depend on the DFLL target frequency; we'll take 100MHz as an example)
* 50MHz, 25MHz, 12.5MHz, 6.25MHz, 3.125MHz, 1562.5kHz, 781.25kHz, 390.625kHz.
*
* \note: by default, this implementation doesn't perform thorough checks on the
* input parameters. To enable the checks, define AVR32SFW_INPUT_CHECK.
*
* \note: since it is dynamically computing the appropriate field values of the
* configuration registers from the parameters structure, this function is not
* optimal in terms of code size. For a code size optimal solution, it is better
* to create a new function from pcl_configure_clocks_dfll0() and modify it to
* use preprocessor computation from pre-defined target frequencies.
*
* \param param pointer on the configuration structure.
*
* \retval 0 Success.
* \retval <0 The configuration cannot be performed.
*/
extern long int pcl_configure_clocks_dfll0(pcl_freq_param_t *param);
/*! \brief Switch the main clock source to Osc0 configured in crystal mode
*
* \param osc The oscillator to enable and switch to.
* \param fcrystal Oscillator external crystal frequency (Hz)
* \param startup Oscillator startup time.
*
* \return Status.
* \retval 0 Success.
* \retval <0 An error occured.
*/
extern long int pcl_switch_to_osc(pcl_osc_t osc, unsigned int fcrystal, unsigned int startup);
/*! \brief Enable the clock of a module.
*
* \param module The module to clock (use one of the defines in the part-specific
* header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
* clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
* or look in the module section).
*
* \return Status.
* \retval 0 Success.
* \retval <0 An error occured.
*/
#ifndef AVR32_PM_VERSION_RESETVALUE
// Implementation for UC3A, UC3A3, UC3B parts.
#define pcl_enable_module(module) pm_enable_module(&AVR32_PM, module)
#else
// Implementation for UC3C, UC3L parts.
#define pcl_enable_module(module) pm_enable_module(module)
#endif
/*! \brief Disable the clock of a module.
*
* \param module The module to shut down (use one of the defines in the part-specific
* header file under "toolchain folder"/avr32/inc(lude)/avr32/; depending on the
* clock domain, look for the sections "CPU clocks", "HSB clocks", "PBx clocks"
* or look in the module section).
*
* \return Status.
* \retval 0 Success.
* \retval <0 An error occured.
*/
#ifndef AVR32_PM_VERSION_RESETVALUE
// Implementation for UC3A, UC3A3, UC3B parts.
#define pcl_disable_module(module) pm_disable_module(&AVR32_PM, module)
#else
// Implementation for UC3C, UC3L parts.
#define pcl_disable_module(module) pm_disable_module(module)
#endif
/*! \brief Configure the USB Clock
*
*
* \return Status.
* \retval 0 Success.
* \retval <0 An error occured.
*/
extern long int pcl_configure_usb_clock(void);
//! @}
/*! \name Power Management
*/
//! @{
/*!
* \brief Read the content of the GPLP registers
* \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
*
* \return The content of the chosen GPLP register.
*/
extern unsigned long pcl_read_gplp(unsigned long gplp);
/*!
* \brief Write into the GPLP registers
* \param gplp GPLP register index (0,1,... depending on the number of GPLP registers for a given part)
* \param value Value to write
*/
extern void pcl_write_gplp(unsigned long gplp, unsigned long value);
//! @}
#ifdef __cplusplus
}
#endif
#endif // _POWER_CLOCKS_LIB_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief RTC driver for AVR32 UC3.
*
* AVR32 Real Time Counter driver module.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an RTC and a PM module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include <avr32/io.h>
#include "compiler.h"
#include "pm.h"
#include "rtc.h"
int rtc_is_busy(volatile avr32_rtc_t *rtc)
{
return (rtc->ctrl & AVR32_RTC_CTRL_BUSY_MASK) != 0;
}
int rtc_init(volatile avr32_rtc_t *rtc, unsigned char osc_type, unsigned char psel)
{
// If exit, it means that the configuration has not been set correctly
if (osc_type > (1 << AVR32_RTC_CTRL_CLK32_SIZE) - 1 ||
psel > (1 << AVR32_RTC_CTRL_PSEL_SIZE) - 1)
return 0;
// If we use the 32-kHz oscillator, we have to enable it first
if (osc_type == RTC_OSC_32KHZ)
{
// Select the 32-kHz oscillator crystal
pm_enable_osc32_crystal(&AVR32_PM);
// Enable the 32-kHz clock
pm_enable_clk32_no_wait(&AVR32_PM, AVR32_PM_OSCCTRL32_STARTUP_0_RCOSC);
}
// Wait until the rtc CTRL register is up-to-date
while (rtc_is_busy(rtc));
// Set the new RTC configuration
rtc->ctrl = osc_type << AVR32_RTC_CTRL_CLK32_OFFSET |
psel << AVR32_RTC_CTRL_PSEL_OFFSET |
AVR32_RTC_CTRL_CLKEN_MASK;
// Wait until write is done
while (rtc_is_busy(rtc));
// Set the counter value to 0
rtc_set_value(rtc, 0x00000000);
// Set the top value to 0xFFFFFFFF
rtc_set_top_value(rtc, 0xFFFFFFFF);
return 1;
}
void rtc_set_value(volatile avr32_rtc_t *rtc, unsigned long val)
{
// Wait until we can write into the VAL register
while (rtc_is_busy(rtc));
// Set the new val value
rtc->val = val;
// Wait until write is done
while (rtc_is_busy(rtc));
}
unsigned long rtc_get_value(volatile avr32_rtc_t *rtc)
{
return rtc->val;
}
void rtc_enable_wake_up(volatile avr32_rtc_t *rtc)
{
// Wait until the rtc CTRL register is up-to-date
while (rtc_is_busy(rtc));
// Enable the wake up of the RTC
rtc->ctrl |= AVR32_RTC_CTRL_WAKE_EN_MASK;
// Wait until write is done
while (rtc_is_busy(rtc));
}
void rtc_disable_wake_up(volatile avr32_rtc_t *rtc)
{
// Wait until the rtc CTRL register is up-to-date
while (rtc_is_busy(rtc));
// Disable the wake up of the RTC
rtc->ctrl &= ~AVR32_RTC_CTRL_WAKE_EN_MASK;
// Wait until write is done
while (rtc_is_busy(rtc));
}
void rtc_enable(volatile avr32_rtc_t *rtc)
{
// Wait until the rtc CTRL register is up-to-date
while (rtc_is_busy(rtc));
// Enable the RTC
rtc->ctrl |= AVR32_RTC_CTRL_EN_MASK;
// Wait until write is done
while (rtc_is_busy(rtc));
}
void rtc_disable(volatile avr32_rtc_t *rtc)
{
// Wait until the rtc CTRL register is up-to-date
while (rtc_is_busy(rtc));
// Disable the RTC
rtc->ctrl &= ~AVR32_RTC_CTRL_EN_MASK;
// Wait until write is done
while (rtc_is_busy(rtc));
}
void rtc_enable_interrupt(volatile avr32_rtc_t *rtc)
{
rtc->ier = AVR32_RTC_IER_TOPI_MASK;
}
void rtc_disable_interrupt(volatile avr32_rtc_t *rtc)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
rtc->idr = AVR32_RTC_IDR_TOPI_MASK;
rtc->imr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void rtc_clear_interrupt(volatile avr32_rtc_t *rtc)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
if (global_interrupt_enabled) Disable_global_interrupt();
rtc->icr = AVR32_RTC_ICR_TOPI_MASK;
rtc->isr;
if (global_interrupt_enabled) Enable_global_interrupt();
}
void rtc_set_top_value(volatile avr32_rtc_t *rtc, unsigned long top)
{
// Wait until we can write into the VAL register
while (rtc_is_busy(rtc));
// Set the new val value
rtc->top = top;
// Wait until write is done
while (rtc_is_busy(rtc));
}
unsigned long rtc_get_top_value(volatile avr32_rtc_t *rtc)
{
return rtc->top;
}
int rtc_interrupt_enabled(volatile avr32_rtc_t *rtc)
{
return (rtc->imr & AVR32_RTC_IMR_TOPI_MASK) != 0;
}
int rtc_is_interrupt(volatile avr32_rtc_t *rtc)
{
return (rtc->isr & AVR32_RTC_ISR_TOPI_MASK) != 0;
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief RTC driver for AVR32 UC3.
*
* AVR32 Real Time Counter driver module.
*
* - Compiler: GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an RTC and a PM module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _RTC_H_
#define _RTC_H_
#include "compiler.h"
#include <avr32/io.h>
/*! \name Oscillator Types
*/
//! @{
#define RTC_OSC_32KHZ 1
#define RTC_OSC_RC 0
//! @}
/*! \name Predefined PSEL Values
*/
//! @{
//! The PSEL value to set the RTC source clock (after the prescaler) to 1 Hz,
//! when using an external 32-kHz crystal.
#define RTC_PSEL_32KHZ_1HZ 14
//! The PSEL value to set the RTC source clock (after the prescaler) to 1.76 Hz,
//! when using the internal RC oscillator (~ 115 kHz).
#define RTC_PSEL_RC_1_76HZ 15
//! @}
/*!
* \brief This function will initialise the RTC module.
* If you use the 32 KHz oscillator, it will enable this module.
* This function also set the top value of the RTC to 0xFFFFFFFF
* and the value to 0.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
* \param osc_type The oscillator you want to use. If you need a better
* accuracy, use the 32 KHz oscillator (i.e. RTC_OSC_32KHZ).
* \param psel The preselector value for the corresponding oscillator (4-bits).
* To obtain this value, you can use this formula:
* psel = log(Fosc/Frtc)/log(2)-1, where Fosc is the frequency of the
* oscillator you are using (32 KHz or 115 KHz) and Frtc the frequency
* desired.
* \return 1 if the initialisation succeds otherwize it will return 0.
*/
extern int rtc_init(volatile avr32_rtc_t *rtc, unsigned char osc_type, unsigned char psel);
/*!
* \brief Enable the RTC.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
*/
extern void rtc_enable(volatile avr32_rtc_t *rtc);
/*!
* \brief Disable the RTC.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
*/
extern void rtc_disable(volatile avr32_rtc_t *rtc);
/*!
* \brief Enable the wake up feature of the RTC.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
*/
extern void rtc_enable_wake_up(volatile avr32_rtc_t *rtc);
/*!
* \brief Disable the wake up feature of the RTC.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
*/
extern void rtc_disable_wake_up(volatile avr32_rtc_t *rtc);
/*!
* \brief Enable the interrupt feature of the RTC.
* An interrupt is raised when the value of the RTC
* is equal to its top value.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
*/
extern void rtc_enable_interrupt(volatile avr32_rtc_t *rtc);
/*!
* \brief Disable the interrupt feature of the RTC.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
*/
extern void rtc_disable_interrupt(volatile avr32_rtc_t *rtc);
/*!
* \brief Clear the interrupt flag.
* Call this function once you handled the interrupt.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
*/
extern void rtc_clear_interrupt(volatile avr32_rtc_t *rtc);
/*!
* \brief Get the status of interrupts.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
* \return 1 if the interrupts are enabled otherwize it returns 0.
*/
extern int rtc_interrupt_enabled(volatile avr32_rtc_t *rtc);
/*!
* \brief Check if an interrupt is raised.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
* \return 1 if an interrupt is currently raised otherwize it returns 0.
*/
extern int rtc_is_interrupt(volatile avr32_rtc_t *rtc);
/*!
* \brief This function sets the RTC current top value.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
* \param top The top value you want to store.
*/
extern void rtc_set_top_value(volatile avr32_rtc_t *rtc, unsigned long top);
/*!
* \brief This function returns the RTC current top value.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
* \return The RTC current top value.
*/
extern unsigned long rtc_get_top_value(volatile avr32_rtc_t *rtc);
/*!
* \brief This function checks if the RTC is busy or not.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
* \return 1 if the RTC is busy otherwize it will return 0.
*/
extern int rtc_is_busy(volatile avr32_rtc_t *rtc);
/*!
* \brief This function sets the RTC current value.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
* \param val The value you want to store.
*/
extern void rtc_set_value(volatile avr32_rtc_t *rtc, unsigned long val);
/*!
* \brief This function returns the RTC current value.
* \param rtc Base address of the RTC (i.e. &AVR32_RTC).
* \return The RTC current value.
*/
extern unsigned long rtc_get_value(volatile avr32_rtc_t *rtc);
#endif // _RTC_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief SPI driver for AVR32 UC3.
*
* This file defines a useful set of functions for the SPI interface on AVR32
* devices.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SPI module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include "spi.h"
#ifdef FREERTOS_USED
#include "FreeRTOS.h"
#include "semphr.h"
#endif
/*! \name SPI Writable Bit-Field Registers
*/
//! @{
typedef union
{
unsigned long cr;
avr32_spi_cr_t CR;
} u_avr32_spi_cr_t;
typedef union
{
unsigned long mr;
avr32_spi_mr_t MR;
} u_avr32_spi_mr_t;
typedef union
{
unsigned long tdr;
avr32_spi_tdr_t TDR;
} u_avr32_spi_tdr_t;
typedef union
{
unsigned long ier;
avr32_spi_ier_t IER;
} u_avr32_spi_ier_t;
typedef union
{
unsigned long idr;
avr32_spi_idr_t IDR;
} u_avr32_spi_idr_t;
typedef union
{
unsigned long csr;
avr32_spi_csr0_t CSR;
} u_avr32_spi_csr_t;
//! @}
#ifdef FREERTOS_USED
//! The SPI mutex.
static xSemaphoreHandle xSPIMutex;
#endif
/*! \brief Calculates the baudrate divider.
*
* \param options Pointer to a structure containing initialization options for
* an SPI channel.
* \param pba_hz SPI module input clock frequency (PBA clock, Hz).
*
* \return Divider or error code.
* \retval >=0 Success.
* \retval <0 Error.
*/
static int getBaudDiv(const spi_options_t *options, unsigned int pba_hz)
{
int baudDiv = (pba_hz + options->baudrate / 2) / options->baudrate;
if (baudDiv <= 0 || baudDiv > 255) {
return -1;
}
return baudDiv;
}
void spi_reset(volatile avr32_spi_t *spi)
{
spi->cr = AVR32_SPI_CR_SWRST_MASK;
}
spi_status_t spi_initSlave(volatile avr32_spi_t *spi,
unsigned char bits,
unsigned char spi_mode)
{
if (spi_mode > 3 ||
bits < 8 || bits > 16) {
return SPI_ERROR_ARGUMENT;
}
// Reset.
spi->cr = AVR32_SPI_CR_SWRST_MASK;
// Will use CSR0 offsets; these are the same for CSR0 to CSR3.
spi->csr0 = ((spi_mode >> 1) << AVR32_SPI_CSR0_CPOL_OFFSET) |
(((spi_mode & 0x1) ^ 0x1) << AVR32_SPI_CSR0_NCPHA_OFFSET) |
((bits - 8) << AVR32_SPI_CSR0_BITS_OFFSET);
return SPI_OK;
}
spi_status_t spi_initTest(volatile avr32_spi_t *spi)
{
// Reset.
spi->cr = AVR32_SPI_CR_SWRST_MASK;
spi->mr |= AVR32_SPI_MR_MSTR_MASK | // Master Mode.
AVR32_SPI_MR_LLB_MASK; // Local Loopback.
return SPI_OK;
}
spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options)
{
u_avr32_spi_mr_t u_avr32_spi_mr;
if (options->modfdis > 1) {
return SPI_ERROR_ARGUMENT;
}
// Reset.
spi->cr = AVR32_SPI_CR_SWRST_MASK;
// Master Mode.
u_avr32_spi_mr.mr = spi->mr;
u_avr32_spi_mr.MR.mstr = 1;
u_avr32_spi_mr.MR.modfdis = options->modfdis;
u_avr32_spi_mr.MR.llb = 0;
u_avr32_spi_mr.MR.pcs = (1 << AVR32_SPI_MR_PCS_SIZE) - 1;
spi->mr = u_avr32_spi_mr.mr;
return SPI_OK;
}
spi_status_t spi_selectionMode(volatile avr32_spi_t *spi,
unsigned char variable_ps,
unsigned char pcs_decode,
unsigned char delay)
{
u_avr32_spi_mr_t u_avr32_spi_mr;
if (variable_ps > 1 ||
pcs_decode > 1) {
return SPI_ERROR_ARGUMENT;
}
u_avr32_spi_mr.mr = spi->mr;
u_avr32_spi_mr.MR.ps = variable_ps;
u_avr32_spi_mr.MR.pcsdec = pcs_decode;
u_avr32_spi_mr.MR.dlybcs = delay;
spi->mr = u_avr32_spi_mr.mr;
return SPI_OK;
}
spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip)
{
#ifdef FREERTOS_USED
while (pdFALSE == xSemaphoreTake(xSPIMutex, 20));
#endif
// Assert all lines; no peripheral is selected.
spi->mr |= AVR32_SPI_MR_PCS_MASK;
if (spi->mr & AVR32_SPI_MR_PCSDEC_MASK) {
// The signal is decoded; allow up to 15 chips.
if (chip > 14) {
return SPI_ERROR_ARGUMENT;
}
spi->mr &= ~AVR32_SPI_MR_PCS_MASK | (chip << AVR32_SPI_MR_PCS_OFFSET);
} else {
if (chip > 3) {
return SPI_ERROR_ARGUMENT;
}
spi->mr &= ~(1 << (AVR32_SPI_MR_PCS_OFFSET + chip));
}
return SPI_OK;
}
spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip)
{
unsigned int timeout = SPI_TIMEOUT;
while (!(spi->sr & AVR32_SPI_SR_TXEMPTY_MASK)) {
if (!timeout--) {
return SPI_ERROR_TIMEOUT;
}
}
// Assert all lines; no peripheral is selected.
spi->mr |= AVR32_SPI_MR_PCS_MASK;
// Last transfer, so deassert the current NPCS if CSAAT is set.
spi->cr = AVR32_SPI_CR_LASTXFER_MASK;
#ifdef FREERTOS_USED
xSemaphoreGive(xSPIMutex);
#endif
return SPI_OK;
}
spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi,
const spi_options_t *options,
unsigned int pba_hz)
{
u_avr32_spi_csr_t u_avr32_spi_csr;
if (options->spi_mode > 3 ||
options->stay_act > 1 ||
options->bits < 8 || options->bits > 16) {
return SPI_ERROR_ARGUMENT;
}
int baudDiv = getBaudDiv(options, pba_hz);
if (baudDiv < 0) {
return SPI_ERROR_ARGUMENT;
}
// Will use CSR0 offsets; these are the same for CSR0 to CSR3.
u_avr32_spi_csr.csr = 0;
u_avr32_spi_csr.CSR.cpol = options->spi_mode >> 1;
u_avr32_spi_csr.CSR.ncpha = (options->spi_mode & 0x1) ^ 0x1;
u_avr32_spi_csr.CSR.csaat = options->stay_act;
u_avr32_spi_csr.CSR.bits = options->bits - 8;
u_avr32_spi_csr.CSR.scbr = baudDiv;
u_avr32_spi_csr.CSR.dlybs = options->spck_delay;
u_avr32_spi_csr.CSR.dlybct = options->trans_delay;
switch(options->reg) {
case 0:
spi->csr0 = u_avr32_spi_csr.csr;
break;
case 1:
spi->csr1 = u_avr32_spi_csr.csr;
break;
case 2:
spi->csr2 = u_avr32_spi_csr.csr;
break;
case 3:
spi->csr3 = u_avr32_spi_csr.csr;
break;
default:
return SPI_ERROR_ARGUMENT;
}
#ifdef FREERTOS_USED
if (!xSPIMutex)
{
// Create the SPI mutex.
vSemaphoreCreateBinary(xSPIMutex);
if (!xSPIMutex)
{
while(1);
}
}
#endif
return SPI_OK;
}
void spi_enable(volatile avr32_spi_t *spi)
{
spi->cr = AVR32_SPI_CR_SPIEN_MASK;
}
void spi_disable(volatile avr32_spi_t *spi)
{
spi->cr = AVR32_SPI_CR_SPIDIS_MASK;
}
int spi_is_enabled(volatile avr32_spi_t *spi)
{
return (spi->sr & AVR32_SPI_SR_SPIENS_MASK) != 0;
}
inline unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi)
{
return ((spi->sr & AVR32_SPI_SR_TDRE_MASK) != 0);
}
inline spi_status_t spi_write(volatile avr32_spi_t *spi, unsigned short data)
{
unsigned int timeout = SPI_TIMEOUT;
while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) {
if (!timeout--) {
return SPI_ERROR_TIMEOUT;
}
}
spi->tdr = data << AVR32_SPI_TDR_TD_OFFSET;
return SPI_OK;
}
spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi, unsigned short data,
unsigned char pcs, unsigned char lastxfer)
{
unsigned int timeout = SPI_TIMEOUT;
if (pcs > 14 || lastxfer > 1) {
return SPI_ERROR_ARGUMENT;
}
while (!(spi->sr & AVR32_SPI_SR_TDRE_MASK)) {
if (!timeout--) {
return SPI_ERROR_TIMEOUT;
}
}
spi->tdr = (data << AVR32_SPI_TDR_TD_OFFSET) |
(pcs << AVR32_SPI_TDR_PCS_OFFSET) |
(lastxfer << AVR32_SPI_TDR_LASTXFER_OFFSET);
return SPI_OK;
}
inline unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi)
{
return ((spi->sr & AVR32_SPI_SR_TXEMPTY_MASK) != 0);
}
unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi)
{
return ((spi->sr & AVR32_SPI_SR_RDRF_MASK) != 0);
}
inline spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data)
{
unsigned int timeout = SPI_TIMEOUT;
while ((spi->sr & (AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) !=
(AVR32_SPI_SR_RDRF_MASK | AVR32_SPI_SR_TXEMPTY_MASK)) {
if (!timeout--) {
return SPI_ERROR_TIMEOUT;
}
}
*data = spi->rdr >> AVR32_SPI_RDR_RD_OFFSET;
return SPI_OK;
}
unsigned char spi_getStatus(volatile avr32_spi_t *spi)
{
spi_status_t ret = SPI_OK;
unsigned long sr = spi->sr;
if (sr & AVR32_SPI_SR_OVRES_MASK) {
ret = SPI_ERROR_OVERRUN;
}
if (sr & AVR32_SPI_SR_MODF_MASK) {
ret += SPI_ERROR_MODE_FAULT;
}
if (ret == (SPI_ERROR_OVERRUN + SPI_ERROR_MODE_FAULT)) {
return SPI_ERROR_OVERRUN_AND_MODE_FAULT;
}
else if (ret > 0) {
return ret;
} else {
return SPI_OK;
}
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief SPI driver for AVR32 UC3.
*
* This file defines a useful set of functions for the SPI interface on AVR32
* devices.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with an SPI module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _SPI_H_
#define _SPI_H_
#include <avr32/io.h>
//! Time-out value (number of attempts).
#define SPI_TIMEOUT 10000
//! Status codes used by the SPI driver.
typedef enum
{
SPI_ERROR = -1,
SPI_OK = 0,
SPI_ERROR_TIMEOUT = 1,
SPI_ERROR_ARGUMENT,
SPI_ERROR_OVERRUN,
SPI_ERROR_MODE_FAULT,
SPI_ERROR_OVERRUN_AND_MODE_FAULT
} spi_status_t;
//! Option structure for SPI channels.
typedef struct
{
//! The SPI channel to set up.
unsigned char reg;
//! Preferred baudrate for the SPI.
unsigned int baudrate;
//! Number of bits in each character (8 to 16).
unsigned char bits;
//! Delay before first clock pulse after selecting slave (in PBA clock periods).
unsigned char spck_delay;
//! Delay between each transfer/character (in PBA clock periods).
unsigned char trans_delay;
//! Sets this chip to stay active after last transfer to it.
unsigned char stay_act;
//! Which SPI mode to use when transmitting.
unsigned char spi_mode;
//! Disables the mode fault detection.
//! With this bit cleared, the SPI master mode will disable itself if another
//! master tries to address it.
unsigned char modfdis;
} spi_options_t;
/*! \brief Resets the SPI controller.
*
* \param spi Base address of the SPI instance.
*/
extern void spi_reset(volatile avr32_spi_t *spi);
/*! \brief Initializes the SPI in slave mode.
*
* \param spi Base address of the SPI instance.
* \param bits Number of bits in each transmitted character (8 to 16).
* \param spi_mode Clock polarity and phase.
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
*/
extern spi_status_t spi_initSlave(volatile avr32_spi_t *spi,
unsigned char bits,
unsigned char spi_mode);
/*! \brief Sets up the SPI in a test mode where the transmitter is connected to
* the receiver (local loopback).
*
* \param spi Base address of the SPI instance.
*
* \return Status.
* \retval SPI_OK Success.
*/
extern spi_status_t spi_initTest(volatile avr32_spi_t *spi);
/*! \brief Initializes the SPI in master mode.
*
* \param spi Base address of the SPI instance.
* \param options Pointer to a structure containing initialization options.
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
*/
extern spi_status_t spi_initMaster(volatile avr32_spi_t *spi, const spi_options_t *options);
/*! \brief Sets up how and when the slave chips are selected (master mode only).
*
* \param spi Base address of the SPI instance.
* \param variable_ps Target slave is selected in transfer register for every
* character to transmit.
* \param pcs_decode The four chip select lines are decoded externally. Values
* 0 to 14 can be given to \ref spi_selectChip.
* \param delay Delay in PBA periods between chip selects.
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
*/
extern spi_status_t spi_selectionMode(volatile avr32_spi_t *spi,
unsigned char variable_ps,
unsigned char pcs_decode,
unsigned char delay);
/*! \brief Selects slave chip.
*
* \param spi Base address of the SPI instance.
* \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0
* to 14).
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
*/
extern spi_status_t spi_selectChip(volatile avr32_spi_t *spi, unsigned char chip);
/*! \brief Unselects slave chip.
*
* \param spi Base address of the SPI instance.
* \param chip Slave chip number (normal: 0 to 3, extarnally decoded signal: 0
* to 14).
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_TIMEOUT Time-out.
*
* \note Will block program execution until time-out occurs if last transmission
* is not complete. Invoke \ref spi_writeEndCheck beforehand if needed.
*/
extern spi_status_t spi_unselectChip(volatile avr32_spi_t *spi, unsigned char chip);
/*! \brief Sets options for a specific slave chip.
*
* The baudrate field has to be written before transfer in master mode. Four
* similar registers exist, one for each slave. When using encoded slave
* addressing, reg=0 sets options for slaves 0 to 3, reg=1 for slaves 4 to 7 and
* so on.
*
* \param spi Base address of the SPI instance.
* \param options Pointer to a structure containing initialization options for
* an SPI channel.
* \param pba_hz SPI module input clock frequency (PBA clock, Hz).
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
*/
extern spi_status_t spi_setupChipReg(volatile avr32_spi_t *spi,
const spi_options_t *options,
unsigned int pba_hz);
/*! \brief Enables the SPI.
*
* \param spi Base address of the SPI instance.
*/
extern void spi_enable(volatile avr32_spi_t *spi);
/*! \brief Disables the SPI.
*
* Ensures that nothing is transferred while setting up buffers.
*
* \param spi Base address of the SPI instance.
*
* \warning This may cause data loss if used on a slave SPI.
*/
extern void spi_disable(volatile avr32_spi_t *spi);
/*! \brief Tests if the SPI is enabled.
*
* \param spi Base address of the SPI instance.
*
* \return \c 1 if the SPI is enabled, otherwise \c 0.
*/
extern int spi_is_enabled(volatile avr32_spi_t *spi);
/*! \brief Checks if there is no data in the transmit register.
*
* \param spi Base address of the SPI instance.
*
* \return Status.
* \retval 1 No data in TDR.
* \retval 0 Some data in TDR.
*/
extern unsigned char spi_writeRegisterEmptyCheck(volatile avr32_spi_t *spi);
/*! \brief Writes one data word in master fixed peripheral select mode or in
* slave mode.
*
* \param spi Base address of the SPI instance.
* \param data The data word to write.
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_TIMEOUT Time-out.
*
* \note Will block program execution until time-out occurs if transmitter is
* busy and transmit buffer is full. Invoke
* \ref spi_writeRegisterEmptyCheck beforehand if needed.
*
* \note Once the data has been written to the transmit buffer, the end of
* transmission is not waited for. Invoke \ref spi_writeEndCheck if
* needed.
*/
extern spi_status_t spi_write(volatile avr32_spi_t *spi, unsigned short data);
/*! \brief Selects a slave in master variable peripheral select mode and writes
* one data word to it.
*
* \param spi Base address of the SPI instance.
* \param data The data word to write.
* \param pcs Slave selector (bit 0 -> nCS line 0, bit 1 -> nCS line 1,
* etc.).
* \param lastxfer Boolean indicating whether this is the last data word
* transfer.
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_TIMEOUT Time-out.
* \retval SPI_ERROR_ARGUMENT Invalid argument(s) passed.
*
* \note Will block program execution until time-out occurs if transmitter is
* busy and transmit buffer is full. Invoke
* \ref spi_writeRegisterEmptyCheck beforehand if needed.
*
* \note Once the data has been written to the transmit buffer, the end of
* transmission is not waited for. Invoke \ref spi_writeEndCheck if
* needed.
*/
extern spi_status_t spi_variableSlaveWrite(volatile avr32_spi_t *spi,
unsigned short data,
unsigned char pcs,
unsigned char lastxfer);
/*! \brief Checks if all transmissions are complete.
*
* \param spi Base address of the SPI instance.
*
* \return Status.
* \retval 1 All transmissions complete.
* \retval 0 Transmissions not complete.
*/
extern unsigned char spi_writeEndCheck(volatile avr32_spi_t *spi);
/*! \brief Checks if there is data in the receive register.
*
* \param spi Base address of the SPI instance.
*
* \return Status.
* \retval 1 Some data in RDR.
* \retval 0 No data in RDR.
*/
extern unsigned char spi_readRegisterFullCheck(volatile avr32_spi_t *spi);
/*! \brief Reads one data word in master mode or in slave mode.
*
* \param spi Base address of the SPI instance.
* \param data Pointer to the location where to store the received data word.
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_TIMEOUT Time-out.
*
* \note Will block program execution until time-out occurs if no data is
* received or last transmission is not complete. Invoke
* \ref spi_writeEndCheck or \ref spi_readRegisterFullCheck beforehand if
* needed.
*/
extern spi_status_t spi_read(volatile avr32_spi_t *spi, unsigned short *data);
/*! \brief Gets status information from the SPI.
*
* \param spi Base address of the SPI instance.
*
* \return Status.
* \retval SPI_OK Success.
* \retval SPI_ERROR_OVERRUN Overrun error.
* \retval SPI_ERROR_MODE_FAULT Mode fault (SPI addressed as slave
* while in master mode).
* \retval SPI_ERROR_OVERRUN_AND_MODE_FAULT Overrun error and mode fault.
*/
extern unsigned char spi_getStatus(volatile avr32_spi_t *spi);
#endif // _SPI_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief TC driver for AVR32 UC3.
*
* AVR32 Timer/Counter driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a TC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include <avr32/io.h>
#include "compiler.h"
#include "tc.h"
int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return tc->channel[channel].imr;
}
int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// Enable the appropriate interrupts.
tc->channel[channel].ier = bitfield->etrgs << AVR32_TC_ETRGS_OFFSET |
bitfield->ldrbs << AVR32_TC_LDRBS_OFFSET |
bitfield->ldras << AVR32_TC_LDRAS_OFFSET |
bitfield->cpcs << AVR32_TC_CPCS_OFFSET |
bitfield->cpbs << AVR32_TC_CPBS_OFFSET |
bitfield->cpas << AVR32_TC_CPAS_OFFSET |
bitfield->lovrs << AVR32_TC_LOVRS_OFFSET |
bitfield->covfs << AVR32_TC_COVFS_OFFSET;
// Disable the appropriate interrupts.
if (global_interrupt_enabled) Disable_global_interrupt();
tc->channel[channel].idr = (~bitfield->etrgs & 1) << AVR32_TC_ETRGS_OFFSET |
(~bitfield->ldrbs & 1) << AVR32_TC_LDRBS_OFFSET |
(~bitfield->ldras & 1) << AVR32_TC_LDRAS_OFFSET |
(~bitfield->cpcs & 1) << AVR32_TC_CPCS_OFFSET |
(~bitfield->cpbs & 1) << AVR32_TC_CPBS_OFFSET |
(~bitfield->cpas & 1) << AVR32_TC_CPAS_OFFSET |
(~bitfield->lovrs & 1) << AVR32_TC_LOVRS_OFFSET |
(~bitfield->covfs & 1) << AVR32_TC_COVFS_OFFSET;
tc->channel[channel].sr;
if (global_interrupt_enabled) Enable_global_interrupt();
return 0;
}
int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS || ext_clk_sig_src >= 1 << AVR32_TC_BMR_TC0XC0S_SIZE)
return TC_INVALID_ARGUMENT;
// Clear bit-field and set the correct behavior.
tc->bmr = (tc->bmr & ~(AVR32_TC_BMR_TC0XC0S_MASK << (channel * AVR32_TC_BMR_TC0XC0S_SIZE))) |
(ext_clk_sig_src << (channel * AVR32_TC_BMR_TC0XC0S_SIZE));
return 0;
}
int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt)
{
// Check for valid input.
if (opt->channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// MEASURE SIGNALS: Capture operating mode.
tc->channel[opt->channel].cmr = opt->ldrb << AVR32_TC_LDRB_OFFSET |
opt->ldra << AVR32_TC_LDRA_OFFSET |
0 << AVR32_TC_WAVE_OFFSET |
opt->cpctrg << AVR32_TC_CPCTRG_OFFSET |
opt->abetrg << AVR32_TC_ABETRG_OFFSET |
opt->etrgedg << AVR32_TC_ETRGEDG_OFFSET|
opt->ldbdis << AVR32_TC_LDBDIS_OFFSET |
opt->ldbstop << AVR32_TC_LDBSTOP_OFFSET |
opt->burst << AVR32_TC_BURST_OFFSET |
opt->clki << AVR32_TC_CLKI_OFFSET |
opt->tcclks << AVR32_TC_TCCLKS_OFFSET;
return 0;
}
int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt)
{
// Check for valid input.
if (opt->channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// GENERATE SIGNALS: Waveform operating mode.
tc->channel[opt->channel].cmr = opt->bswtrg << AVR32_TC_BSWTRG_OFFSET |
opt->beevt << AVR32_TC_BEEVT_OFFSET |
opt->bcpc << AVR32_TC_BCPC_OFFSET |
opt->bcpb << AVR32_TC_BCPB_OFFSET |
opt->aswtrg << AVR32_TC_ASWTRG_OFFSET |
opt->aeevt << AVR32_TC_AEEVT_OFFSET |
opt->acpc << AVR32_TC_ACPC_OFFSET |
opt->acpa << AVR32_TC_ACPA_OFFSET |
1 << AVR32_TC_WAVE_OFFSET |
opt->wavsel << AVR32_TC_WAVSEL_OFFSET |
opt->enetrg << AVR32_TC_ENETRG_OFFSET |
opt->eevt << AVR32_TC_EEVT_OFFSET |
opt->eevtedg << AVR32_TC_EEVTEDG_OFFSET |
opt->cpcdis << AVR32_TC_CPCDIS_OFFSET |
opt->cpcstop << AVR32_TC_CPCSTOP_OFFSET |
opt->burst << AVR32_TC_BURST_OFFSET |
opt->clki << AVR32_TC_CLKI_OFFSET |
opt->tcclks << AVR32_TC_TCCLKS_OFFSET;
return 0;
}
int tc_start(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// Enable, reset and start the selected timer/counter channel.
tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK | AVR32_TC_CLKEN_MASK;
return 0;
}
int tc_stop(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// Disable the selected timer/counter channel.
tc->channel[channel].ccr = AVR32_TC_CLKDIS_MASK;
return 0;
}
int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// Reset the selected timer/counter channel.
tc->channel[channel].ccr = AVR32_TC_SWTRG_MASK;
return 0;
}
void tc_sync_trigger(volatile avr32_tc_t *tc)
{
// Reset all channels of the selected timer/counter.
tc->bcr = AVR32_TC_BCR_SYNC_MASK;
}
void tc_sync_start(volatile avr32_tc_t *tc)
{
unsigned int i;
// Enable the clock for each channel.
for(i=0; i<TC_NUMBER_OF_CHANNELS;i++)
tc->channel[i].ccr = AVR32_TC_CLKEN_MASK;
// Reset all channels of the selected timer/counter.
tc->bcr = AVR32_TC_BCR_SYNC_MASK;
}
int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return tc->channel[channel].sr;
}
int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return Rd_bitfield(tc->channel[channel].cv, AVR32_TC_CV_MASK);
}
int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return Rd_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK);
}
int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return Rd_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK);
}
int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
return Rd_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK);
}
int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// This function is only available in WAVEFORM mode.
if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
Wr_bitfield(tc->channel[channel].ra, AVR32_TC_RA_MASK, value);
return value;
}
int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// This function is only available in WAVEFORM mode.
if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
Wr_bitfield(tc->channel[channel].rb, AVR32_TC_RB_MASK, value);
return value;
}
int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value)
{
// Check for valid input.
if (channel >= TC_NUMBER_OF_CHANNELS)
return TC_INVALID_ARGUMENT;
// This function is only available in WAVEFORM mode.
if (Tst_bits(tc->channel[channel].cmr, AVR32_TC_WAVE_MASK))
Wr_bitfield(tc->channel[channel].rc, AVR32_TC_RC_MASK, value);
return value;
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief Timer/Counter driver for AVR32 UC3.
*
* AVR32 Timer/Counter driver module.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a TC module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _TC_H_
#define _TC_H_
#include <avr32/io.h>
//! TC driver functions return value in case of invalid argument(s).
#define TC_INVALID_ARGUMENT (-1)
//! Number of timer/counter channels.
#define TC_NUMBER_OF_CHANNELS (sizeof(((avr32_tc_t *)0)->channel) / sizeof(avr32_tc_channel_t))
/*! \name External Clock Signal 0 Selection
*/
//! @{
#define TC_CH0_EXT_CLK0_SRC_TCLK0 AVR32_TC_TC0XC0S_TCLK0
#define TC_CH0_EXT_CLK0_SRC_NO_CLK AVR32_TC_TC0XC0S_NO_CLK
#define TC_CH0_EXT_CLK0_SRC_TIOA1 AVR32_TC_TC0XC0S_TIOA1
#define TC_CH0_EXT_CLK0_SRC_TIOA2 AVR32_TC_TC0XC0S_TIOA2
//! @}
/*! \name External Clock Signal 1 Selection
*/
//! @{
#define TC_CH1_EXT_CLK1_SRC_TCLK1 AVR32_TC_TC1XC1S_TCLK1
#define TC_CH1_EXT_CLK1_SRC_NO_CLK AVR32_TC_TC1XC1S_NO_CLK
#define TC_CH1_EXT_CLK1_SRC_TIOA0 AVR32_TC_TC1XC1S_TIOA0
#define TC_CH1_EXT_CLK1_SRC_TIOA2 AVR32_TC_TC1XC1S_TIOA2
//! @}
/*! \name External Clock Signal 2 Selection
*/
//! @{
#define TC_CH2_EXT_CLK2_SRC_TCLK2 AVR32_TC_TC2XC2S_TCLK2
#define TC_CH2_EXT_CLK2_SRC_NO_CLK AVR32_TC_TC2XC2S_NO_CLK
#define TC_CH2_EXT_CLK2_SRC_TIOA0 AVR32_TC_TC2XC2S_TIOA0
#define TC_CH2_EXT_CLK2_SRC_TIOA1 AVR32_TC_TC2XC2S_TIOA1
//! @}
/*! \name Event/Trigger Actions on Output
*/
//! @{
#define TC_EVT_EFFECT_NOOP AVR32_TC_NONE
#define TC_EVT_EFFECT_SET AVR32_TC_SET
#define TC_EVT_EFFECT_CLEAR AVR32_TC_CLEAR
#define TC_EVT_EFFECT_TOGGLE AVR32_TC_TOGGLE
//! @}
/*! \name RC Compare Trigger Enable
*/
//! @{
#define TC_NO_TRIGGER_COMPARE_RC 0
#define TC_TRIGGER_COMPARE_RC 1
//! @}
/*! \name Waveform Selection
*/
//! @{
#define TC_WAVEFORM_SEL_UP_MODE AVR32_TC_WAVSEL_UP_NO_AUTO
#define TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UP_AUTO
#define TC_WAVEFORM_SEL_UPDOWN_MODE AVR32_TC_WAVSEL_UPDOWN_NO_AUTO
#define TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER AVR32_TC_WAVSEL_UPDOWN_AUTO
//! @}
/*! \name TIOA or TIOB External Trigger Selection
*/
//! @{
#define TC_EXT_TRIG_SEL_TIOA 1
#define TC_EXT_TRIG_SEL_TIOB 0
//! @}
/*! \name External Event Selection
*/
//! @{
#define TC_EXT_EVENT_SEL_TIOB_INPUT AVR32_TC_EEVT_TIOB_INPUT
#define TC_EXT_EVENT_SEL_XC0_OUTPUT AVR32_TC_EEVT_XC0_OUTPUT
#define TC_EXT_EVENT_SEL_XC1_OUTPUT AVR32_TC_EEVT_XC1_OUTPUT
#define TC_EXT_EVENT_SEL_XC2_OUTPUT AVR32_TC_EEVT_XC2_OUTPUT
//! @}
/*! \name Edge Selection
*/
//! @{
#define TC_SEL_NO_EDGE AVR32_TC_EEVTEDG_NO_EDGE
#define TC_SEL_RISING_EDGE AVR32_TC_EEVTEDG_POS_EDGE
#define TC_SEL_FALLING_EDGE AVR32_TC_EEVTEDG_NEG_EDGE
#define TC_SEL_EACH_EDGE AVR32_TC_EEVTEDG_BOTH_EDGES
//! @}
/*! \name Burst Signal Selection
*/
//! @{
#define TC_BURST_NOT_GATED AVR32_TC_BURST_NOT_GATED
#define TC_BURST_CLK_AND_XC0 AVR32_TC_BURST_CLK_AND_XC0
#define TC_BURST_CLK_AND_XC1 AVR32_TC_BURST_CLK_AND_XC1
#define TC_BURST_CLK_AND_XC2 AVR32_TC_BURST_CLK_AND_XC2
//! @}
/*! \name Clock Invert
*/
//! @{
#define TC_CLOCK_RISING_EDGE 0
#define TC_CLOCK_FALLING_EDGE 1
//! @}
/*! \name Clock Selection
*/
//! @{
#define TC_CLOCK_SOURCE_TC1 AVR32_TC_TCCLKS_TIMER_CLOCK1
#define TC_CLOCK_SOURCE_TC2 AVR32_TC_TCCLKS_TIMER_CLOCK2
#define TC_CLOCK_SOURCE_TC3 AVR32_TC_TCCLKS_TIMER_CLOCK3
#define TC_CLOCK_SOURCE_TC4 AVR32_TC_TCCLKS_TIMER_CLOCK4
#define TC_CLOCK_SOURCE_TC5 AVR32_TC_TCCLKS_TIMER_CLOCK5
#define TC_CLOCK_SOURCE_XC0 AVR32_TC_TCCLKS_XC0
#define TC_CLOCK_SOURCE_XC1 AVR32_TC_TCCLKS_XC1
#define TC_CLOCK_SOURCE_XC2 AVR32_TC_TCCLKS_XC2
//! @}
//! Timer/counter interrupts.
typedef struct
{
unsigned int :24;
//! External trigger interrupt.
unsigned int etrgs : 1;
//! RB load interrupt.
unsigned int ldrbs : 1;
//! RA load interrupt.
unsigned int ldras : 1;
//! RC compare interrupt.
unsigned int cpcs : 1;
//! RB compare interrupt.
unsigned int cpbs : 1;
//! RA compare interrupt.
unsigned int cpas : 1;
//! Load overrun interrupt.
unsigned int lovrs : 1;
//! Counter overflow interrupt.
unsigned int covfs : 1;
} tc_interrupt_t;
//! Parameters when initializing a timer/counter in capture mode.
typedef struct
{
//! Channel to initialize.
unsigned int channel ;
unsigned int :12;
//! RB loading selection:\n
//! - \ref TC_SEL_NO_EDGE;\n
//! - \ref TC_SEL_RISING_EDGE;\n
//! - \ref TC_SEL_FALLING_EDGE;\n
//! - \ref TC_SEL_EACH_EDGE.
unsigned int ldrb : 2;
//! RA loading selection:\n
//! - \ref TC_SEL_NO_EDGE;\n
//! - \ref TC_SEL_RISING_EDGE;\n
//! - \ref TC_SEL_FALLING_EDGE;\n
//! - \ref TC_SEL_EACH_EDGE.
unsigned int ldra : 2;
unsigned int : 1;
//! RC compare trigger enable:\n
//! - \ref TC_NO_TRIGGER_COMPARE_RC;\n
//! - \ref TC_TRIGGER_COMPARE_RC.
unsigned int cpctrg : 1;
unsigned int : 3;
//! TIOA or TIOB external trigger selection:\n
//! - \ref TC_EXT_TRIG_SEL_TIOA;\n
//! - \ref TC_EXT_TRIG_SEL_TIOB.
unsigned int abetrg : 1;
//! External trigger edge selection:\n
//! - \ref TC_SEL_NO_EDGE;\n
//! - \ref TC_SEL_RISING_EDGE;\n
//! - \ref TC_SEL_FALLING_EDGE;\n
//! - \ref TC_SEL_EACH_EDGE.
unsigned int etrgedg : 2;
//! Counter clock disable with RB loading:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int ldbdis : 1;
//! Counter clock stopped with RB loading:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int ldbstop : 1;
//! Burst signal selection:\n
//! - \ref TC_BURST_NOT_GATED;\n
//! - \ref TC_BURST_CLK_AND_XC0;\n
//! - \ref TC_BURST_CLK_AND_XC1;\n
//! - \ref TC_BURST_CLK_AND_XC2.
unsigned int burst : 2;
//! Clock invert:\n
//! - \ref TC_CLOCK_RISING_EDGE;\n
//! - \ref TC_CLOCK_FALLING_EDGE.
unsigned int clki : 1;
//! Clock selection:\n
//! - \ref TC_CLOCK_SOURCE_TC1;\n
//! - \ref TC_CLOCK_SOURCE_TC2;\n
//! - \ref TC_CLOCK_SOURCE_TC3;\n
//! - \ref TC_CLOCK_SOURCE_TC4;\n
//! - \ref TC_CLOCK_SOURCE_TC5;\n
//! - \ref TC_CLOCK_SOURCE_XC0;\n
//! - \ref TC_CLOCK_SOURCE_XC1;\n
//! - \ref TC_CLOCK_SOURCE_XC2.
unsigned int tcclks : 3;
} tc_capture_opt_t;
//! Parameters when initializing a timer/counter in waveform mode.
typedef struct
{
//! Channel to initialize.
unsigned int channel ;
//! Software trigger effect on TIOB:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int bswtrg : 2;
//! External event effect on TIOB:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int beevt : 2;
//! RC compare effect on TIOB:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int bcpc : 2;
//! RB compare effect on TIOB:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int bcpb : 2;
//! Software trigger effect on TIOA:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int aswtrg : 2;
//! External event effect on TIOA:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int aeevt : 2;
//! RC compare effect on TIOA:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int acpc : 2;
//! RA compare effect on TIOA:\n
//! - \ref TC_EVT_EFFECT_NOOP;\n
//! - \ref TC_EVT_EFFECT_SET;\n
//! - \ref TC_EVT_EFFECT_CLEAR;\n
//! - \ref TC_EVT_EFFECT_TOGGLE.
unsigned int acpa : 2;
unsigned int : 1;
//! Waveform selection:\n
//! - \ref TC_WAVEFORM_SEL_UP_MODE;\n
//! - \ref TC_WAVEFORM_SEL_UP_MODE_RC_TRIGGER;\n
//! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE;\n
//! - \ref TC_WAVEFORM_SEL_UPDOWN_MODE_RC_TRIGGER.
unsigned int wavsel : 2;
//! External event trigger enable:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int enetrg : 1;
//! External event selection:\n
//! - \ref TC_EXT_EVENT_SEL_TIOB_INPUT;\n
//! - \ref TC_EXT_EVENT_SEL_XC0_OUTPUT;\n
//! - \ref TC_EXT_EVENT_SEL_XC1_OUTPUT;\n
//! - \ref TC_EXT_EVENT_SEL_XC2_OUTPUT.
unsigned int eevt : 2;
//! External event edge selection:\n
//! - \ref TC_SEL_NO_EDGE;\n
//! - \ref TC_SEL_RISING_EDGE;\n
//! - \ref TC_SEL_FALLING_EDGE;\n
//! - \ref TC_SEL_EACH_EDGE.
unsigned int eevtedg : 2;
//! Counter clock disable with RC compare:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int cpcdis : 1;
//! Counter clock stopped with RC compare:\n
//! - \c FALSE;\n
//! - \c TRUE.
unsigned int cpcstop : 1;
//! Burst signal selection:\n
//! - \ref TC_BURST_NOT_GATED;\n
//! - \ref TC_BURST_CLK_AND_XC0;\n
//! - \ref TC_BURST_CLK_AND_XC1;\n
//! - \ref TC_BURST_CLK_AND_XC2.
unsigned int burst : 2;
//! Clock invert:\n
//! - \ref TC_CLOCK_RISING_EDGE;\n
//! - \ref TC_CLOCK_FALLING_EDGE.
unsigned int clki : 1;
//! Clock selection:\n
//! - \ref TC_CLOCK_SOURCE_TC1;\n
//! - \ref TC_CLOCK_SOURCE_TC2;\n
//! - \ref TC_CLOCK_SOURCE_TC3;\n
//! - \ref TC_CLOCK_SOURCE_TC4;\n
//! - \ref TC_CLOCK_SOURCE_TC5;\n
//! - \ref TC_CLOCK_SOURCE_XC0;\n
//! - \ref TC_CLOCK_SOURCE_XC1;\n
//! - \ref TC_CLOCK_SOURCE_XC2.
unsigned int tcclks : 3;
} tc_waveform_opt_t;
/*! \brief Reads timer/counter interrupt settings.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 The interrupt enable configuration organized according to \ref tc_interrupt_t.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_get_interrupt_settings(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Enables various timer/counter interrupts.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param bitfield The interrupt enable configuration.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_configure_interrupts(volatile avr32_tc_t *tc, unsigned int channel, const tc_interrupt_t *bitfield);
/*! \brief Selects which external clock to use and how to configure it.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param ext_clk_sig_src External clock signal selection:
* \arg \c TC_CH0_EXT_CLK0_SRC_TCLK0;
* \arg \c TC_CH0_EXT_CLK0_SRC_NO_CLK;
* \arg \c TC_CH0_EXT_CLK0_SRC_TIOA1;
* \arg \c TC_CH0_EXT_CLK0_SRC_TIOA2;
* \arg \c TC_CH1_EXT_CLK1_SRC_TCLK1;
* \arg \c TC_CH1_EXT_CLK1_SRC_NO_CLK;
* \arg \c TC_CH1_EXT_CLK1_SRC_TIOA0;
* \arg \c TC_CH1_EXT_CLK1_SRC_TIOA2;
* \arg \c TC_CH2_EXT_CLK2_SRC_TCLK2;
* \arg \c TC_CH2_EXT_CLK2_SRC_NO_CLK;
* \arg \c TC_CH2_EXT_CLK2_SRC_TIOA0;
* \arg \c TC_CH2_EXT_CLK2_SRC_TIOA1.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_select_external_clock(volatile avr32_tc_t *tc, unsigned int channel, unsigned int ext_clk_sig_src);
/*! \brief Sets options for timer/counter capture initialization.
*
* \param tc Pointer to the TC instance to access.
* \param opt Options for capture mode.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_init_capture(volatile avr32_tc_t *tc, const tc_capture_opt_t *opt);
/*! \brief Sets options for timer/counter waveform initialization.
*
* \param tc Pointer to the TC instance to access.
* \param opt Options for waveform generation.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_init_waveform(volatile avr32_tc_t *tc, const tc_waveform_opt_t *opt);
/*! \brief Starts a timer/counter.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_start(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Stops a timer/counter.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_stop(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Performs a software trigger: the counter is reset and the clock is started.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval 0 Success.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_software_trigger(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Asserts a SYNC signal to generate a software trigger and reset all channels.
*
* \param tc Pointer to the TC instance to access.
*/
extern void tc_sync_trigger(volatile avr32_tc_t *tc);
/*! \brief Start all TC channels simultaneously.
*
* \param tc Pointer to the TC instance to access.
*/
extern void tc_sync_start(volatile avr32_tc_t *tc);
/*! \brief Reads the status register.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 Status register value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_sr(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Reads the channel's TC counter and returns the value.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 TC counter value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_tc(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Reads the channel's RA register and returns the value.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 RA register value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_ra(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Reads the channel's RB register and returns the value.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 RB register value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_rb(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Reads the channel's RC register and returns the value.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
*
* \retval >=0 RC register value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_read_rc(volatile avr32_tc_t *tc, unsigned int channel);
/*! \brief Writes a value to the channel's RA register.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param value Value to write to the RA register.
*
* \retval >=0 Written value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_write_ra(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
/*! \brief Writes a value to the channel's RB register.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param value Value to write to the RB register.
*
* \retval >=0 Written value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_write_rb(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
/*! \brief Writes a value to the channel's RC register.
*
* \param tc Pointer to the TC instance to access.
* \param channel The TC instance channel to access.
* \param value Value to write to the RC register.
*
* \retval >=0 Written value.
* \retval TC_INVALID_ARGUMENT Invalid argument(s).
*/
extern int tc_write_rc(volatile avr32_tc_t *tc, unsigned int channel, unsigned short value);
#endif // _TC_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief USART driver for AVR32 UC3.
*
* This file contains basic functions for the AVR32 USART, with support for all
* modes, settings and clock speeds.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a USART module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#include "compiler.h"
#include "usart.h"
//------------------------------------------------------------------------------
/*! \name Private Functions
*/
//! @{
/*! \brief Checks if the USART is in multidrop mode.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if the USART is in multidrop mode, otherwise \c 0.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
static __inline__ int usart_mode_is_multidrop(volatile avr32_usart_t *usart)
{
return ((usart->mr >> AVR32_USART_MR_PAR_OFFSET) & AVR32_USART_MR_PAR_MULTI) == AVR32_USART_MR_PAR_MULTI;
}
/*! \brief Calculates a clock divider (\e CD) and a fractional part (\e FP) for
* the USART asynchronous modes to generate a baud rate as close as
* possible to the baud rate set point.
*
* Baud rate calculation:
* \f$ Baudrate = \frac{SelectedClock}{Over \times (CD + \frac{FP}{8})} \f$, \e Over being 16 or 8.
* The maximal oversampling is selected if it allows to generate a baud rate close to the set point.
*
* \param usart Base address of the USART instance.
* \param baudrate Baud rate set point.
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Baud rate successfully initialized.
* \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency.
*/
static int usart_set_async_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
{
unsigned int over = (pba_hz >= 16 * baudrate) ? 16 : 8;
unsigned int cd_fp = ((1 << AVR32_USART_BRGR_FP_SIZE) * pba_hz + (over * baudrate) / 2) / (over * baudrate);
unsigned int cd = cd_fp >> AVR32_USART_BRGR_FP_SIZE;
unsigned int fp = cd_fp & ((1 << AVR32_USART_BRGR_FP_SIZE) - 1);
if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
return USART_INVALID_INPUT;
usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
AVR32_USART_MR_SYNC_MASK |
AVR32_USART_MR_OVER_MASK)) |
AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
((over == 16) ? AVR32_USART_MR_OVER_X16 : AVR32_USART_MR_OVER_X8) << AVR32_USART_MR_OVER_OFFSET;
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET |
fp << AVR32_USART_BRGR_FP_OFFSET;
return USART_SUCCESS;
}
/*! \brief Calculates a clock divider (\e CD) for the USART synchronous master
* modes to generate a baud rate as close as possible to the baud rate
* set point.
*
* Baud rate calculation:
* \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
*
* \param usart Base address of the USART instance.
* \param baudrate Baud rate set point.
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Baud rate successfully initialized.
* \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency.
*/
static int usart_set_sync_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
{
unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
return USART_INVALID_INPUT;
usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
AVR32_USART_MR_SYNC_MASK;
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
return USART_SUCCESS;
}
/*! \brief Selects the SCK pin as the source of baud rate for the USART
* synchronous slave modes.
*
* \param usart Base address of the USART instance.
*
* \retval USART_SUCCESS Baud rate successfully initialized.
*/
static int usart_set_sync_slave_baudrate(volatile avr32_usart_t *usart)
{
usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET |
AVR32_USART_MR_SYNC_MASK;
return USART_SUCCESS;
}
/*! \brief Calculates a clock divider (\e CD) for the USART ISO7816 mode to
* generate an ISO7816 clock as close as possible to the clock set point.
*
* ISO7816 clock calculation:
* \f$ Clock = \frac{SelectedClock}{CD} \f$.
*
* \param usart Base address of the USART instance.
* \param clock ISO7816 clock set point.
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS ISO7816 clock successfully initialized.
* \retval USART_INVALID_INPUT ISO7816 clock set point is out of range for the given input clock frequency.
*/
static int usart_set_iso7816_clock(volatile avr32_usart_t *usart, unsigned int clock, unsigned long pba_hz)
{
unsigned int cd = (pba_hz + clock / 2) / clock;
if (cd < 1 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
return USART_INVALID_INPUT;
usart->mr = (usart->mr & ~(AVR32_USART_MR_USCLKS_MASK |
AVR32_USART_MR_SYNC_MASK |
AVR32_USART_MR_OVER_MASK)) |
AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET |
AVR32_USART_MR_OVER_X16 << AVR32_USART_MR_OVER_OFFSET;
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
return USART_SUCCESS;
}
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
/*! \brief Calculates a clock divider (\e CD) for the USART SPI master mode to
* generate a baud rate as close as possible to the baud rate set point.
*
* Baud rate calculation:
* \f$ Baudrate = \frac{SelectedClock}{CD} \f$.
*
* \param usart Base address of the USART instance.
* \param baudrate Baud rate set point.
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Baud rate successfully initialized.
* \retval USART_INVALID_INPUT Baud rate set point is out of range for the given input clock frequency.
*/
static int usart_set_spi_master_baudrate(volatile avr32_usart_t *usart, unsigned int baudrate, unsigned long pba_hz)
{
unsigned int cd = (pba_hz + baudrate / 2) / baudrate;
if (cd < 4 || cd > (1 << AVR32_USART_BRGR_CD_SIZE) - 1)
return USART_INVALID_INPUT;
usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
AVR32_USART_MR_USCLKS_MCK << AVR32_USART_MR_USCLKS_OFFSET;
usart->brgr = cd << AVR32_USART_BRGR_CD_OFFSET;
return USART_SUCCESS;
}
/*! \brief Selects the SCK pin as the source of baud rate for the USART SPI
* slave mode.
*
* \param usart Base address of the USART instance.
*
* \retval USART_SUCCESS Baud rate successfully initialized.
*/
static int usart_set_spi_slave_baudrate(volatile avr32_usart_t *usart)
{
usart->mr = (usart->mr & ~AVR32_USART_MR_USCLKS_MASK) |
AVR32_USART_MR_USCLKS_SCK << AVR32_USART_MR_USCLKS_OFFSET;
return USART_SUCCESS;
}
#endif // USART rev. >= 4.0.0
//! @}
//------------------------------------------------------------------------------
/*! \name Initialization Functions
*/
//! @{
void usart_reset(volatile avr32_usart_t *usart)
{
Bool global_interrupt_enabled = Is_global_interrupt_enabled();
// Disable all USART interrupts.
// Interrupts needed should be set explicitly on every reset.
if (global_interrupt_enabled) Disable_global_interrupt();
usart->idr = 0xFFFFFFFF;
usart->csr;
if (global_interrupt_enabled) Enable_global_interrupt();
// Reset mode and other registers that could cause unpredictable behavior after reset.
usart->mr = 0;
usart->rtor = 0;
usart->ttgr = 0;
// Shutdown TX and RX (will be re-enabled when setup has successfully completed),
// reset status bits and turn off DTR and RTS.
usart->cr = AVR32_USART_CR_RSTRX_MASK |
AVR32_USART_CR_RSTTX_MASK |
AVR32_USART_CR_RSTSTA_MASK |
AVR32_USART_CR_RSTIT_MASK |
AVR32_USART_CR_RSTNACK_MASK |
#ifndef AVR32_USART_440_H_INCLUDED
// Note: Modem Signal Management DTR-DSR-DCD-RI are not included in USART rev.440.
AVR32_USART_CR_DTRDIS_MASK |
#endif
AVR32_USART_CR_RTSDIS_MASK;
}
int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt || // Null pointer.
opt->charlength < 5 || opt->charlength > 9 ||
opt->paritytype > 7 ||
opt->stopbits > 2 + 255 ||
opt->channelmode > 3 ||
usart_set_async_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
if (opt->charlength == 9)
{
// Character length set to 9 bits. MODE9 dominates CHRL.
usart->mr |= AVR32_USART_MR_MODE9_MASK;
}
else
{
// CHRL gives the character length (- 5) when MODE9 = 0.
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
}
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
if (opt->stopbits > USART_2_STOPBITS)
{
// Set two stop bits
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
// and a timeguard period gives the rest.
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
}
else
// Insert 1, 1.5 or 2 stop bits.
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
// Set normal mode.
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
// Setup complete; enable communication.
// Enable input and output.
usart->cr = AVR32_USART_CR_RXEN_MASK |
AVR32_USART_CR_TXEN_MASK;
return USART_SUCCESS;
}
int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt || // Null pointer.
opt->charlength < 5 || opt->charlength > 9 ||
opt->paritytype > 7 ||
opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
opt->channelmode > 3 ||
usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
if (opt->charlength == 9)
{
// Character length set to 9 bits. MODE9 dominates CHRL.
usart->mr |= AVR32_USART_MR_MODE9_MASK;
}
else
{
// CHRL gives the character length (- 5) when MODE9 = 0.
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
}
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
if (opt->stopbits > USART_2_STOPBITS)
{
// Set two stop bits
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
// and a timeguard period gives the rest.
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
}
else
// Insert 1 or 2 stop bits.
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
// Set normal mode.
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
// Setup complete; enable communication.
// Enable only output as input is not possible in synchronous mode without
// transferring clock.
usart->cr = AVR32_USART_CR_TXEN_MASK;
return USART_SUCCESS;
}
int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// First: Setup standard RS232.
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Set hardware handshaking mode.
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
AVR32_USART_MR_MODE_HARDWARE << AVR32_USART_MR_MODE_OFFSET;
return USART_SUCCESS;
}
int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// First: Setup standard RS232.
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Set modem mode.
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
AVR32_USART_MR_MODE_MODEM << AVR32_USART_MR_MODE_OFFSET;
return USART_SUCCESS;
}
int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt || // Null pointer.
opt->charlength < 5 || opt->charlength > 9 ||
opt->paritytype > 7 ||
opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
opt->channelmode > 3 ||
usart_set_sync_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
if (opt->charlength == 9)
{
// Character length set to 9 bits. MODE9 dominates CHRL.
usart->mr |= AVR32_USART_MR_MODE9_MASK;
}
else
{
// CHRL gives the character length (- 5) when MODE9 = 0.
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
}
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
if (opt->stopbits > USART_2_STOPBITS)
{
// Set two stop bits
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
// and a timeguard period gives the rest.
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
}
else
// Insert 1 or 2 stop bits.
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
// Set normal mode.
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET |
AVR32_USART_MR_CLKO_MASK;
// Setup complete; enable communication.
// Enable input and output.
usart->cr = AVR32_USART_CR_RXEN_MASK |
AVR32_USART_CR_TXEN_MASK;
return USART_SUCCESS;
}
int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt || // Null pointer.
opt->charlength < 5 || opt->charlength > 9 ||
opt->paritytype > 7 ||
opt->stopbits == 1 || opt->stopbits > 2 + 255 ||
opt->channelmode > 3 ||
usart_set_sync_slave_baudrate(usart) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
if (opt->charlength == 9)
{
// Character length set to 9 bits. MODE9 dominates CHRL.
usart->mr |= AVR32_USART_MR_MODE9_MASK;
}
else
{
// CHRL gives the character length (- 5) when MODE9 = 0.
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
}
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET;
if (opt->stopbits > USART_2_STOPBITS)
{
// Set two stop bits
usart->mr |= AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET;
// and a timeguard period gives the rest.
usart->ttgr = opt->stopbits - USART_2_STOPBITS;
}
else
// Insert 1 or 2 stop bits.
usart->mr |= opt->stopbits << AVR32_USART_MR_NBSTOP_OFFSET;
// Set normal mode.
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
AVR32_USART_MR_MODE_NORMAL << AVR32_USART_MR_MODE_OFFSET;
// Setup complete; enable communication.
// Enable input and output.
usart->cr = AVR32_USART_CR_RXEN_MASK |
AVR32_USART_CR_TXEN_MASK;
return USART_SUCCESS;
}
int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz)
{
// First: Setup standard RS232.
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Set RS485 mode.
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
AVR32_USART_MR_MODE_RS485 << AVR32_USART_MR_MODE_OFFSET;
return USART_SUCCESS;
}
int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
long pba_hz, unsigned char irda_filter)
{
// First: Setup standard RS232.
if (usart_init_rs232(usart, opt, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Set IrDA filter.
usart->ifr = irda_filter;
// Set IrDA mode and activate filtering of input.
usart->mr = (usart->mr & ~AVR32_USART_MR_MODE_MASK) |
AVR32_USART_MODE_IRDA << AVR32_USART_MR_MODE_OFFSET |
AVR32_USART_MR_FILTER_MASK;
return USART_SUCCESS;
}
int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt || // Null pointer.
opt->paritytype > 1)
return USART_INVALID_INPUT;
if (t == 0)
{
// Set USART mode to ISO7816, T=0.
// The T=0 protocol always uses 2 stop bits.
usart->mr = AVR32_USART_MR_MODE_ISO7816_T0 << AVR32_USART_MR_MODE_OFFSET |
AVR32_USART_MR_NBSTOP_2 << AVR32_USART_MR_NBSTOP_OFFSET |
opt->bit_order << AVR32_USART_MR_MSBF_OFFSET; // Allow MSBF in T=0.
}
else if (t == 1)
{
// Only LSB first in the T=1 protocol.
// max_iterations field is only used in T=0 mode.
if (opt->bit_order != 0 ||
opt->max_iterations != 0)
return USART_INVALID_INPUT;
// Set USART mode to ISO7816, T=1.
// The T=1 protocol always uses 1 stop bit.
usart->mr = AVR32_USART_MR_MODE_ISO7816_T1 << AVR32_USART_MR_MODE_OFFSET |
AVR32_USART_MR_NBSTOP_1 << AVR32_USART_MR_NBSTOP_OFFSET;
}
else
return USART_INVALID_INPUT;
if (usart_set_iso7816_clock(usart, opt->iso7816_hz, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
// Set FIDI register: bit rate = selected clock/FI_DI_ratio/16.
usart->fidi = opt->fidi_ratio;
// Set ISO7816 spesific options in the MODE register.
usart->mr |= opt->paritytype << AVR32_USART_MR_PAR_OFFSET |
AVR32_USART_MR_CLKO_MASK | // Enable clock output.
opt->inhibit_nack << AVR32_USART_MR_INACK_OFFSET |
opt->dis_suc_nack << AVR32_USART_MR_DSNACK_OFFSET |
opt->max_iterations << AVR32_USART_MR_MAX_ITERATION_OFFSET;
// Setup complete; enable the receiver by default.
usart_iso7816_enable_receiver(usart);
return USART_SUCCESS;
}
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
usart->mr |= AVR32_USART_MR_MODE_LIN_MASTER << AVR32_USART_MR_MODE_OFFSET; // LIN master mode.
// Setup complete; enable communication.
// Enable input and output.
usart->cr = AVR32_USART_CR_RXEN_MASK |
AVR32_USART_CR_TXEN_MASK;
return USART_SUCCESS;
}
int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (usart_set_async_baudrate(usart, baudrate, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
usart->mr |= AVR32_USART_MR_MODE_LIN_SLAVE << AVR32_USART_MR_MODE_OFFSET; // LIN slave mode.
// Setup complete; enable communication.
// Enable input and output.
usart->cr = AVR32_USART_CR_RXEN_MASK |
AVR32_USART_CR_TXEN_MASK;
return USART_SUCCESS;
}
int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt || // Null pointer.
opt->charlength < 5 || opt->charlength > 9 ||
opt->spimode > 3 ||
opt->channelmode > 3 ||
usart_set_spi_master_baudrate(usart, opt->baudrate, pba_hz) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
if (opt->charlength == 9)
{
// Character length set to 9 bits. MODE9 dominates CHRL.
usart->mr |= AVR32_USART_MR_MODE9_MASK;
}
else
{
// CHRL gives the character length (- 5) when MODE9 = 0.
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
}
usart->mr |= AVR32_USART_MR_MODE_SPI_MASTER << AVR32_USART_MR_MODE_OFFSET | // SPI master mode.
((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET | // SPI clock phase.
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET | // Channel mode.
(opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET | // SPI clock polarity.
AVR32_USART_MR_CLKO_MASK; // Drive SCK pin.
// Setup complete; enable communication.
// Enable input and output.
usart->cr = AVR32_USART_CR_RXEN_MASK |
AVR32_USART_CR_TXEN_MASK;
return USART_SUCCESS;
}
int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz)
{
// Reset the USART and shutdown TX and RX.
usart_reset(usart);
// Check input values.
if (!opt || // Null pointer.
opt->charlength < 5 || opt->charlength > 9 ||
opt->spimode > 3 ||
opt->channelmode > 3 ||
usart_set_spi_slave_baudrate(usart) == USART_INVALID_INPUT)
return USART_INVALID_INPUT;
if (opt->charlength == 9)
{
// Character length set to 9 bits. MODE9 dominates CHRL.
usart->mr |= AVR32_USART_MR_MODE9_MASK;
}
else
{
// CHRL gives the character length (- 5) when MODE9 = 0.
usart->mr |= (opt->charlength - 5) << AVR32_USART_MR_CHRL_OFFSET;
}
usart->mr |= AVR32_USART_MR_MODE_SPI_SLAVE << AVR32_USART_MR_MODE_OFFSET | // SPI slave mode.
((opt->spimode & 0x1) ^ 0x1) << AVR32_USART_MR_SYNC_OFFSET | // SPI clock phase.
opt->channelmode << AVR32_USART_MR_CHMODE_OFFSET | // Channel mode.
(opt->spimode >> 1) << AVR32_USART_MR_MSBF_OFFSET; // SPI clock polarity.
// Setup complete; enable communication.
// Enable input and output.
usart->cr = AVR32_USART_CR_RXEN_MASK |
AVR32_USART_CR_TXEN_MASK;
return USART_SUCCESS;
}
#endif // USART rev. >= 4.0.0
//! @}
//------------------------------------------------------------------------------
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
/*! \name SPI Control Functions
*/
//! @{
int usart_spi_selectChip(volatile avr32_usart_t *usart)
{
// Force the SPI chip select.
usart->cr = AVR32_USART_CR_RTSEN_MASK;
return USART_SUCCESS;
}
int usart_spi_unselectChip(volatile avr32_usart_t *usart)
{
int timeout = USART_DEFAULT_TIMEOUT;
do
{
if (!timeout--) return USART_FAILURE;
} while (!usart_tx_empty(usart));
// Release the SPI chip select.
usart->cr = AVR32_USART_CR_RTSDIS_MASK;
return USART_SUCCESS;
}
//! @}
#endif // USART rev. >= 4.0.0
//------------------------------------------------------------------------------
/*! \name Transmit/Receive Functions
*/
//! @{
int usart_send_address(volatile avr32_usart_t *usart, int address)
{
// Check if USART is in multidrop / RS485 mode.
if (!usart_mode_is_multidrop(usart)) return USART_MODE_FAULT;
// Prepare to send an address.
usart->cr = AVR32_USART_CR_SENDA_MASK;
// Write the address to TX.
usart_bw_write_char(usart, address);
return USART_SUCCESS;
}
int usart_write_char(volatile avr32_usart_t *usart, int c)
{
if (usart_tx_ready(usart))
{
usart->thr = (c << AVR32_USART_THR_TXCHR_OFFSET) & AVR32_USART_THR_TXCHR_MASK;
return USART_SUCCESS;
}
else
return USART_TX_BUSY;
}
int usart_putchar(volatile avr32_usart_t *usart, int c)
{
int timeout = USART_DEFAULT_TIMEOUT;
if (c == '\n')
{
do
{
if (!timeout--) return USART_FAILURE;
} while (usart_write_char(usart, '\r') != USART_SUCCESS);
timeout = USART_DEFAULT_TIMEOUT;
}
do
{
if (!timeout--) return USART_FAILURE;
} while (usart_write_char(usart, c) != USART_SUCCESS);
return USART_SUCCESS;
}
int usart_read_char(volatile avr32_usart_t *usart, int *c)
{
// Check for errors: frame, parity and overrun. In RS485 mode, a parity error
// would mean that an address char has been received.
if (usart->csr & (AVR32_USART_CSR_OVRE_MASK |
AVR32_USART_CSR_FRAME_MASK |
AVR32_USART_CSR_PARE_MASK))
return USART_RX_ERROR;
// No error; if we really did receive a char, read it and return SUCCESS.
if (usart_test_hit(usart))
{
*c = (usart->rhr & AVR32_USART_RHR_RXCHR_MASK) >> AVR32_USART_RHR_RXCHR_OFFSET;
return USART_SUCCESS;
}
else
return USART_RX_EMPTY;
}
int usart_getchar(volatile avr32_usart_t *usart)
{
int c, ret;
while ((ret = usart_read_char(usart, &c)) == USART_RX_EMPTY);
if (ret == USART_RX_ERROR)
return USART_FAILURE;
return c;
}
void usart_write_line(volatile avr32_usart_t *usart, const char *string)
{
while (*string != '\0')
usart_putchar(usart, *string++);
}
int usart_get_echo_line(volatile avr32_usart_t *usart)
{
int rx_char;
int retval = USART_SUCCESS;
while (1)
{
rx_char = usart_getchar(usart);
if (rx_char == USART_FAILURE)
{
usart_write_line(usart, "Error!!!\n");
retval = USART_FAILURE;
break;
}
if (rx_char == '\x03')
{
retval = USART_FAILURE;
break;
}
usart_putchar(usart, rx_char);
if (rx_char == '\r')
{
usart_putchar(usart, '\n');
break;
}
}
return retval;
}
//! @}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief USART driver for AVR32 UC3.
*
* This file contains basic functions for the AVR32 USART, with support for all
* modes, settings and clock speeds.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices with a USART module can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _USART_H_
#define _USART_H_
#include <avr32/io.h>
#include "compiler.h"
/*! \name Return Values
*/
//! @{
#define USART_SUCCESS 0 //!< Successful completion.
#define USART_FAILURE -1 //!< Failure because of some unspecified reason.
#define USART_INVALID_INPUT 1 //!< Input value out of range.
#define USART_INVALID_ARGUMENT -1 //!< Argument value out of range.
#define USART_TX_BUSY 2 //!< Transmitter was busy.
#define USART_RX_EMPTY 3 //!< Nothing was received.
#define USART_RX_ERROR 4 //!< Transmission error occurred.
#define USART_MODE_FAULT 5 //!< USART not in the appropriate mode.
//! @}
//! Default time-out value (number of attempts).
#define USART_DEFAULT_TIMEOUT 10000
/*! \name Parity Settings
*/
//! @{
#define USART_EVEN_PARITY AVR32_USART_MR_PAR_EVEN //!< Use even parity on character transmission.
#define USART_ODD_PARITY AVR32_USART_MR_PAR_ODD //!< Use odd parity on character transmission.
#define USART_SPACE_PARITY AVR32_USART_MR_PAR_SPACE //!< Use a space as parity bit.
#define USART_MARK_PARITY AVR32_USART_MR_PAR_MARK //!< Use a mark as parity bit.
#define USART_NO_PARITY AVR32_USART_MR_PAR_NONE //!< Don't use a parity bit.
#define USART_MULTIDROP_PARITY AVR32_USART_MR_PAR_MULTI //!< Parity bit is used to flag address characters.
//! @}
/*! \name Stop Bits Settings
*/
//! @{
#define USART_1_STOPBIT AVR32_USART_MR_NBSTOP_1 //!< Use 1 stop bit.
#define USART_1_5_STOPBITS AVR32_USART_MR_NBSTOP_1_5 //!< Use 1.5 stop bits.
#define USART_2_STOPBITS AVR32_USART_MR_NBSTOP_2 //!< Use 2 stop bits (for more, just give the number of bits).
//! @}
/*! \name Channel Modes
*/
//! @{
#define USART_NORMAL_CHMODE AVR32_USART_MR_CHMODE_NORMAL //!< Normal communication.
#define USART_AUTO_ECHO AVR32_USART_MR_CHMODE_ECHO //!< Echo data.
#define USART_LOCAL_LOOPBACK AVR32_USART_MR_CHMODE_LOCAL_LOOP //!< Local loopback.
#define USART_REMOTE_LOOPBACK AVR32_USART_MR_CHMODE_REMOTE_LOOP //!< Remote loopback.
//! @}
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
/*! \name LIN Node Actions
*/
//! @{
#define USART_LIN_PUBLISH_ACTION AVR32_USART_LINMR_NACT_PUBLISH //!< The USART transmits the response.
#define USART_LIN_SUBSCRIBE_ACTION AVR32_USART_LINMR_NACT_SUBSCRIBE //!< The USART receives the response.
#define USART_LIN_IGNORE_ACTION AVR32_USART_LINMR_NACT_IGNORE //!< The USART does not transmit and does not receive the reponse.
//! @}
/*! \name LIN Checksum Types
*/
//! @{
#define USART_LIN_ENHANCED_CHECKSUM 0 //!< LIN 2.0 "enhanced" checksum.
#define USART_LIN_CLASSIC_CHECKSUM 1 //!< LIN 1.3 "classic" checksum.
//! @}
#endif // USART rev. >= 4.0.0
//! Input parameters when initializing RS232 and similar modes.
typedef struct
{
//! Set baud rate of the USART (unused in slave modes).
unsigned long baudrate;
//! Number of bits to transmit as a character (5 to 9).
unsigned char charlength;
//! How to calculate the parity bit: \ref USART_EVEN_PARITY, \ref USART_ODD_PARITY,
//! \ref USART_SPACE_PARITY, \ref USART_MARK_PARITY, \ref USART_NO_PARITY or
//! \ref USART_MULTIDROP_PARITY.
unsigned char paritytype;
//! Number of stop bits between two characters: \ref USART_1_STOPBIT,
//! \ref USART_1_5_STOPBITS, \ref USART_2_STOPBITS or any number from 3 to 257
//! which will result in a time guard period of that length between characters.
//! \note \ref USART_1_5_STOPBITS is supported in asynchronous modes only.
unsigned short stopbits;
//! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
//! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
unsigned char channelmode;
} usart_options_t;
//! Input parameters when initializing ISO7816 mode.
typedef struct
{
//! Set the frequency of the ISO7816 clock.
unsigned long iso7816_hz;
//! The number of ISO7816 clock ticks in every bit period (1 to 2047, 0 = disable clock).
//! Bit rate = \ref iso7816_hz / \ref fidi_ratio.
unsigned short fidi_ratio;
//! How to calculate the parity bit: \ref USART_EVEN_PARITY for normal mode or
//! \ref USART_ODD_PARITY for inverse mode.
unsigned char paritytype;
//! Inhibit Non Acknowledge:\n
//! - 0: the NACK is generated;\n
//! - 1: the NACK is not generated.
//!
//! \note This bit will be used only in ISO7816 mode, protocol T = 0 receiver.
int inhibit_nack;
//! Disable successive NACKs.
//! Successive parity errors are counted up to the value in the \ref max_iterations field.
//! These parity errors generate a NACK on the ISO line. As soon as this value is reached,
//! no addititional NACK is sent on the ISO line. The ITERATION flag is asserted.
int dis_suc_nack;
//! Max number of repetitions (0 to 7).
unsigned char max_iterations;
//! Bit order in transmitted characters:\n
//! - 0: LSB first;\n
//! - 1: MSB first.
int bit_order;
} usart_iso7816_options_t;
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
//! Input parameters when initializing SPI mode.
typedef struct
{
//! Set the frequency of the SPI clock (unused in slave mode).
unsigned long baudrate;
//! Number of bits to transmit as a character (5 to 9).
unsigned char charlength;
//! Which SPI mode to use.
unsigned char spimode;
//! Run the channel in testmode: \ref USART_NORMAL_CHMODE, \ref USART_AUTO_ECHO,
//! \ref USART_LOCAL_LOOPBACK or \ref USART_REMOTE_LOOPBACK.
unsigned char channelmode;
} usart_spi_options_t;
#endif // USART rev. >= 4.0.0
//------------------------------------------------------------------------------
/*! \name Initialization Functions
*/
//! @{
/*! \brief Resets the USART and disables TX and RX.
*
* \param usart Base address of the USART instance.
*/
extern void usart_reset(volatile avr32_usart_t *usart);
/*! \brief Sets up the USART to use the standard RS232 protocol.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_rs232(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the standard RS232 protocol in TX-only mode.
*
* Compared to \ref usart_init_rs232, this function allows very high baud rates
* (up to \a pba_hz instead of \a pba_hz / \c 8) at the expense of full duplex.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*
* \note The \c 1.5 stop bit is not supported in this mode.
*/
extern int usart_init_rs232_tx_only(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use hardware handshaking.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*
* \note \ref usart_init_rs232 does not need to be invoked before this function.
*/
extern int usart_init_hw_handshaking(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the modem protocol, activating dedicated inputs/outputs.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_modem(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use a synchronous RS232-like protocol in master mode.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_sync_master(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use a synchronous RS232-like protocol in slave mode.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_sync_slave(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the RS485 protocol.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_rs485(volatile avr32_usart_t *usart, const usart_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the IrDA protocol.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up RS232 communication (see \ref usart_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
* \param irda_filter Counter used to distinguish received ones from zeros.
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_IrDA(volatile avr32_usart_t *usart, const usart_options_t *opt,
long pba_hz, unsigned char irda_filter);
/*! \brief Sets up the USART to use the ISO7816 T=0 or T=1 smartcard protocols.
*
* The receiver is enabled by default. \ref usart_iso7816_enable_receiver and
* \ref usart_iso7816_enable_transmitter can be called to change the half-duplex
* communication direction.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up ISO7816 communication (see \ref usart_iso7816_options_t).
* \param t ISO7816 mode to use (T=0 or T=1).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_iso7816(volatile avr32_usart_t *usart, const usart_iso7816_options_t *opt, int t, long pba_hz);
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
/*! \brief Sets up the USART to use the LIN master mode.
*
* \param usart Base address of the USART instance.
* \param baudrate Baud rate.
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
*/
extern int usart_init_lin_master(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
/*! \brief Sets up the USART to use the LIN slave mode.
*
* \param usart Base address of the USART instance.
* \param baudrate Baud rate.
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
*/
extern int usart_init_lin_slave(volatile avr32_usart_t *usart, unsigned long baudrate, long pba_hz);
/*! \brief Sets up the USART to use the SPI master mode.
*
* \ref usart_spi_selectChip and \ref usart_spi_unselectChip can be called to
* select or unselect the SPI slave chip.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_spi_master(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
/*! \brief Sets up the USART to use the SPI slave mode.
*
* \param usart Base address of the USART instance.
* \param opt Options needed to set up SPI mode (see \ref usart_spi_options_t).
* \param pba_hz USART module input clock frequency (PBA clock, Hz).
*
* \retval USART_SUCCESS Mode successfully initialized.
* \retval USART_INVALID_INPUT One or more of the arguments is out of valid range.
*/
extern int usart_init_spi_slave(volatile avr32_usart_t *usart, const usart_spi_options_t *opt, long pba_hz);
#endif // USART rev. >= 4.0.0
//! @}
//------------------------------------------------------------------------------
/*! \name Read and Reset Error Status Bits
*/
//! @{
/*! \brief Resets the error status.
*
* This function resets the status bits indicating that a parity error,
* framing error or overrun has occurred. The RXBRK bit, indicating
* a start/end of break condition on the RX line, is also reset.
*
* \param usart Base address of the USART instance.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_reset_status(volatile avr32_usart_t *usart)
{
usart->cr = AVR32_USART_CR_RSTSTA_MASK;
}
/*! \brief Checks if a parity error has occurred since last status reset.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if a parity error has been detected, otherwise \c 0.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_parity_error(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_PARE_MASK) != 0;
}
/*! \brief Checks if a framing error has occurred since last status reset.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if a framing error has been detected, otherwise \c 0.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_framing_error(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_FRAME_MASK) != 0;
}
/*! \brief Checks if an overrun error has occurred since last status reset.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if a overrun error has been detected, otherwise \c 0.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_overrun_error(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_OVRE_MASK) != 0;
}
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
/*! \brief Get LIN Error Status
*
* \param usart Base address of the USART instance.
*
* \retval The binary value of the error field.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_lin_get_error(volatile avr32_usart_t *usart)
{
return (usart->csr & (AVR32_USART_CSR_LINSNRE_MASK |
AVR32_USART_CSR_LINCE_MASK |
AVR32_USART_CSR_LINIPE_MASK |
AVR32_USART_CSR_LINISFE_MASK |
AVR32_USART_CSR_LINBE_MASK)) >> AVR32_USART_CSR_LINBE_OFFSET;
}
#endif // USART rev. >= 4.0.0
//! @}
//------------------------------------------------------------------------------
/*! \name ISO7816 Control Functions
*/
//! @{
/*! \brief Enables the ISO7816 receiver.
*
* The ISO7816 transmitter is disabled.
*
* \param usart Base address of the USART instance.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_iso7816_enable_receiver(volatile avr32_usart_t *usart)
{
usart->cr = AVR32_USART_CR_TXDIS_MASK | AVR32_USART_CR_RXEN_MASK;
}
/*! \brief Enables the ISO7816 transmitter.
*
* The ISO7816 receiver is disabled.
*
* \param usart Base address of the USART instance.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_iso7816_enable_transmitter(volatile avr32_usart_t *usart)
{
usart->cr = AVR32_USART_CR_RXDIS_MASK | AVR32_USART_CR_TXEN_MASK;
}
//! @}
//------------------------------------------------------------------------------
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
/*! \name LIN Control Functions
*/
//! @{
/*! \brief Sets the node action.
*
* \param usart Base address of the USART instance.
* \param action The node action: \ref USART_LIN_PUBLISH_ACTION,
* \ref USART_LIN_SUBSCRIBE_ACTION or
* \ref USART_LIN_IGNORE_ACTION.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_set_node_action(volatile avr32_usart_t *usart, unsigned char action)
{
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_NACT_MASK) |
action << AVR32_USART_LINMR_NACT_OFFSET;
}
/*! \brief Enables or disables the Identifier parity.
*
* \param usart Base address of the USART instance.
* \param parity Whether to enable the Identifier parity: \c TRUE or \c FALSE.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_enable_parity(volatile avr32_usart_t *usart, unsigned char parity)
{
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_PARDIS_MASK) |
!parity << AVR32_USART_LINMR_PARDIS_OFFSET;
}
/*! \brief Enables or disables the checksum.
*
* \param usart Base address of the USART instance.
* \param parity Whether to enable the checksum: \c TRUE or \c FALSE.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_enable_checksum(volatile avr32_usart_t *usart, unsigned char checksum)
{
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKDIS_MASK) |
!checksum << AVR32_USART_LINMR_CHKDIS_OFFSET;
}
/*! \brief Sets the checksum type.
*
* \param usart Base address of the USART instance.
* \param chktyp The checksum type: \ref USART_LIN_ENHANCED_CHEKSUM or
* \ref USART_LIN_CLASSIC_CHECKSUM.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_set_checksum(volatile avr32_usart_t *usart, unsigned char chktyp)
{
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_CHKTYP_MASK) |
chktyp << AVR32_USART_LINMR_CHKTYP_OFFSET;
}
/*! \brief Gets the response data length.
*
* \param usart Base address of the USART instance.
*
* \return The response data length.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned char usart_lin_get_data_length(volatile avr32_usart_t *usart)
{
if (usart->linmr & AVR32_USART_LINMR_DLM_MASK)
{
unsigned char data_length = 1 << ((usart->linir >> (AVR32_USART_LINIR_IDCHR_OFFSET + 4)) & 0x03);
if (data_length == 1)
data_length = 2;
return data_length;
}
else
return ((usart->linmr & AVR32_USART_LINMR_DLC_MASK) >> AVR32_USART_LINMR_DLC_OFFSET) + 1;
}
/*! \brief Sets the response data length for LIN 1.x.
*
* \param usart Base address of the USART instance.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_set_data_length_lin1x(volatile avr32_usart_t *usart)
{
usart->linmr |= AVR32_USART_LINMR_DLM_MASK;
}
/*! \brief Sets the response data length for LIN 2.x.
*
* \param usart Base address of the USART instance.
* \param data_length The response data length.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_set_data_length_lin2x(volatile avr32_usart_t *usart, unsigned char data_length)
{
usart->linmr = (usart->linmr & ~(AVR32_USART_LINMR_DLC_MASK |
AVR32_USART_LINMR_DLM_MASK)) |
(data_length - 1) << AVR32_USART_LINMR_DLC_OFFSET;
}
/*! \brief Enables or disables the frame slot mode.
*
* \param usart Base address of the USART instance.
* \param frameslot Whether to enable the frame slot mode: \c TRUE or
* \c FALSE.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_enable_frameslot(volatile avr32_usart_t *usart, unsigned char frameslot)
{
usart->linmr = (usart->linmr & ~AVR32_USART_LINMR_FSDIS_MASK) |
!frameslot << AVR32_USART_LINMR_FSDIS_OFFSET;
}
/*! \brief Gets the Identifier character.
*
* \param usart Base address of the USART instance.
*
* \return The Identifier character.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ unsigned char usart_lin_get_id_char(volatile avr32_usart_t *usart)
{
return (usart->linir & AVR32_USART_LINIR_IDCHR_MASK) >> AVR32_USART_LINIR_IDCHR_OFFSET;
}
/*! \brief Sets the Identifier character.
*
* \param usart Base address of the USART instance.
* \param id_char The Identifier character.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_set_id_char(volatile avr32_usart_t *usart, unsigned char id_char)
{
usart->linir = (usart->linir & ~AVR32_USART_LINIR_IDCHR_MASK) |
id_char << AVR32_USART_LINIR_IDCHR_OFFSET;
}
//! @}
#endif // USART rev. >= 4.0.0
//------------------------------------------------------------------------------
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
/*! \name SPI Control Functions
*/
//! @{
/*! \brief Selects SPI slave chip.
*
* \param usart Base address of the USART instance.
*
* \retval USART_SUCCESS Success.
*/
extern int usart_spi_selectChip(volatile avr32_usart_t *usart);
/*! \brief Unselects SPI slave chip.
*
* \param usart Base address of the USART instance.
*
* \retval USART_SUCCESS Success.
* \retval USART_FAILURE Time-out.
*/
extern int usart_spi_unselectChip(volatile avr32_usart_t *usart);
//! @}
#endif // USART rev. >= 4.0.0
//------------------------------------------------------------------------------
/*! \name Transmit/Receive Functions
*/
//! @{
/*! \brief Addresses a receiver.
*
* While in RS485 mode, receivers only accept data addressed to them.
* A packet/char with the address tag set has to precede any data.
* This function is used to address a receiver. This receiver should read
* all the following data, until an address packet addresses another receiver.
*
* \param usart Base address of the USART instance.
* \param address Address of the target device.
*
* \retval USART_SUCCESS Address successfully sent (if current mode is RS485).
* \retval USART_MODE_FAULT Wrong operating mode.
*/
extern int usart_send_address(volatile avr32_usart_t *usart, int address);
/*! \brief Tests if the USART is ready to transmit a character.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if the USART Transmit Holding Register is free, otherwise \c 0.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_tx_ready(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_TXRDY_MASK) != 0;
}
/*! \brief Writes the given character to the TX buffer if the transmitter is ready.
*
* \param usart Base address of the USART instance.
* \param c The character (up to 9 bits) to transmit.
*
* \retval USART_SUCCESS The transmitter was ready.
* \retval USART_TX_BUSY The transmitter was busy.
*/
extern int usart_write_char(volatile avr32_usart_t *usart, int c);
/*! \brief An active wait writing a character to the USART.
*
* \param usart Base address of the USART instance.
* \param c The character (up to 9 bits) to transmit.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_bw_write_char(volatile avr32_usart_t *usart, int c)
{
while (usart_write_char(usart, c) != USART_SUCCESS);
}
/*! \brief Sends a character with the USART.
*
* \param usart Base address of the USART instance.
* \param c Character to write.
*
* \retval USART_SUCCESS The character was written.
* \retval USART_FAILURE The function timed out before the USART transmitter became ready to send.
*/
extern int usart_putchar(volatile avr32_usart_t *usart, int c);
/*! \brief Tests if all requested USART transmissions are over.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if the USART Transmit Shift Register and the USART Transmit
* Holding Register are free, otherwise \c 0.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_tx_empty(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_TXEMPTY_MASK) != 0;
}
/*! \brief Tests if the USART contains a received character.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if the USART Receive Holding Register is full, otherwise \c 0.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_test_hit(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_RXRDY_MASK) != 0;
}
/*! \brief Checks the RX buffer for a received character, and stores it at the
* given memory location.
*
* \param usart Base address of the USART instance.
* \param c Pointer to the where the read character should be stored
* (must be at least short in order to accept 9-bit characters).
*
* \retval USART_SUCCESS The character was read successfully.
* \retval USART_RX_EMPTY The RX buffer was empty.
* \retval USART_RX_ERROR An error was deteceted.
*/
extern int usart_read_char(volatile avr32_usart_t *usart, int *c);
/*! \brief Waits until a character is received, and returns it.
*
* \param usart Base address of the USART instance.
*
* \return The received character, or \ref USART_FAILURE upon error.
*/
extern int usart_getchar(volatile avr32_usart_t *usart);
/*! \brief Writes one character string to the USART.
*
* \param usart Base address of the USART instance.
* \param string String to be written.
*/
extern void usart_write_line(volatile avr32_usart_t *usart, const char *string);
/*! \brief Gets and echoes characters until end of line.
*
* \param usart Base address of the USART instance.
*
* \retval USART_SUCCESS Success.
* \retval USART_FAILURE Low-level error detected or ETX character received.
*/
extern int usart_get_echo_line(volatile avr32_usart_t *usart);
#if defined(AVR32_USART_400_H_INCLUDED) || \
defined(AVR32_USART_410_H_INCLUDED) || \
defined(AVR32_USART_420_H_INCLUDED) || \
defined(AVR32_USART_440_H_INCLUDED) || \
defined(AVR32_USART_602_H_INCLUDED)
/*! \brief Abort LIN transmission.
*
* \param usart Base address of the USART instance.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ void usart_lin_abort(volatile avr32_usart_t *usart)
{
usart->cr = AVR32_USART_LINABT_MASK;
}
/*! \brief Tests if a LIN transfer has been completed.
*
* \param usart Base address of the USART instance.
*
* \return \c 1 if a LIN transfer has been completed, otherwise \c 0.
*/
#if (defined __GNUC__)
__attribute__((__always_inline__))
#endif
extern __inline__ int usart_lin_transfer_completed(volatile avr32_usart_t *usart)
{
return (usart->csr & AVR32_USART_CSR_LINTC_MASK) != 0;
}
#endif // USART rev. >= 4.0.0
//! @}
#endif // _USART_H_

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file ******************************************************************
*
* \brief Management of the delays.
*
* This file manages the "delays", with or without an OS.
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 devices.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
***************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
//_____ I N C L U D E S ___________________________________________________
#include "delay.h"
//_____ M A C R O S ________________________________________________________
//_____ D E F I N I T I O N S ______________________________________________
//! CPU frequency
#ifndef FREERTOS_USED
static unsigned long s_fcpu_hz;
#endif
#if (defined NUTOS_USED)
extern void NutSleep(unsigned long ms);
#endif
//_____ D E C L A R A T I O N S ____________________________________________
void delay_init(unsigned long fcpu_hz)
{
#ifndef FREERTOS_USED
s_fcpu_hz = fcpu_hz;
#endif
}
void delay_ms(unsigned long delay)
{
#if (defined FREERTOS_USED)
vTaskDelay( (portTickType)TASK_DELAY_MS(delay) );
#elif (defined NUTOS_USED)
NutSleep(delay);
#else
cpu_delay_ms(delay, s_fcpu_hz);
#endif
}

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*This file is prepared for Doxygen automatic documentation generation.*/
/*! \file *********************************************************************
*
* \brief AT32UC3 delay management header file.
*
* This file contains definitions and services to handle "delays".
*
* - Compiler: IAR EWAVR32 and GNU GCC for AVR32
* - Supported devices: All AVR32 AT32UC3 devices can be used.
* - AppNote:
*
* \author Atmel Corporation: http://www.atmel.com \n
* Support and FAQ: http://support.atmel.no/
*
******************************************************************************/
/* Copyright (c) 2009 Atmel Corporation. All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice, this
* list of conditions and the following disclaimer.
*
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
*
* 3. The name of Atmel may not be used to endorse or promote products derived
* from this software without specific prior written permission.
*
* 4. This software may only be redistributed and used in connection with an Atmel
* AVR product.
*
* THIS SOFTWARE IS PROVIDED BY ATMEL "AS IS" AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT ARE
* EXPRESSLY AND SPECIFICALLY DISCLAIMED. IN NO EVENT SHALL ATMEL BE LIABLE FOR
* ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
* (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
* LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
* ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
* (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE
*
*/
#ifndef _DELAY_H_
#define _DELAY_H_
#include "compiler.h"
#ifdef FREERTOS_USED
# include "FreeRTOS.h"
# include "task.h"
#else
# include "cycle_counter.h"
#endif
/*!
* \brief Initialize the delay driver.
*
* \param fcpu_hz: CPU frequency in Hz.
*/
extern void delay_init(unsigned long fcpu_hz);
/*!
* \brief Waits during at least the specified delay (in millisecond) before returning.
*
* Note that in the case of FreeRTOS, the function will delay the current task for a given number of ms.
*
* \param delay: Number of millisecond to wait.
*/
extern void delay_ms(unsigned long delay);
#endif // _DELAY_H_

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hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/dhcp.c Normal file
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* DNS - host name to IP address resolver.
*
*/
/**
* This file implements a DNS host name to IP address resolver.
* Port to lwIP from uIP
* by Jim Pettinato April 2007
* uIP version Copyright (c) 2002-2003, Adam Dunkels.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote
* products derived from this software without specific prior
* written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS
* OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
* WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY
* DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE
* GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
* WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
* NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
* SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
*
*
* DNS.C
*
* The lwIP DNS resolver functions are used to lookup a host name and
* map it to a numerical IP address. It maintains a list of resolved
* hostnames that can be queried with the dns_lookup() function.
* New hostnames can be resolved using the dns_query() function.
*
* The lwIP version of the resolver also adds a non-blocking version of
* gethostbyname() that will work with a raw API application. This function
* checks for an IP address string first and converts it if it is valid.
* gethostbyname() then does a dns_lookup() to see if the name is
* already in the table. If so, the IP is returned. If not, a query is
* issued and the function returns with a ERR_INPROGRESS status. The app
* using the dns client must then go into a waiting state.
*
* Once a hostname has been resolved (or found to be non-existent),
* the resolver code calls a specified callback function (which
* must be implemented by the module that uses the resolver).
*/
/*-----------------------------------------------------------------------------
* RFC 1035 - Domain names - implementation and specification
* RFC 2181 - Clarifications to the DNS Specification
*----------------------------------------------------------------------------*/
/** @todo: define good default values (rfc compliance) */
/** @todo: improve answer parsing, more checkings... */
/** @todo: check RFC1035 - 7.3. Processing responses */
/*-----------------------------------------------------------------------------
* Includes
*----------------------------------------------------------------------------*/
#include "lwip/opt.h"
#if LWIP_DNS /* don't build if not configured for use in lwipopts.h */
#include "lwip/udp.h"
#include "lwip/mem.h"
#include "lwip/dns.h"
#include <string.h>
/** DNS server IP address */
#ifndef DNS_SERVER_ADDRESS
#define DNS_SERVER_ADDRESS inet_addr("208.67.222.222") /* resolver1.opendns.com */
#endif
/** DNS server port address */
#ifndef DNS_SERVER_PORT
#define DNS_SERVER_PORT 53
#endif
/** DNS maximum number of retries when asking for a name, before "timeout". */
#ifndef DNS_MAX_RETRIES
#define DNS_MAX_RETRIES 4
#endif
/** DNS resource record max. TTL (one week as default) */
#ifndef DNS_MAX_TTL
#define DNS_MAX_TTL 604800
#endif
/* DNS protocol flags */
#define DNS_FLAG1_RESPONSE 0x80
#define DNS_FLAG1_OPCODE_STATUS 0x10
#define DNS_FLAG1_OPCODE_INVERSE 0x08
#define DNS_FLAG1_OPCODE_STANDARD 0x00
#define DNS_FLAG1_AUTHORATIVE 0x04
#define DNS_FLAG1_TRUNC 0x02
#define DNS_FLAG1_RD 0x01
#define DNS_FLAG2_RA 0x80
#define DNS_FLAG2_ERR_MASK 0x0f
#define DNS_FLAG2_ERR_NONE 0x00
#define DNS_FLAG2_ERR_NAME 0x03
/* DNS protocol states */
#define DNS_STATE_UNUSED 0
#define DNS_STATE_NEW 1
#define DNS_STATE_ASKING 2
#define DNS_STATE_DONE 3
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
PACK_STRUCT_BEGIN
/** DNS message header */
struct dns_hdr {
PACK_STRUCT_FIELD(u16_t id);
PACK_STRUCT_FIELD(u8_t flags1);
PACK_STRUCT_FIELD(u8_t flags2);
PACK_STRUCT_FIELD(u16_t numquestions);
PACK_STRUCT_FIELD(u16_t numanswers);
PACK_STRUCT_FIELD(u16_t numauthrr);
PACK_STRUCT_FIELD(u16_t numextrarr);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
#define SIZEOF_DNS_HDR 12
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
PACK_STRUCT_BEGIN
/** DNS query message structure */
struct dns_query {
/* DNS query record starts with either a domain name or a pointer
to a name already present somewhere in the packet. */
PACK_STRUCT_FIELD(u16_t type);
PACK_STRUCT_FIELD(u16_t class);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
#define SIZEOF_DNS_QUERY 4
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
PACK_STRUCT_BEGIN
/** DNS answer message structure */
struct dns_answer {
/* DNS answer record starts with either a domain name or a pointer
to a name already present somewhere in the packet. */
PACK_STRUCT_FIELD(u16_t type);
PACK_STRUCT_FIELD(u16_t class);
PACK_STRUCT_FIELD(u32_t ttl);
PACK_STRUCT_FIELD(u16_t len);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
#define SIZEOF_DNS_ANSWER 10
/** DNS table entry */
struct dns_table_entry {
u8_t state;
u8_t numdns;
u8_t tmr;
u8_t retries;
u8_t seqno;
u8_t err;
u32_t ttl;
char name[DNS_MAX_NAME_LENGTH];
struct ip_addr ipaddr;
/* pointer to callback on DNS query done */
dns_found_callback found;
void *arg;
};
#if DNS_LOCAL_HOSTLIST
/** struct used for local host-list */
struct local_hostlist_entry {
/** static hostname */
const char *name;
/** static host address in network byteorder */
u32_t addr;
struct local_hostlist_entry *next;
};
#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC
/** Local host-list. For hostnames in this list, no
* external name resolution is performed */
static struct local_hostlist_entry *local_hostlist_dynamic;
#else /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
/** Defining this allows the local_hostlist_static to be placed in a different
* linker section (e.g. FLASH) */
#ifndef DNS_LOCAL_HOSTLIST_STORAGE_PRE
#define DNS_LOCAL_HOSTLIST_STORAGE_PRE static
#endif /* DNS_LOCAL_HOSTLIST_STORAGE_PRE */
/** Defining this allows the local_hostlist_static to be placed in a different
* linker section (e.g. FLASH) */
#ifndef DNS_LOCAL_HOSTLIST_STORAGE_POST
#define DNS_LOCAL_HOSTLIST_STORAGE_POST
#endif /* DNS_LOCAL_HOSTLIST_STORAGE_POST */
DNS_LOCAL_HOSTLIST_STORAGE_PRE struct local_hostlist_entry local_hostlist_static[]
DNS_LOCAL_HOSTLIST_STORAGE_POST = DNS_LOCAL_HOSTLIST_INIT;
#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
static void dns_init_local();
#endif /* DNS_LOCAL_HOSTLIST */
/* forward declarations */
static void dns_recv(void *s, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port);
static void dns_check_entries(void);
/*-----------------------------------------------------------------------------
* Globales
*----------------------------------------------------------------------------*/
/* DNS variables */
static struct udp_pcb *dns_pcb;
static u8_t dns_seqno;
static struct dns_table_entry dns_table[DNS_TABLE_SIZE];
static struct ip_addr dns_servers[DNS_MAX_SERVERS];
#if (DNS_USES_STATIC_BUF == 1)
static u8_t dns_payload[DNS_MSG_SIZE];
#endif /* (DNS_USES_STATIC_BUF == 1) */
/**
* Initialize the resolver: set up the UDP pcb and configure the default server
* (DNS_SERVER_ADDRESS).
*/
void
dns_init()
{
struct ip_addr dnsserver;
/* initialize default DNS server address */
dnsserver.addr = DNS_SERVER_ADDRESS;
LWIP_DEBUGF(DNS_DEBUG, ("dns_init: initializing\n"));
/* if dns client not yet initialized... */
if (dns_pcb == NULL) {
dns_pcb = udp_new();
if (dns_pcb != NULL) {
/* initialize DNS table not needed (initialized to zero since it is a
* global variable) */
LWIP_ASSERT("For implicit initialization to work, DNS_STATE_UNUSED needs to be 0",
DNS_STATE_UNUSED == 0);
/* initialize DNS client */
udp_bind(dns_pcb, IP_ADDR_ANY, 0);
udp_recv(dns_pcb, dns_recv, NULL);
/* initialize default DNS primary server */
dns_setserver(0, &dnsserver);
}
}
#if DNS_LOCAL_HOSTLIST
dns_init_local();
#endif
}
/**
* Initialize one of the DNS servers.
*
* @param numdns the index of the DNS server to set must be < DNS_MAX_SERVERS
* @param dnsserver IP address of the DNS server to set
*/
void
dns_setserver(u8_t numdns, struct ip_addr *dnsserver)
{
if ((numdns < DNS_MAX_SERVERS) && (dns_pcb != NULL) &&
(dnsserver != NULL) && (dnsserver->addr !=0 )) {
dns_servers[numdns] = (*dnsserver);
}
}
/**
* Obtain one of the currently configured DNS server.
*
* @param numdns the index of the DNS server
* @return IP address of the indexed DNS server or "ip_addr_any" if the DNS
* server has not been configured.
*/
struct ip_addr
dns_getserver(u8_t numdns)
{
if (numdns < DNS_MAX_SERVERS) {
return dns_servers[numdns];
} else {
return *IP_ADDR_ANY;
}
}
/**
* The DNS resolver client timer - handle retries and timeouts and should
* be called every DNS_TMR_INTERVAL milliseconds (every second by default).
*/
void
dns_tmr(void)
{
if (dns_pcb != NULL) {
LWIP_DEBUGF(DNS_DEBUG, ("dns_tmr: dns_check_entries\n"));
dns_check_entries();
}
}
#if DNS_LOCAL_HOSTLIST
static void
dns_init_local()
{
#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC && defined(DNS_LOCAL_HOSTLIST_INIT)
int i;
struct local_hostlist_entry *entry;
/* Dynamic: copy entries from DNS_LOCAL_HOSTLIST_INIT to list */
struct local_hostlist_entry local_hostlist_init[] = DNS_LOCAL_HOSTLIST_INIT;
for (i = 0; i < sizeof(local_hostlist_init) / sizeof(struct local_hostlist_entry); i++) {
entry = mem_malloc(sizeof(struct local_hostlist_entry));
LWIP_ASSERT("mem-error in dns_init_local", entry != NULL);
if (entry != NULL) {
struct local_hostlist_entry *init_entry = &local_hostlist_init[i];
entry->name = init_entry->name;
entry->addr = init_entry->addr;
entry->next = local_hostlist_dynamic;
local_hostlist_dynamic = entry;
}
}
#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC && defined(DNS_LOCAL_HOSTLIST_INIT) */
}
/**
* Scans the local host-list for a hostname.
*
* @param hostname Hostname to look for in the local host-list
* @return The first IP address for the hostname in the local host-list or
* INADDR_NONE if not found.
*/
static u32_t
dns_lookup_local(const char *hostname)
{
#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC
struct local_hostlist_entry *entry = local_hostlist_dynamic;
while(entry != NULL) {
if(strcmp(entry->name, hostname) == 0) {
return entry->addr;
}
entry = entry->next;
}
#else /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
int i;
for (i = 0; i < sizeof(local_hostlist_static) / sizeof(struct local_hostlist_entry); i++) {
if(strcmp(local_hostlist_static[i].name, hostname) == 0) {
return local_hostlist_static[i].addr;
}
}
#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC */
return INADDR_NONE;
}
#if DNS_LOCAL_HOSTLIST_IS_DYNAMIC
/** Remove all entries from the local host-list for a specific hostname
* and/or IP addess
*
* @param hostname hostname for which entries shall be removed from the local
* host-list
* @param addr address for which entries shall be removed from the local host-list
* @return the number of removed entries
*/
int
dns_local_removehost(const char *hostname, const struct ip_addr *addr)
{
int removed = 0;
struct local_hostlist_entry *entry = local_hostlist_dynamic;
struct local_hostlist_entry *last_entry = NULL;
while (entry != NULL) {
if (((hostname == NULL) || !strcmp(entry->name, hostname)) &&
((addr == NULL) || (entry->addr == addr->addr))) {
struct local_hostlist_entry *free_entry;
if (last_entry != NULL) {
last_entry->next = entry->next;
} else {
local_hostlist_dynamic = entry->next;
}
free_entry = entry;
entry = entry->next;
mem_free(free_entry);
removed++;
} else {
last_entry = entry;
entry = entry->next;
}
}
return removed;
}
/**
* Add a hostname/IP address pair to the local host-list.
* Duplicates are not checked.
*
* @param hostname hostname of the new entry
* @param addr IP address of the new entry
* @return ERR_OK if succeeded or ERR_MEM on memory error
*/
err_t
dns_local_addhost(const char *hostname, const struct ip_addr *addr)
{
struct local_hostlist_entry *entry;
entry = mem_malloc(sizeof(struct local_hostlist_entry));
if (entry == NULL) {
return ERR_MEM;
}
entry->name = hostname;
entry->addr = addr->addr;
entry->next = local_hostlist_dynamic;
local_hostlist_dynamic = entry;
return ERR_OK;
}
#endif /* DNS_LOCAL_HOSTLIST_IS_DYNAMIC*/
#endif /* DNS_LOCAL_HOSTLIST */
/**
* Look up a hostname in the array of known hostnames.
*
* @note This function only looks in the internal array of known
* hostnames, it does not send out a query for the hostname if none
* was found. The function dns_enqueue() can be used to send a query
* for a hostname.
*
* @param name the hostname to look up
* @return the hostname's IP address, as u32_t (instead of struct ip_addr to
* better check for failure: != INADDR_NONE) or INADDR_NONE if the hostname
* was not found in the cached dns_table.
*/
static u32_t
dns_lookup(const char *name)
{
u8_t i;
#if DNS_LOCAL_HOSTLIST || defined(DNS_LOOKUP_LOCAL_EXTERN)
u32_t addr;
#endif /* DNS_LOCAL_HOSTLIST || defined(DNS_LOOKUP_LOCAL_EXTERN) */
#if DNS_LOCAL_HOSTLIST
if ((addr = dns_lookup_local(name)) != INADDR_NONE) {
return addr;
}
#endif /* DNS_LOCAL_HOSTLIST */
#ifdef DNS_LOOKUP_LOCAL_EXTERN
if((addr = DNS_LOOKUP_LOCAL_EXTERN(name)) != INADDR_NONE) {
return addr;
}
#endif /* DNS_LOOKUP_LOCAL_EXTERN */
/* Walk through name list, return entry if found. If not, return NULL. */
for (i = 0; i < DNS_TABLE_SIZE; ++i) {
if ((dns_table[i].state == DNS_STATE_DONE) &&
(strcmp(name, dns_table[i].name) == 0)) {
LWIP_DEBUGF(DNS_DEBUG, ("dns_lookup: \"%s\": found = ", name));
ip_addr_debug_print(DNS_DEBUG, &(dns_table[i].ipaddr));
LWIP_DEBUGF(DNS_DEBUG, ("\n"));
return dns_table[i].ipaddr.addr;
}
}
return INADDR_NONE;
}
#if DNS_DOES_NAME_CHECK
/**
* Compare the "dotted" name "query" with the encoded name "response"
* to make sure an answer from the DNS server matches the current dns_table
* entry (otherwise, answers might arrive late for hostname not on the list
* any more).
*
* @param query hostname (not encoded) from the dns_table
* @param response encoded hostname in the DNS response
* @return 0: names equal; 1: names differ
*/
static u8_t
dns_compare_name(unsigned char *query, unsigned char *response)
{
unsigned char n;
do {
n = *response++;
/** @see RFC 1035 - 4.1.4. Message compression */
if ((n & 0xc0) == 0xc0) {
/* Compressed name */
break;
} else {
/* Not compressed name */
while (n > 0) {
if ((*query) != (*response)) {
return 1;
}
++response;
++query;
--n;
};
++query;
}
} while (*response != 0);
return 0;
}
#endif /* DNS_DOES_NAME_CHECK */
/**
* Walk through a compact encoded DNS name and return the end of the name.
*
* @param query encoded DNS name in the DNS server response
* @return end of the name
*/
static unsigned char *
dns_parse_name(unsigned char *query)
{
unsigned char n;
do {
n = *query++;
/** @see RFC 1035 - 4.1.4. Message compression */
if ((n & 0xc0) == 0xc0) {
/* Compressed name */
break;
} else {
/* Not compressed name */
while (n > 0) {
++query;
--n;
};
}
} while (*query != 0);
return query + 1;
}
/**
* Send a DNS query packet.
*
* @param numdns index of the DNS server in the dns_servers table
* @param name hostname to query
* @param id index of the hostname in dns_table, used as transaction ID in the
* DNS query packet
* @return ERR_OK if packet is sent; an err_t indicating the problem otherwise
*/
static err_t
dns_send(u8_t numdns, const char* name, u8_t id)
{
err_t err;
struct dns_hdr *hdr;
struct dns_query qry;
struct pbuf *p;
char *query, *nptr;
const char *pHostname;
u8_t n;
LWIP_DEBUGF(DNS_DEBUG, ("dns_send: dns_servers[%"U16_F"] \"%s\": request\n",
(u16_t)(numdns), name));
LWIP_ASSERT("dns server out of array", numdns < DNS_MAX_SERVERS);
LWIP_ASSERT("dns server has no IP address set", dns_servers[numdns].addr != 0);
/* if here, we have either a new query or a retry on a previous query to process */
p = pbuf_alloc(PBUF_TRANSPORT, SIZEOF_DNS_HDR + DNS_MAX_NAME_LENGTH +
SIZEOF_DNS_QUERY, PBUF_RAM);
if (p != NULL) {
LWIP_ASSERT("pbuf must be in one piece", p->next == NULL);
/* fill dns header */
hdr = (struct dns_hdr*)p->payload;
memset(hdr, 0, SIZEOF_DNS_HDR);
hdr->id = htons(id);
hdr->flags1 = DNS_FLAG1_RD;
hdr->numquestions = htons(1);
query = (char*)hdr + SIZEOF_DNS_HDR;
pHostname = name;
--pHostname;
/* convert hostname into suitable query format. */
do {
++pHostname;
nptr = query;
++query;
for(n = 0; *pHostname != '.' && *pHostname != 0; ++pHostname) {
*query = *pHostname;
++query;
++n;
}
*nptr = n;
} while(*pHostname != 0);
*query++='\0';
/* fill dns query */
qry.type = htons(DNS_RRTYPE_A);
qry.class = htons(DNS_RRCLASS_IN);
MEMCPY( query, &qry, SIZEOF_DNS_QUERY);
/* resize pbuf to the exact dns query */
pbuf_realloc(p, (query + SIZEOF_DNS_QUERY) - ((char*)(p->payload)));
/* connect to the server for faster receiving */
udp_connect(dns_pcb, &dns_servers[numdns], DNS_SERVER_PORT);
/* send dns packet */
err = udp_sendto(dns_pcb, p, &dns_servers[numdns], DNS_SERVER_PORT);
/* free pbuf */
pbuf_free(p);
} else {
err = ERR_MEM;
}
return err;
}
/**
* dns_check_entry() - see if pEntry has not yet been queried and, if so, sends out a query.
* Check an entry in the dns_table:
* - send out query for new entries
* - retry old pending entries on timeout (also with different servers)
* - remove completed entries from the table if their TTL has expired
*
* @param i index of the dns_table entry to check
*/
static void
dns_check_entry(u8_t i)
{
struct dns_table_entry *pEntry = &dns_table[i];
LWIP_ASSERT("array index out of bounds", i < DNS_TABLE_SIZE);
switch(pEntry->state) {
case DNS_STATE_NEW: {
/* initialize new entry */
pEntry->state = DNS_STATE_ASKING;
pEntry->numdns = 0;
pEntry->tmr = 1;
pEntry->retries = 0;
/* send DNS packet for this entry */
dns_send(pEntry->numdns, pEntry->name, i);
break;
}
case DNS_STATE_ASKING: {
if (--pEntry->tmr == 0) {
if (++pEntry->retries == DNS_MAX_RETRIES) {
if ((pEntry->numdns+1<DNS_MAX_SERVERS) && (dns_servers[pEntry->numdns+1].addr!=0)) {
/* change of server */
pEntry->numdns++;
pEntry->tmr = 1;
pEntry->retries = 0;
break;
} else {
LWIP_DEBUGF(DNS_DEBUG, ("dns_check_entry: \"%s\": timeout\n", pEntry->name));
/* call specified callback function if provided */
if (pEntry->found)
(*pEntry->found)(pEntry->name, NULL, pEntry->arg);
/* flush this entry */
pEntry->state = DNS_STATE_UNUSED;
pEntry->found = NULL;
break;
}
}
/* wait longer for the next retry */
pEntry->tmr = pEntry->retries;
/* send DNS packet for this entry */
dns_send(pEntry->numdns, pEntry->name, i);
}
break;
}
case DNS_STATE_DONE: {
/* if the time to live is nul */
if (--pEntry->ttl == 0) {
LWIP_DEBUGF(DNS_DEBUG, ("dns_check_entry: \"%s\": flush\n", pEntry->name));
/* flush this entry */
pEntry->state = DNS_STATE_UNUSED;
pEntry->found = NULL;
}
break;
}
case DNS_STATE_UNUSED:
/* nothing to do */
break;
default:
LWIP_ASSERT("unknown dns_table entry state:", 0);
break;
}
}
/**
* Call dns_check_entry for each entry in dns_table - check all entries.
*/
static void
dns_check_entries(void)
{
u8_t i;
for (i = 0; i < DNS_TABLE_SIZE; ++i) {
dns_check_entry(i);
}
}
/**
* Receive input function for DNS response packets arriving for the dns UDP pcb.
*
* @params see udp.h
*/
static void
dns_recv(void *arg, struct udp_pcb *pcb, struct pbuf *p, struct ip_addr *addr, u16_t port)
{
u8_t i;
char *pHostname;
struct dns_hdr *hdr;
struct dns_answer ans;
struct dns_table_entry *pEntry;
u8_t nquestions, nanswers;
#if (DNS_USES_STATIC_BUF == 0)
u8_t dns_payload[DNS_MSG_SIZE];
#endif /* (DNS_USES_STATIC_BUF == 0) */
#if (DNS_USES_STATIC_BUF == 2)
u8_t* dns_payload;
#endif /* (DNS_USES_STATIC_BUF == 2) */
LWIP_UNUSED_ARG(arg);
LWIP_UNUSED_ARG(pcb);
LWIP_UNUSED_ARG(addr);
LWIP_UNUSED_ARG(port);
/* is the dns message too big ? */
if (p->tot_len > DNS_MSG_SIZE) {
LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too big\n"));
/* free pbuf and return */
goto memerr1;
}
/* is the dns message big enough ? */
if (p->tot_len < (SIZEOF_DNS_HDR + SIZEOF_DNS_QUERY + SIZEOF_DNS_ANSWER)) {
LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: pbuf too small\n"));
/* free pbuf and return */
goto memerr1;
}
#if (DNS_USES_STATIC_BUF == 2)
dns_payload = mem_malloc(p->tot_len);
if (dns_payload == NULL) {
LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: mem_malloc error\n"));
/* free pbuf and return */
goto memerr1;
}
#endif /* (DNS_USES_STATIC_BUF == 2) */
/* copy dns payload inside static buffer for processing */
if (pbuf_copy_partial(p, dns_payload, p->tot_len, 0) == p->tot_len) {
/* The ID in the DNS header should be our entry into the name table. */
hdr = (struct dns_hdr*)dns_payload;
i = htons(hdr->id);
if (i < DNS_TABLE_SIZE) {
pEntry = &dns_table[i];
if(pEntry->state == DNS_STATE_ASKING) {
/* This entry is now completed. */
pEntry->state = DNS_STATE_DONE;
pEntry->err = hdr->flags2 & DNS_FLAG2_ERR_MASK;
/* We only care about the question(s) and the answers. The authrr
and the extrarr are simply discarded. */
nquestions = htons(hdr->numquestions);
nanswers = htons(hdr->numanswers);
/* Check for error. If so, call callback to inform. */
if (((hdr->flags1 & DNS_FLAG1_RESPONSE) == 0) || (pEntry->err != 0) || (nquestions != 1)) {
LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": error in flags\n", pEntry->name));
/* call callback to indicate error, clean up memory and return */
goto responseerr;
}
#if DNS_DOES_NAME_CHECK
/* Check if the name in the "question" part match with the name in the entry. */
if (dns_compare_name((unsigned char *)(pEntry->name), (unsigned char *)dns_payload + SIZEOF_DNS_HDR) != 0) {
LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": response not match to query\n", pEntry->name));
/* call callback to indicate error, clean up memory and return */
goto responseerr;
}
#endif /* DNS_DOES_NAME_CHECK */
/* Skip the name in the "question" part */
pHostname = (char *) dns_parse_name((unsigned char *)dns_payload + SIZEOF_DNS_HDR) + SIZEOF_DNS_QUERY;
while(nanswers > 0) {
/* skip answer resource record's host name */
pHostname = (char *) dns_parse_name((unsigned char *)pHostname);
/* Check for IP address type and Internet class. Others are discarded. */
MEMCPY(&ans, pHostname, SIZEOF_DNS_ANSWER);
if((ntohs(ans.type) == DNS_RRTYPE_A) && (ntohs(ans.class) == DNS_RRCLASS_IN) && (ntohs(ans.len) == sizeof(struct ip_addr)) ) {
/* read the answer resource record's TTL, and maximize it if needed */
pEntry->ttl = ntohl(ans.ttl);
if (pEntry->ttl > DNS_MAX_TTL) {
pEntry->ttl = DNS_MAX_TTL;
}
/* read the IP address after answer resource record's header */
MEMCPY( &(pEntry->ipaddr), (pHostname+SIZEOF_DNS_ANSWER), sizeof(struct ip_addr));
LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": response = ", pEntry->name));
ip_addr_debug_print(DNS_DEBUG, (&(pEntry->ipaddr)));
LWIP_DEBUGF(DNS_DEBUG, ("\n"));
/* call specified callback function if provided */
if (pEntry->found) {
(*pEntry->found)(pEntry->name, &pEntry->ipaddr, pEntry->arg);
}
/* deallocate memory and return */
goto memerr2;
} else {
pHostname = pHostname + SIZEOF_DNS_ANSWER + htons(ans.len);
}
--nanswers;
}
LWIP_DEBUGF(DNS_DEBUG, ("dns_recv: \"%s\": error in response\n", pEntry->name));
/* call callback to indicate error, clean up memory and return */
goto responseerr;
}
}
}
/* deallocate memory and return */
goto memerr2;
responseerr:
/* ERROR: call specified callback function with NULL as name to indicate an error */
if (pEntry->found) {
(*pEntry->found)(pEntry->name, NULL, pEntry->arg);
}
/* flush this entry */
pEntry->state = DNS_STATE_UNUSED;
pEntry->found = NULL;
memerr2:
#if (DNS_USES_STATIC_BUF == 2)
/* free dns buffer */
mem_free(dns_payload);
#endif /* (DNS_USES_STATIC_BUF == 2) */
memerr1:
/* free pbuf */
pbuf_free(p);
return;
}
/**
* Queues a new hostname to resolve and sends out a DNS query for that hostname
*
* @param name the hostname that is to be queried
* @param found a callback founction to be called on success, failure or timeout
* @param callback_arg argument to pass to the callback function
* @return @return a err_t return code.
*/
static err_t
dns_enqueue(const char *name, dns_found_callback found, void *callback_arg)
{
u8_t i;
u8_t lseq, lseqi;
struct dns_table_entry *pEntry = NULL;
/* search an unused entry, or the oldest one */
lseq = lseqi = 0;
for (i = 0; i < DNS_TABLE_SIZE; ++i) {
pEntry = &dns_table[i];
/* is it an unused entry ? */
if (pEntry->state == DNS_STATE_UNUSED)
break;
/* check if this is the oldest completed entry */
if (pEntry->state == DNS_STATE_DONE) {
if ((dns_seqno - pEntry->seqno) > lseq) {
lseq = dns_seqno - pEntry->seqno;
lseqi = i;
}
}
}
/* if we don't have found an unused entry, use the oldest completed one */
if (i == DNS_TABLE_SIZE) {
if ((lseqi >= DNS_TABLE_SIZE) || (dns_table[lseqi].state != DNS_STATE_DONE)) {
/* no entry can't be used now, table is full */
LWIP_DEBUGF(DNS_DEBUG, ("dns_enqueue: \"%s\": DNS entries table is full\n", name));
return ERR_MEM;
} else {
/* use the oldest completed one */
i = lseqi;
pEntry = &dns_table[i];
}
}
/* use this entry */
LWIP_DEBUGF(DNS_DEBUG, ("dns_enqueue: \"%s\": use DNS entry %"U16_F"\n", name, (u16_t)(i)));
/* fill the entry */
pEntry->state = DNS_STATE_NEW;
pEntry->seqno = dns_seqno++;
pEntry->found = found;
pEntry->arg = callback_arg;
strcpy(pEntry->name, name);
/* force to send query without waiting timer */
dns_check_entry(i);
/* dns query is enqueued */
return ERR_INPROGRESS;
}
/**
* Resolve a hostname (string) into an IP address.
* NON-BLOCKING callback version for use with raw API!!!
*
* Returns immediately with one of err_t return codes:
* - ERR_OK if hostname is a valid IP address string or the host
* name is already in the local names table.
* - ERR_INPROGRESS enqueue a request to be sent to the DNS server
* for resolution if no errors are present.
*
* @param hostname the hostname that is to be queried
* @param addr pointer to a struct ip_addr where to store the address if it is already
* cached in the dns_table (only valid if ERR_OK is returned!)
* @param found a callback function to be called on success, failure or timeout (only if
* ERR_INPROGRESS is returned!)
* @param callback_arg argument to pass to the callback function
* @return a err_t return code.
*/
err_t
dns_gethostbyname(const char *hostname, struct ip_addr *addr, dns_found_callback found,
void *callback_arg)
{
/* not initialized or no valid server yet, or invalid addr pointer
* or invalid hostname or invalid hostname length */
if ((dns_pcb == NULL) || (addr == NULL) ||
(!hostname) || (!hostname[0]) ||
(strlen(hostname) >= DNS_MAX_NAME_LENGTH)) {
return ERR_VAL;
}
#if LWIP_HAVE_LOOPIF
if (strcmp(hostname,"localhost")==0) {
addr->addr = htonl(INADDR_LOOPBACK);
return ERR_OK;
}
#endif /* LWIP_HAVE_LOOPIF */
/* host name already in octet notation? set ip addr and return ERR_OK
* already have this address cached? */
if (((addr->addr = inet_addr(hostname)) != INADDR_NONE) ||
((addr->addr = dns_lookup(hostname)) != INADDR_NONE)) {
return ERR_OK;
}
/* queue query with specified callback */
return dns_enqueue(hostname, found, callback_arg);
}
#endif /* LWIP_DNS */

276
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/init.c Normal file
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* Modules initialization
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/init.h"
#include "lwip/stats.h"
#include "lwip/sys.h"
#include "lwip/mem.h"
#include "lwip/memp.h"
#include "lwip/pbuf.h"
#include "lwip/netif.h"
#include "lwip/sockets.h"
#include "lwip/ip.h"
#include "lwip/raw.h"
#include "lwip/udp.h"
#include "lwip/tcp.h"
#include "lwip/snmp_msg.h"
#include "lwip/autoip.h"
#include "lwip/igmp.h"
#include "lwip/dns.h"
#include "netif/etharp.h"
/* Compile-time sanity checks for configuration errors.
* These can be done independently of LWIP_DEBUG, without penalty.
*/
#ifndef BYTE_ORDER
#error "BYTE_ORDER is not defined, you have to define it in your cc.h"
#endif
#if (!IP_SOF_BROADCAST && IP_SOF_BROADCAST_RECV)
#error "If you want to use broadcast filter per pcb on recv operations, you have to define IP_SOF_BROADCAST=1 in your lwipopts.h"
#endif
#if (!LWIP_ARP && ARP_QUEUEING)
#error "If you want to use ARP Queueing, you have to define LWIP_ARP=1 in your lwipopts.h"
#endif
#if (!LWIP_UDP && LWIP_UDPLITE)
#error "If you want to use UDP Lite, you have to define LWIP_UDP=1 in your lwipopts.h"
#endif
#if (!LWIP_UDP && LWIP_SNMP)
#error "If you want to use SNMP, you have to define LWIP_UDP=1 in your lwipopts.h"
#endif
#if (!LWIP_UDP && LWIP_DHCP)
#error "If you want to use DHCP, you have to define LWIP_UDP=1 in your lwipopts.h"
#endif
#if (!LWIP_UDP && LWIP_IGMP)
#error "If you want to use IGMP, you have to define LWIP_UDP=1 in your lwipopts.h"
#endif
#if (!LWIP_UDP && LWIP_DNS)
#error "If you want to use DNS, you have to define LWIP_UDP=1 in your lwipopts.h"
#endif
#if (LWIP_ARP && (ARP_TABLE_SIZE > 0x7f))
#error "If you want to use ARP, ARP_TABLE_SIZE must fit in an s8_t, so, you have to reduce it in your lwipopts.h"
#endif
#if (LWIP_ARP && ARP_QUEUEING && (MEMP_NUM_ARP_QUEUE<=0))
#error "If you want to use ARP Queueing, you have to define MEMP_NUM_ARP_QUEUE>=1 in your lwipopts.h"
#endif
#if (LWIP_RAW && (MEMP_NUM_RAW_PCB<=0))
#error "If you want to use RAW, you have to define MEMP_NUM_RAW_PCB>=1 in your lwipopts.h"
#endif
#if (LWIP_UDP && (MEMP_NUM_UDP_PCB<=0))
#error "If you want to use UDP, you have to define MEMP_NUM_UDP_PCB>=1 in your lwipopts.h"
#endif
#if (LWIP_TCP && (MEMP_NUM_TCP_PCB<=0))
#error "If you want to use TCP, you have to define MEMP_NUM_TCP_PCB>=1 in your lwipopts.h"
#endif
#if (LWIP_TCP && (TCP_WND > 0xffff))
#error "If you want to use TCP, TCP_WND must fit in an u16_t, so, you have to reduce it in your lwipopts.h"
#endif
#if (LWIP_TCP && (TCP_SND_QUEUELEN > 0xffff))
#error "If you want to use TCP, TCP_SND_QUEUELEN must fit in an u16_t, so, you have to reduce it in your lwipopts.h"
#endif
#if (LWIP_TCP && ((TCP_MAXRTX > 12) || (TCP_SYNMAXRTX > 12)))
#error "If you want to use TCP, TCP_MAXRTX and TCP_SYNMAXRTX must less or equal to 12 (due to tcp_backoff table), so, you have to reduce them in your lwipopts.h"
#endif
#if (LWIP_TCP && TCP_LISTEN_BACKLOG && (TCP_DEFAULT_LISTEN_BACKLOG < 0) || (TCP_DEFAULT_LISTEN_BACKLOG > 0xff))
#error "If you want to use TCP backlog, TCP_DEFAULT_LISTEN_BACKLOG must fit into an u8_t"
#endif
#if (LWIP_IGMP && (MEMP_NUM_IGMP_GROUP<=1))
#error "If you want to use IGMP, you have to define MEMP_NUM_IGMP_GROUP>1 in your lwipopts.h"
#endif
#if (PPP_SUPPORT && (NO_SYS==1))
#error "If you want to use PPP, you have to define NO_SYS=0 in your lwipopts.h"
#endif
#if (LWIP_NETIF_API && (NO_SYS==1))
#error "If you want to use NETIF API, you have to define NO_SYS=0 in your lwipopts.h"
#endif
#if ((LWIP_SOCKET || LWIP_NETCONN) && (NO_SYS==1))
#error "If you want to use Sequential API, you have to define NO_SYS=0 in your lwipopts.h"
#endif
#if ((LWIP_NETCONN || LWIP_SOCKET) && (MEMP_NUM_TCPIP_MSG_API<=0))
#error "If you want to use Sequential API, you have to define MEMP_NUM_TCPIP_MSG_API>=1 in your lwipopts.h"
#endif
#if (!LWIP_NETCONN && LWIP_SOCKET)
#error "If you want to use Socket API, you have to define LWIP_NETCONN=1 in your lwipopts.h"
#endif
#if (((!LWIP_DHCP) || (!LWIP_AUTOIP)) && LWIP_DHCP_AUTOIP_COOP)
#error "If you want to use DHCP/AUTOIP cooperation mode, you have to define LWIP_DHCP=1 and LWIP_AUTOIP=1 in your lwipopts.h"
#endif
#if (((!LWIP_DHCP) || (!LWIP_ARP)) && DHCP_DOES_ARP_CHECK)
#error "If you want to use DHCP ARP checking, you have to define LWIP_DHCP=1 and LWIP_ARP=1 in your lwipopts.h"
#endif
#if (!LWIP_ARP && LWIP_AUTOIP)
#error "If you want to use AUTOIP, you have to define LWIP_ARP=1 in your lwipopts.h"
#endif
#if (LWIP_SNMP && (SNMP_CONCURRENT_REQUESTS<=0))
#error "If you want to use SNMP, you have to define SNMP_CONCURRENT_REQUESTS>=1 in your lwipopts.h"
#endif
#if (LWIP_SNMP && (SNMP_TRAP_DESTINATIONS<=0))
#error "If you want to use SNMP, you have to define SNMP_TRAP_DESTINATIONS>=1 in your lwipopts.h"
#endif
#if (LWIP_TCP && ((LWIP_EVENT_API && LWIP_CALLBACK_API) || (!LWIP_EVENT_API && !LWIP_CALLBACK_API)))
#error "One and exactly one of LWIP_EVENT_API and LWIP_CALLBACK_API has to be enabled in your lwipopts.h"
#endif
/* There must be sufficient timeouts, taking into account requirements of the subsystems. */
#if ((NO_SYS==0) && (MEMP_NUM_SYS_TIMEOUT < (LWIP_TCP + IP_REASSEMBLY + LWIP_ARP + (2*LWIP_DHCP) + LWIP_AUTOIP + LWIP_IGMP + LWIP_DNS + PPP_SUPPORT)))
#error "MEMP_NUM_SYS_TIMEOUT is too low to accomodate all required timeouts"
#endif
#if (IP_REASSEMBLY && (MEMP_NUM_REASSDATA > IP_REASS_MAX_PBUFS))
#error "MEMP_NUM_REASSDATA > IP_REASS_MAX_PBUFS doesn't make sense since each struct ip_reassdata must hold 2 pbufs at least!"
#endif
#if (MEM_LIBC_MALLOC && MEM_USE_POOLS)
#error "MEM_LIBC_MALLOC and MEM_USE_POOLS may not both be simultaneously enabled in your lwipopts.h"
#endif
#if (MEM_USE_POOLS && !MEMP_USE_CUSTOM_POOLS)
#error "MEM_USE_POOLS requires custom pools (MEMP_USE_CUSTOM_POOLS) to be enabled in your lwipopts.h"
#endif
#if (PBUF_POOL_BUFSIZE <= MEM_ALIGNMENT)
#error "PBUF_POOL_BUFSIZE must be greater than MEM_ALIGNMENT or the offset may take the full first pbuf"
#endif
#if (TCP_QUEUE_OOSEQ && !LWIP_TCP)
#error "TCP_QUEUE_OOSEQ requires LWIP_TCP"
#endif
#if (DNS_LOCAL_HOSTLIST && !DNS_LOCAL_HOSTLIST_IS_DYNAMIC && !(defined(DNS_LOCAL_HOSTLIST_INIT)))
#error "you have to define define DNS_LOCAL_HOSTLIST_INIT {{'host1', 0x123}, {'host2', 0x234}} to initialize DNS_LOCAL_HOSTLIST"
#endif
#if PPP_SUPPORT && !PPPOS_SUPPORT & !PPPOE_SUPPORT
#error "PPP_SUPPORT needs either PPPOS_SUPPORT or PPPOE_SUPPORT turned on"
#endif
/* Compile-time checks for deprecated options.
*/
#ifdef MEMP_NUM_TCPIP_MSG
#error "MEMP_NUM_TCPIP_MSG option is deprecated. Remove it from your lwipopts.h."
#endif
#ifdef MEMP_NUM_API_MSG
#error "MEMP_NUM_API_MSG option is deprecated. Remove it from your lwipopts.h."
#endif
#ifdef TCP_REXMIT_DEBUG
#error "TCP_REXMIT_DEBUG option is deprecated. Remove it from your lwipopts.h."
#endif
#ifdef RAW_STATS
#error "RAW_STATS option is deprecated. Remove it from your lwipopts.h."
#endif
#ifdef ETHARP_QUEUE_FIRST
#error "ETHARP_QUEUE_FIRST option is deprecated. Remove it from your lwipopts.h."
#endif
#ifdef ETHARP_ALWAYS_INSERT
#error "ETHARP_ALWAYS_INSERT option is deprecated. Remove it from your lwipopts.h."
#endif
#if SO_REUSE
/* I removed the lot since this was an ugly hack. It broke the raw-API.
It also came with many ugly goto's, Christiaan Simons. */
#error "SO_REUSE currently unavailable, this was a hack"
#endif
#ifdef LWIP_DEBUG
static void
lwip_sanity_check(void)
{
/* Warnings */
#if LWIP_NETCONN
if (MEMP_NUM_NETCONN > (MEMP_NUM_TCP_PCB+MEMP_NUM_TCP_PCB_LISTEN+MEMP_NUM_UDP_PCB+MEMP_NUM_RAW_PCB))
LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: MEMP_NUM_NETCONN should be less than the sum of MEMP_NUM_{TCP,RAW,UDP}_PCB+MEMP_NUM_TCP_PCB_LISTEN\n"));
#endif /* LWIP_NETCONN */
#if LWIP_TCP
if (MEMP_NUM_TCP_SEG < TCP_SND_QUEUELEN)
LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: MEMP_NUM_TCP_SEG should be at least as big as TCP_SND_QUEUELEN\n"));
if (TCP_SND_BUF < 2 * TCP_MSS)
LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SND_BUF must be at least as much as (2 * TCP_MSS) for things to work smoothly\n"));
if (TCP_SND_QUEUELEN < (2 * (TCP_SND_BUF/TCP_MSS)))
LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SND_QUEUELEN must be at least as much as (2 * TCP_SND_BUF/TCP_MSS) for things to work\n"));
if (TCP_SNDLOWAT > TCP_SND_BUF)
LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_SNDLOWAT must be less than or equal to TCP_SND_BUF.\n"));
if (TCP_WND > (PBUF_POOL_SIZE*PBUF_POOL_BUFSIZE))
LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_WND is larger than space provided by PBUF_POOL_SIZE*PBUF_POOL_BUFSIZE\n"));
if (TCP_WND < TCP_MSS)
LWIP_PLATFORM_DIAG(("lwip_sanity_check: WARNING: TCP_WND is smaller than MSS\n"));
#endif /* LWIP_TCP */
}
#else /* LWIP_DEBUG */
#define lwip_sanity_check()
#endif /* LWIP_DEBUG */
/**
* Perform Sanity check of user-configurable values, and initialize all modules.
*/
void
lwip_init(void)
{
/* Sanity check user-configurable values */
lwip_sanity_check();
/* Modules initialization */
stats_init();
sys_init();
mem_init();
memp_init();
pbuf_init();
netif_init();
#if LWIP_SOCKET
lwip_socket_init();
#endif /* LWIP_SOCKET */
ip_init();
#if LWIP_ARP
etharp_init();
#endif /* LWIP_ARP */
#if LWIP_RAW
raw_init();
#endif /* LWIP_RAW */
#if LWIP_UDP
udp_init();
#endif /* LWIP_UDP */
#if LWIP_TCP
tcp_init();
#endif /* LWIP_TCP */
#if LWIP_SNMP
snmp_init();
#endif /* LWIP_SNMP */
#if LWIP_AUTOIP
autoip_init();
#endif /* LWIP_AUTOIP */
#if LWIP_IGMP
igmp_init();
#endif /* LWIP_IGMP */
#if LWIP_DNS
dns_init();
#endif /* LWIP_DNS */
}

499
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/autoip.c Normal file
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* AutoIP Automatic LinkLocal IP Configuration
*
*/
/*
*
* Copyright (c) 2007 Dominik Spies <kontakt@dspies.de>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* Author: Dominik Spies <kontakt@dspies.de>
*
* This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform
* with RFC 3927.
*
*
* Please coordinate changes and requests with Dominik Spies
* <kontakt@dspies.de>
*/
/*******************************************************************************
* USAGE:
*
* define LWIP_AUTOIP 1 in your lwipopts.h
*
* If you don't use tcpip.c (so, don't call, you don't call tcpip_init):
* - First, call autoip_init().
* - call autoip_tmr() all AUTOIP_TMR_INTERVAL msces,
* that should be defined in autoip.h.
* I recommend a value of 100. The value must divide 1000 with a remainder almost 0.
* Possible values are 1000, 500, 333, 250, 200, 166, 142, 125, 111, 100 ....
*
* Without DHCP:
* - Call autoip_start() after netif_add().
*
* With DHCP:
* - define LWIP_DHCP_AUTOIP_COOP 1 in your lwipopts.h.
* - Configure your DHCP Client.
*
*/
#include "lwip/opt.h"
#if LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */
#include "lwip/mem.h"
#include "lwip/udp.h"
#include "lwip/ip_addr.h"
#include "lwip/netif.h"
#include "lwip/autoip.h"
#include "netif/etharp.h"
#include <stdlib.h>
#include <string.h>
/* 169.254.0.0 */
#define AUTOIP_NET 0xA9FE0000
/* 169.254.1.0 */
#define AUTOIP_RANGE_START (AUTOIP_NET | 0x0100)
/* 169.254.254.255 */
#define AUTOIP_RANGE_END (AUTOIP_NET | 0xFEFF)
/** Pseudo random macro based on netif informations.
* You could use "rand()" from the C Library if you define LWIP_AUTOIP_RAND in lwipopts.h */
#ifndef LWIP_AUTOIP_RAND
#define LWIP_AUTOIP_RAND(netif) ( (((u32_t)((netif->hwaddr[5]) & 0xff) << 24) | \
((u32_t)((netif->hwaddr[3]) & 0xff) << 16) | \
((u32_t)((netif->hwaddr[2]) & 0xff) << 8) | \
((u32_t)((netif->hwaddr[4]) & 0xff))) + \
(netif->autoip?netif->autoip->tried_llipaddr:0))
#endif /* LWIP_AUTOIP_RAND */
/**
* Macro that generates the initial IP address to be tried by AUTOIP.
* If you want to override this, define it to something else in lwipopts.h.
*/
#ifndef LWIP_AUTOIP_CREATE_SEED_ADDR
#define LWIP_AUTOIP_CREATE_SEED_ADDR(netif) \
htonl(AUTOIP_RANGE_START + ((u32_t)(((u8_t)(netif->hwaddr[4])) | \
((u32_t)((u8_t)(netif->hwaddr[5]))) << 8)))
#endif /* LWIP_AUTOIP_CREATE_SEED_ADDR */
/* static functions */
static void autoip_handle_arp_conflict(struct netif *netif);
/* creates a pseudo random LL IP-Address for a network interface */
static void autoip_create_addr(struct netif *netif, struct ip_addr *ipaddr);
/* sends an ARP probe */
static err_t autoip_arp_probe(struct netif *netif);
/* sends an ARP announce */
static err_t autoip_arp_announce(struct netif *netif);
/* configure interface for use with current LL IP-Address */
static err_t autoip_bind(struct netif *netif);
/* start sending probes for llipaddr */
static void autoip_start_probing(struct netif *netif);
/**
* Initialize this module
*/
void
autoip_init(void)
{
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_init()\n"));
}
/**
* Handle a IP address conflict after an ARP conflict detection
*/
static void
autoip_handle_arp_conflict(struct netif *netif)
{
/* Somehow detect if we are defending or retreating */
unsigned char defend = 1; /* tbd */
if(defend) {
if(netif->autoip->lastconflict > 0) {
/* retreat, there was a conflicting ARP in the last
* DEFEND_INTERVAL seconds
*/
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("autoip_handle_arp_conflict(): we are defending, but in DEFEND_INTERVAL, retreating\n"));
/* TODO: close all TCP sessions */
autoip_start(netif);
} else {
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("autoip_handle_arp_conflict(): we are defend, send ARP Announce\n"));
autoip_arp_announce(netif);
netif->autoip->lastconflict = DEFEND_INTERVAL * AUTOIP_TICKS_PER_SECOND;
}
} else {
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("autoip_handle_arp_conflict(): we do not defend, retreating\n"));
/* TODO: close all TCP sessions */
autoip_start(netif);
}
}
/**
* Create an IP-Address out of range 169.254.1.0 to 169.254.254.255
*
* @param netif network interface on which create the IP-Address
* @param ipaddr ip address to initialize
*/
static void
autoip_create_addr(struct netif *netif, struct ip_addr *ipaddr)
{
/* Here we create an IP-Address out of range 169.254.1.0 to 169.254.254.255
* compliant to RFC 3927 Section 2.1
* We have 254 * 256 possibilities */
u32_t addr = ntohl(LWIP_AUTOIP_CREATE_SEED_ADDR(netif));
addr += netif->autoip->tried_llipaddr;
addr = AUTOIP_NET | (addr & 0xffff);
/* Now, 169.254.0.0 <= addr <= 169.254.255.255 */
if (addr < AUTOIP_RANGE_START) {
addr += AUTOIP_RANGE_END - AUTOIP_RANGE_START + 1;
}
if (addr > AUTOIP_RANGE_END) {
addr -= AUTOIP_RANGE_END - AUTOIP_RANGE_START + 1;
}
LWIP_ASSERT("AUTOIP address not in range", (addr >= AUTOIP_RANGE_START) &&
(addr <= AUTOIP_RANGE_END));
ipaddr->addr = htonl(addr);
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("autoip_create_addr(): tried_llipaddr=%"U16_F", 0x%08"X32_F"\n",
(u16_t)(netif->autoip->tried_llipaddr), (u32_t)(ipaddr->addr)));
}
/**
* Sends an ARP probe from a network interface
*
* @param netif network interface used to send the probe
*/
static err_t
autoip_arp_probe(struct netif *netif)
{
return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, &ethbroadcast,
(struct eth_addr *)netif->hwaddr, IP_ADDR_ANY, &ethzero,
&netif->autoip->llipaddr, ARP_REQUEST);
}
/**
* Sends an ARP announce from a network interface
*
* @param netif network interface used to send the announce
*/
static err_t
autoip_arp_announce(struct netif *netif)
{
return etharp_raw(netif, (struct eth_addr *)netif->hwaddr, &ethbroadcast,
(struct eth_addr *)netif->hwaddr, &netif->autoip->llipaddr, &ethzero,
&netif->autoip->llipaddr, ARP_REQUEST);
}
/**
* Configure interface for use with current LL IP-Address
*
* @param netif network interface to configure with current LL IP-Address
*/
static err_t
autoip_bind(struct netif *netif)
{
struct autoip *autoip = netif->autoip;
struct ip_addr sn_mask, gw_addr;
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE,
("autoip_bind(netif=%p) %c%c%"U16_F" 0x%08"X32_F"\n",
(void*)netif, netif->name[0], netif->name[1], (u16_t)netif->num, autoip->llipaddr.addr));
IP4_ADDR(&sn_mask, 255, 255, 0, 0);
IP4_ADDR(&gw_addr, 0, 0, 0, 0);
netif_set_ipaddr(netif, &autoip->llipaddr);
netif_set_netmask(netif, &sn_mask);
netif_set_gw(netif, &gw_addr);
/* bring the interface up */
netif_set_up(netif);
return ERR_OK;
}
/**
* Start AutoIP client
*
* @param netif network interface on which start the AutoIP client
*/
err_t
autoip_start(struct netif *netif)
{
struct autoip *autoip = netif->autoip;
err_t result = ERR_OK;
if(netif_is_up(netif)) {
netif_set_down(netif);
}
/* Set IP-Address, Netmask and Gateway to 0 to make sure that
* ARP Packets are formed correctly
*/
netif->ip_addr.addr = 0;
netif->netmask.addr = 0;
netif->gw.addr = 0;
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("autoip_start(netif=%p) %c%c%"U16_F"\n", (void*)netif, netif->name[0],
netif->name[1], (u16_t)netif->num));
if(autoip == NULL) {
/* no AutoIP client attached yet? */
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE,
("autoip_start(): starting new AUTOIP client\n"));
autoip = mem_malloc(sizeof(struct autoip));
if(autoip == NULL) {
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE,
("autoip_start(): could not allocate autoip\n"));
return ERR_MEM;
}
memset( autoip, 0, sizeof(struct autoip));
/* store this AutoIP client in the netif */
netif->autoip = autoip;
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_start(): allocated autoip"));
} else {
autoip->state = AUTOIP_STATE_OFF;
autoip->ttw = 0;
autoip->sent_num = 0;
memset(&autoip->llipaddr, 0, sizeof(struct ip_addr));
autoip->lastconflict = 0;
}
autoip_create_addr(netif, &(autoip->llipaddr));
autoip->tried_llipaddr++;
autoip_start_probing(netif);
return result;
}
static void
autoip_start_probing(struct netif *netif)
{
struct autoip *autoip = netif->autoip;
autoip->state = AUTOIP_STATE_PROBING;
autoip->sent_num = 0;
/* time to wait to first probe, this is randomly
* choosen out of 0 to PROBE_WAIT seconds.
* compliant to RFC 3927 Section 2.2.1
*/
autoip->ttw = (u16_t)(LWIP_AUTOIP_RAND(netif) % (PROBE_WAIT * AUTOIP_TICKS_PER_SECOND));
/*
* if we tried more then MAX_CONFLICTS we must limit our rate for
* accquiring and probing address
* compliant to RFC 3927 Section 2.2.1
*/
if(autoip->tried_llipaddr > MAX_CONFLICTS) {
autoip->ttw = RATE_LIMIT_INTERVAL * AUTOIP_TICKS_PER_SECOND;
}
}
/**
* Handle a possible change in the network configuration.
*
* If there is an AutoIP address configured, take the interface down
* and begin probing with the same address.
*/
void
autoip_network_changed(struct netif *netif)
{
if (netif->autoip && netif->autoip->state != AUTOIP_STATE_OFF) {
netif_set_down(netif);
autoip_start_probing(netif);
}
}
/**
* Stop AutoIP client
*
* @param netif network interface on which stop the AutoIP client
*/
err_t
autoip_stop(struct netif *netif)
{
netif->autoip->state = AUTOIP_STATE_OFF;
netif_set_down(netif);
return ERR_OK;
}
/**
* Has to be called in loop every AUTOIP_TMR_INTERVAL milliseconds
*/
void
autoip_tmr()
{
struct netif *netif = netif_list;
/* loop through netif's */
while (netif != NULL) {
/* only act on AutoIP configured interfaces */
if (netif->autoip != NULL) {
if(netif->autoip->lastconflict > 0) {
netif->autoip->lastconflict--;
}
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE,
("autoip_tmr() AutoIP-State: %"U16_F", ttw=%"U16_F"\n",
(u16_t)(netif->autoip->state), netif->autoip->ttw));
switch(netif->autoip->state) {
case AUTOIP_STATE_PROBING:
if(netif->autoip->ttw > 0) {
netif->autoip->ttw--;
} else {
if(netif->autoip->sent_num >= PROBE_NUM) {
netif->autoip->state = AUTOIP_STATE_ANNOUNCING;
netif->autoip->sent_num = 0;
netif->autoip->ttw = ANNOUNCE_WAIT * AUTOIP_TICKS_PER_SECOND;
} else {
autoip_arp_probe(netif);
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE,
("autoip_tmr() PROBING Sent Probe\n"));
netif->autoip->sent_num++;
/* calculate time to wait to next probe */
netif->autoip->ttw = (u16_t)((LWIP_AUTOIP_RAND(netif) %
((PROBE_MAX - PROBE_MIN) * AUTOIP_TICKS_PER_SECOND) ) +
PROBE_MIN * AUTOIP_TICKS_PER_SECOND);
}
}
break;
case AUTOIP_STATE_ANNOUNCING:
if(netif->autoip->ttw > 0) {
netif->autoip->ttw--;
} else {
if(netif->autoip->sent_num == 0) {
/* We are here the first time, so we waited ANNOUNCE_WAIT seconds
* Now we can bind to an IP address and use it.
*
* autoip_bind calls netif_set_up. This triggers a gratuitous ARP
* which counts as an announcement.
*/
autoip_bind(netif);
} else {
autoip_arp_announce(netif);
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE,
("autoip_tmr() ANNOUNCING Sent Announce\n"));
}
netif->autoip->ttw = ANNOUNCE_INTERVAL * AUTOIP_TICKS_PER_SECOND;
netif->autoip->sent_num++;
if(netif->autoip->sent_num >= ANNOUNCE_NUM) {
netif->autoip->state = AUTOIP_STATE_BOUND;
netif->autoip->sent_num = 0;
netif->autoip->ttw = 0;
}
}
break;
}
}
/* proceed to next network interface */
netif = netif->next;
}
}
/**
* Handles every incoming ARP Packet, called by etharp_arp_input.
*
* @param netif network interface to use for autoip processing
* @param hdr Incoming ARP packet
*/
void
autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr)
{
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE, ("autoip_arp_reply()\n"));
if ((netif->autoip != NULL) && (netif->autoip->state != AUTOIP_STATE_OFF)) {
/* when ip.src == llipaddr && hw.src != netif->hwaddr
*
* when probing ip.dst == llipaddr && hw.src != netif->hwaddr
* we have a conflict and must solve it
*/
struct ip_addr sipaddr, dipaddr;
struct eth_addr netifaddr;
netifaddr.addr[0] = netif->hwaddr[0];
netifaddr.addr[1] = netif->hwaddr[1];
netifaddr.addr[2] = netif->hwaddr[2];
netifaddr.addr[3] = netif->hwaddr[3];
netifaddr.addr[4] = netif->hwaddr[4];
netifaddr.addr[5] = netif->hwaddr[5];
/* Copy struct ip_addr2 to aligned ip_addr, to support compilers without
* structure packing (not using structure copy which breaks strict-aliasing rules).
*/
SMEMCPY(&sipaddr, &hdr->sipaddr, sizeof(sipaddr));
SMEMCPY(&dipaddr, &hdr->dipaddr, sizeof(dipaddr));
if ((netif->autoip->state == AUTOIP_STATE_PROBING) ||
((netif->autoip->state == AUTOIP_STATE_ANNOUNCING) &&
(netif->autoip->sent_num == 0))) {
/* RFC 3927 Section 2.2.1:
* from beginning to after ANNOUNCE_WAIT
* seconds we have a conflict if
* ip.src == llipaddr OR
* ip.dst == llipaddr && hw.src != own hwaddr
*/
if ((ip_addr_cmp(&sipaddr, &netif->autoip->llipaddr)) ||
(ip_addr_cmp(&dipaddr, &netif->autoip->llipaddr) &&
!eth_addr_cmp(&netifaddr, &hdr->shwaddr))) {
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
("autoip_arp_reply(): Probe Conflict detected\n"));
autoip_start(netif);
}
} else {
/* RFC 3927 Section 2.5:
* in any state we have a conflict if
* ip.src == llipaddr && hw.src != own hwaddr
*/
if (ip_addr_cmp(&sipaddr, &netif->autoip->llipaddr) &&
!eth_addr_cmp(&netifaddr, &hdr->shwaddr)) {
LWIP_DEBUGF(AUTOIP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE | LWIP_DBG_LEVEL_WARNING,
("autoip_arp_reply(): Conflicting ARP-Packet detected\n"));
autoip_handle_arp_conflict(netif);
}
}
}
}
#endif /* LWIP_AUTOIP */

333
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/icmp.c Normal file
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@ -0,0 +1,333 @@
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* ICMP - Internet Control Message Protocol
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
/* Some ICMP messages should be passed to the transport protocols. This
is not implemented. */
#include "lwip/opt.h"
#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */
#include "lwip/icmp.h"
#include "lwip/inet.h"
#include "lwip/inet_chksum.h"
#include "lwip/ip.h"
#include "lwip/def.h"
#include "lwip/stats.h"
#include "lwip/snmp.h"
#include <string.h>
/** Small optimization: set to 0 if incoming PBUF_POOL pbuf always can be
* used to modify and send a response packet (and to 1 if this is not the case,
* e.g. when link header is stripped of when receiving) */
#ifndef LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
#define LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN 1
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
/* The amount of data from the original packet to return in a dest-unreachable */
#define ICMP_DEST_UNREACH_DATASIZE 8
static void icmp_send_response(struct pbuf *p, u8_t type, u8_t code);
/**
* Processes ICMP input packets, called from ip_input().
*
* Currently only processes icmp echo requests and sends
* out the echo response.
*
* @param p the icmp echo request packet, p->payload pointing to the ip header
* @param inp the netif on which this packet was received
*/
void
icmp_input(struct pbuf *p, struct netif *inp)
{
u8_t type;
#ifdef LWIP_DEBUG
u8_t code;
#endif /* LWIP_DEBUG */
struct icmp_echo_hdr *iecho;
struct ip_hdr *iphdr;
struct ip_addr tmpaddr;
s16_t hlen;
ICMP_STATS_INC(icmp.recv);
snmp_inc_icmpinmsgs();
iphdr = p->payload;
hlen = IPH_HL(iphdr) * 4;
if (pbuf_header(p, -hlen) || (p->tot_len < sizeof(u16_t)*2)) {
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: short ICMP (%"U16_F" bytes) received\n", p->tot_len));
goto lenerr;
}
type = *((u8_t *)p->payload);
#ifdef LWIP_DEBUG
code = *(((u8_t *)p->payload)+1);
#endif /* LWIP_DEBUG */
switch (type) {
case ICMP_ECHO:
#if !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING
{
int accepted = 1;
#if !LWIP_MULTICAST_PING
/* multicast destination address? */
if (ip_addr_ismulticast(&iphdr->dest)) {
accepted = 0;
}
#endif /* LWIP_MULTICAST_PING */
#if !LWIP_BROADCAST_PING
/* broadcast destination address? */
if (ip_addr_isbroadcast(&iphdr->dest, inp)) {
accepted = 0;
}
#endif /* LWIP_BROADCAST_PING */
/* broadcast or multicast destination address not acceptd? */
if (!accepted) {
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: Not echoing to multicast or broadcast pings\n"));
ICMP_STATS_INC(icmp.err);
pbuf_free(p);
return;
}
}
#endif /* !LWIP_MULTICAST_PING || !LWIP_BROADCAST_PING */
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ping\n"));
if (p->tot_len < sizeof(struct icmp_echo_hdr)) {
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: bad ICMP echo received\n"));
goto lenerr;
}
if (inet_chksum_pbuf(p) != 0) {
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: checksum failed for received ICMP echo\n"));
pbuf_free(p);
ICMP_STATS_INC(icmp.chkerr);
snmp_inc_icmpinerrors();
return;
}
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
if (pbuf_header(p, (PBUF_IP_HLEN + PBUF_LINK_HLEN))) {
/* p is not big enough to contain link headers
* allocate a new one and copy p into it
*/
struct pbuf *r;
/* switch p->payload to ip header */
if (pbuf_header(p, hlen)) {
LWIP_ASSERT("icmp_input: moving p->payload to ip header failed\n", 0);
goto memerr;
}
/* allocate new packet buffer with space for link headers */
r = pbuf_alloc(PBUF_LINK, p->tot_len, PBUF_RAM);
if (r == NULL) {
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: allocating new pbuf failed\n"));
goto memerr;
}
LWIP_ASSERT("check that first pbuf can hold struct the ICMP header",
(r->len >= hlen + sizeof(struct icmp_echo_hdr)));
/* copy the whole packet including ip header */
if (pbuf_copy(r, p) != ERR_OK) {
LWIP_ASSERT("icmp_input: copying to new pbuf failed\n", 0);
goto memerr;
}
iphdr = r->payload;
/* switch r->payload back to icmp header */
if (pbuf_header(r, -hlen)) {
LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
goto memerr;
}
/* free the original p */
pbuf_free(p);
/* we now have an identical copy of p that has room for link headers */
p = r;
} else {
/* restore p->payload to point to icmp header */
if (pbuf_header(p, -(s16_t)(PBUF_IP_HLEN + PBUF_LINK_HLEN))) {
LWIP_ASSERT("icmp_input: restoring original p->payload failed\n", 0);
goto memerr;
}
}
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
/* At this point, all checks are OK. */
/* We generate an answer by switching the dest and src ip addresses,
* setting the icmp type to ECHO_RESPONSE and updating the checksum. */
iecho = p->payload;
tmpaddr.addr = iphdr->src.addr;
iphdr->src.addr = iphdr->dest.addr;
iphdr->dest.addr = tmpaddr.addr;
ICMPH_TYPE_SET(iecho, ICMP_ER);
/* adjust the checksum */
if (iecho->chksum >= htons(0xffff - (ICMP_ECHO << 8))) {
iecho->chksum += htons(ICMP_ECHO << 8) + 1;
} else {
iecho->chksum += htons(ICMP_ECHO << 8);
}
/* Set the correct TTL and recalculate the header checksum. */
IPH_TTL_SET(iphdr, ICMP_TTL);
IPH_CHKSUM_SET(iphdr, 0);
#if CHECKSUM_GEN_IP
IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN));
#endif /* CHECKSUM_GEN_IP */
ICMP_STATS_INC(icmp.xmit);
/* increase number of messages attempted to send */
snmp_inc_icmpoutmsgs();
/* increase number of echo replies attempted to send */
snmp_inc_icmpoutechoreps();
if(pbuf_header(p, hlen)) {
LWIP_ASSERT("Can't move over header in packet", 0);
} else {
err_t ret;
ret = ip_output_if(p, &(iphdr->src), IP_HDRINCL,
ICMP_TTL, 0, IP_PROTO_ICMP, inp);
if (ret != ERR_OK) {
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ip_output_if returned an error: %c.\n", ret));
}
}
break;
default:
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_input: ICMP type %"S16_F" code %"S16_F" not supported.\n",
(s16_t)type, (s16_t)code));
ICMP_STATS_INC(icmp.proterr);
ICMP_STATS_INC(icmp.drop);
}
pbuf_free(p);
return;
lenerr:
pbuf_free(p);
ICMP_STATS_INC(icmp.lenerr);
snmp_inc_icmpinerrors();
return;
#if LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN
memerr:
pbuf_free(p);
ICMP_STATS_INC(icmp.err);
snmp_inc_icmpinerrors();
return;
#endif /* LWIP_ICMP_ECHO_CHECK_INPUT_PBUF_LEN */
}
/**
* Send an icmp 'destination unreachable' packet, called from ip_input() if
* the transport layer protocol is unknown and from udp_input() if the local
* port is not bound.
*
* @param p the input packet for which the 'unreachable' should be sent,
* p->payload pointing to the IP header
* @param t type of the 'unreachable' packet
*/
void
icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t)
{
icmp_send_response(p, ICMP_DUR, t);
}
#if IP_FORWARD || IP_REASSEMBLY
/**
* Send a 'time exceeded' packet, called from ip_forward() if TTL is 0.
*
* @param p the input packet for which the 'time exceeded' should be sent,
* p->payload pointing to the IP header
* @param t type of the 'time exceeded' packet
*/
void
icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t)
{
icmp_send_response(p, ICMP_TE, t);
}
#endif /* IP_FORWARD || IP_REASSEMBLY */
/**
* Send an icmp packet in response to an incoming packet.
*
* @param p the input packet for which the 'unreachable' should be sent,
* p->payload pointing to the IP header
* @param type Type of the ICMP header
* @param code Code of the ICMP header
*/
static void
icmp_send_response(struct pbuf *p, u8_t type, u8_t code)
{
struct pbuf *q;
struct ip_hdr *iphdr;
/* we can use the echo header here */
struct icmp_echo_hdr *icmphdr;
/* ICMP header + IP header + 8 bytes of data */
q = pbuf_alloc(PBUF_IP, sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE,
PBUF_RAM);
if (q == NULL) {
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded: failed to allocate pbuf for ICMP packet.\n"));
return;
}
LWIP_ASSERT("check that first pbuf can hold icmp message",
(q->len >= (sizeof(struct icmp_echo_hdr) + IP_HLEN + ICMP_DEST_UNREACH_DATASIZE)));
iphdr = p->payload;
LWIP_DEBUGF(ICMP_DEBUG, ("icmp_time_exceeded from "));
ip_addr_debug_print(ICMP_DEBUG, &(iphdr->src));
LWIP_DEBUGF(ICMP_DEBUG, (" to "));
ip_addr_debug_print(ICMP_DEBUG, &(iphdr->dest));
LWIP_DEBUGF(ICMP_DEBUG, ("\n"));
icmphdr = q->payload;
icmphdr->type = type;
icmphdr->code = code;
icmphdr->id = 0;
icmphdr->seqno = 0;
/* copy fields from original packet */
SMEMCPY((u8_t *)q->payload + sizeof(struct icmp_echo_hdr), (u8_t *)p->payload,
IP_HLEN + ICMP_DEST_UNREACH_DATASIZE);
/* calculate checksum */
icmphdr->chksum = 0;
icmphdr->chksum = inet_chksum(icmphdr, q->len);
ICMP_STATS_INC(icmp.xmit);
/* increase number of messages attempted to send */
snmp_inc_icmpoutmsgs();
/* increase number of destination unreachable messages attempted to send */
snmp_inc_icmpouttimeexcds();
ip_output(q, NULL, &(iphdr->src), ICMP_TTL, 0, IP_PROTO_ICMP);
pbuf_free(q);
}
#endif /* LWIP_ICMP */

759
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/igmp.c Normal file
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@ -0,0 +1,759 @@
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* IGMP - Internet Group Management Protocol
*
*/
/*
* Copyright (c) 2002 CITEL Technologies Ltd.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is a contribution to the lwIP TCP/IP stack.
* The Swedish Institute of Computer Science and Adam Dunkels
* are specifically granted permission to redistribute this
* source code.
*/
/*-------------------------------------------------------------
Note 1)
Although the rfc requires V1 AND V2 capability
we will only support v2 since now V1 is very old (August 1989)
V1 can be added if required
a debug print and statistic have been implemented to
show this up.
-------------------------------------------------------------
-------------------------------------------------------------
Note 2)
A query for a specific group address (as opposed to ALLHOSTS)
has now been implemented as I am unsure if it is required
a debug print and statistic have been implemented to
show this up.
-------------------------------------------------------------
-------------------------------------------------------------
Note 3)
The router alert rfc 2113 is implemented in outgoing packets
but not checked rigorously incoming
-------------------------------------------------------------
Steve Reynolds
------------------------------------------------------------*/
/*-----------------------------------------------------------------------------
* RFC 988 - Host extensions for IP multicasting - V0
* RFC 1054 - Host extensions for IP multicasting -
* RFC 1112 - Host extensions for IP multicasting - V1
* RFC 2236 - Internet Group Management Protocol, Version 2 - V2 <- this code is based on this RFC (it's the "de facto" standard)
* RFC 3376 - Internet Group Management Protocol, Version 3 - V3
* RFC 4604 - Using Internet Group Management Protocol Version 3... - V3+
* RFC 2113 - IP Router Alert Option -
*----------------------------------------------------------------------------*/
/*-----------------------------------------------------------------------------
* Includes
*----------------------------------------------------------------------------*/
#include "lwip/opt.h"
#if LWIP_IGMP /* don't build if not configured for use in lwipopts.h */
#include "lwip/igmp.h"
#include "lwip/debug.h"
#include "lwip/def.h"
#include "lwip/mem.h"
#include "lwip/ip.h"
#include "lwip/inet.h"
#include "lwip/inet_chksum.h"
#include "lwip/netif.h"
#include "lwip/icmp.h"
#include "lwip/udp.h"
#include "lwip/tcp.h"
#include "lwip/stats.h"
#include "string.h"
/*-----------------------------------------------------------------------------
* Globales
*----------------------------------------------------------------------------*/
static struct igmp_group* igmp_group_list;
static struct ip_addr allsystems;
static struct ip_addr allrouters;
/**
* Initialize the IGMP module
*/
void
igmp_init(void)
{
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_init: initializing\n"));
IP4_ADDR(&allsystems, 224, 0, 0, 1);
IP4_ADDR(&allrouters, 224, 0, 0, 2);
}
#ifdef LWIP_DEBUG
/**
* Dump global IGMP groups list
*/
void
igmp_dump_group_list()
{
struct igmp_group *group = igmp_group_list;
while (group != NULL) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_dump_group_list: [%"U32_F"] ", (u32_t)(group->group_state)));
ip_addr_debug_print(IGMP_DEBUG, &group->group_address);
LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", group->interface));
group = group->next;
}
LWIP_DEBUGF(IGMP_DEBUG, ("\n"));
}
#else
#define igmp_dump_group_list()
#endif /* LWIP_DEBUG */
/**
* Start IGMP processing on interface
*
* @param netif network interface on which start IGMP processing
*/
err_t
igmp_start(struct netif *netif)
{
struct igmp_group* group;
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_start: starting IGMP processing on if %p\n", netif));
group = igmp_lookup_group(netif, &allsystems);
if (group != NULL) {
group->group_state = IGMP_GROUP_IDLE_MEMBER;
group->use++;
/* Allow the igmp messages at the MAC level */
if (netif->igmp_mac_filter != NULL) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_start: igmp_mac_filter(ADD "));
ip_addr_debug_print(IGMP_DEBUG, &allsystems);
LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif));
netif->igmp_mac_filter( netif, &allsystems, IGMP_ADD_MAC_FILTER);
}
return ERR_OK;
}
return ERR_MEM;
}
/**
* Stop IGMP processing on interface
*
* @param netif network interface on which stop IGMP processing
*/
err_t
igmp_stop(struct netif *netif)
{
struct igmp_group *group = igmp_group_list;
struct igmp_group *prev = NULL;
struct igmp_group *next;
/* look for groups joined on this interface further down the list */
while (group != NULL) {
next = group->next;
/* is it a group joined on this interface? */
if (group->interface == netif) {
/* is it the first group of the list? */
if (group == igmp_group_list) {
igmp_group_list = next;
}
/* is there a "previous" group defined? */
if (prev != NULL) {
prev->next = next;
}
/* disable the group at the MAC level */
if (netif->igmp_mac_filter != NULL) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_stop: igmp_mac_filter(DEL "));
ip_addr_debug_print(IGMP_DEBUG, &group->group_address);
LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif));
netif->igmp_mac_filter(netif, &(group->group_address), IGMP_DEL_MAC_FILTER);
}
/* free group */
memp_free(MEMP_IGMP_GROUP, group);
} else {
/* change the "previous" */
prev = group;
}
/* move to "next" */
group = next;
}
return ERR_OK;
}
/**
* Report IGMP memberships for this interface
*
* @param netif network interface on which report IGMP memberships
*/
void
igmp_report_groups( struct netif *netif)
{
struct igmp_group *group = igmp_group_list;
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_report_groups: sending IGMP reports on if %p\n", netif));
while (group != NULL) {
if (group->interface == netif) {
igmp_delaying_member( group, IGMP_JOIN_DELAYING_MEMBER_TMR);
}
group = group->next;
}
}
/**
* Search for a group in the global igmp_group_list
*
* @param ifp the network interface for which to look
* @param addr the group ip address to search for
* @return a struct igmp_group* if the group has been found,
* NULL if the group wasn't found.
*/
struct igmp_group *
igmp_lookfor_group(struct netif *ifp, struct ip_addr *addr)
{
struct igmp_group *group = igmp_group_list;
while (group != NULL) {
if ((group->interface == ifp) && (ip_addr_cmp(&(group->group_address), addr))) {
return group;
}
group = group->next;
}
/* to be clearer, we return NULL here instead of
* 'group' (which is also NULL at this point).
*/
return NULL;
}
/**
* Search for a specific igmp group and create a new one if not found-
*
* @param ifp the network interface for which to look
* @param addr the group ip address to search
* @return a struct igmp_group*,
* NULL on memory error.
*/
struct igmp_group *
igmp_lookup_group(struct netif *ifp, struct ip_addr *addr)
{
struct igmp_group *group = igmp_group_list;
/* Search if the group already exists */
group = igmp_lookfor_group(ifp, addr);
if (group != NULL) {
/* Group already exists. */
return group;
}
/* Group doesn't exist yet, create a new one */
group = memp_malloc(MEMP_IGMP_GROUP);
if (group != NULL) {
group->interface = ifp;
ip_addr_set(&(group->group_address), addr);
group->timer = 0; /* Not running */
group->group_state = IGMP_GROUP_NON_MEMBER;
group->last_reporter_flag = 0;
group->use = 0;
group->next = igmp_group_list;
igmp_group_list = group;
}
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_lookup_group: %sallocated a new group with address ", (group?"":"impossible to ")));
ip_addr_debug_print(IGMP_DEBUG, addr);
LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", ifp));
return group;
}
/**
* Remove a group in the global igmp_group_list
*
* @param group the group to remove from the global igmp_group_list
* @return ERR_OK if group was removed from the list, an err_t otherwise
*/
err_t
igmp_remove_group(struct igmp_group *group)
{
err_t err = ERR_OK;
/* Is it the first group? */
if (igmp_group_list == group) {
igmp_group_list = group->next;
} else {
/* look for group further down the list */
struct igmp_group *tmpGroup;
for (tmpGroup = igmp_group_list; tmpGroup != NULL; tmpGroup = tmpGroup->next) {
if (tmpGroup->next == group) {
tmpGroup->next = group->next;
break;
}
}
/* Group not found in the global igmp_group_list */
if (tmpGroup == NULL)
err = ERR_ARG;
}
/* free group */
memp_free(MEMP_IGMP_GROUP, group);
return err;
}
/**
* Called from ip_input() if a new IGMP packet is received.
*
* @param p received igmp packet, p->payload pointing to the ip header
* @param inp network interface on which the packet was received
* @param dest destination ip address of the igmp packet
*/
void
igmp_input(struct pbuf *p, struct netif *inp, struct ip_addr *dest)
{
struct ip_hdr * iphdr;
struct igmp_msg* igmp;
struct igmp_group* group;
struct igmp_group* groupref;
/* Note that the length CAN be greater than 8 but only 8 are used - All are included in the checksum */
iphdr = p->payload;
if (pbuf_header(p, -(s16_t)(IPH_HL(iphdr) * 4)) || (p->len < IGMP_MINLEN)) {
pbuf_free(p);
IGMP_STATS_INC(igmp.lenerr);
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: length error\n"));
return;
}
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: message from "));
ip_addr_debug_print(IGMP_DEBUG, &(iphdr->src));
LWIP_DEBUGF(IGMP_DEBUG, (" to address "));
ip_addr_debug_print(IGMP_DEBUG, &(iphdr->dest));
LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", inp));
/* Now calculate and check the checksum */
igmp = (struct igmp_msg *)p->payload;
if (inet_chksum(igmp, p->len)) {
pbuf_free(p);
IGMP_STATS_INC(igmp.chkerr);
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: checksum error\n"));
return;
}
/* Packet is ok so find an existing group */
group = igmp_lookfor_group(inp, dest); /* use the incoming IP address! */
/* If group can be found or create... */
if (!group) {
pbuf_free(p);
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP frame not for us\n"));
return;
}
/* NOW ACT ON THE INCOMING MESSAGE TYPE... */
switch (igmp->igmp_msgtype) {
case IGMP_MEMB_QUERY: {
/* IGMP_MEMB_QUERY to the "all systems" address ? */
if ((ip_addr_cmp(dest, &allsystems)) && (igmp->igmp_group_address.addr == 0)) {
/* THIS IS THE GENERAL QUERY */
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: General IGMP_MEMB_QUERY on \"ALL SYSTEMS\" address (224.0.0.1) [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp)));
if (igmp->igmp_maxresp == 0) {
IGMP_STATS_INC(igmp.v1_rxed);
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: got an all hosts query with time== 0 - this is V1 and not implemented - treat as v2\n"));
igmp->igmp_maxresp = IGMP_V1_DELAYING_MEMBER_TMR;
}
IGMP_STATS_INC(igmp.group_query_rxed);
groupref = igmp_group_list;
while (groupref) {
/* Do not send messages on the all systems group address! */
if ((groupref->interface == inp) && (!(ip_addr_cmp(&(groupref->group_address), &allsystems)))) {
igmp_delaying_member( groupref, igmp->igmp_maxresp);
}
groupref = groupref->next;
}
} else {
/* IGMP_MEMB_QUERY to a specific group ? */
if (group->group_address.addr != 0) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP_MEMB_QUERY to a specific group "));
ip_addr_debug_print(IGMP_DEBUG, &group->group_address);
if (ip_addr_cmp (dest, &allsystems)) {
LWIP_DEBUGF(IGMP_DEBUG, (" using \"ALL SYSTEMS\" address (224.0.0.1) [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp)));
/* we first need to re-lookfor the group since we used dest last time */
group = igmp_lookfor_group(inp, &igmp->igmp_group_address);
} else {
LWIP_DEBUGF(IGMP_DEBUG, (" with the group address as destination [igmp_maxresp=%i]\n", (int)(igmp->igmp_maxresp)));
}
if (group != NULL) {
IGMP_STATS_INC(igmp.unicast_query);
igmp_delaying_member( group, igmp->igmp_maxresp);
}
}
}
break;
}
case IGMP_V2_MEMB_REPORT: {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: IGMP_V2_MEMB_REPORT\n"));
IGMP_STATS_INC(igmp.report_rxed);
if (group->group_state == IGMP_GROUP_DELAYING_MEMBER) {
/* This is on a specific group we have already looked up */
group->timer = 0; /* stopped */
group->group_state = IGMP_GROUP_IDLE_MEMBER;
group->last_reporter_flag = 0;
}
break;
}
default: {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_input: unexpected msg %d in state %d on group %p on if %p\n",
igmp->igmp_msgtype, group->group_state, &group, group->interface));
break;
}
}
pbuf_free(p);
return;
}
/**
* Join a group on one network interface.
*
* @param ifaddr ip address of the network interface which should join a new group
* @param groupaddr the ip address of the group which to join
* @return ERR_OK if group was joined on the netif(s), an err_t otherwise
*/
err_t
igmp_joingroup(struct ip_addr *ifaddr, struct ip_addr *groupaddr)
{
err_t err = ERR_VAL; /* no matching interface */
struct igmp_group *group;
struct netif *netif;
/* make sure it is multicast address */
LWIP_ERROR("igmp_joingroup: attempt to join non-multicast address", ip_addr_ismulticast(groupaddr), return ERR_VAL;);
LWIP_ERROR("igmp_joingroup: attempt to join allsystems address", (!ip_addr_cmp(groupaddr, &allsystems)), return ERR_VAL;);
/* loop through netif's */
netif = netif_list;
while (netif != NULL) {
/* Should we join this interface ? */
if ((netif->flags & NETIF_FLAG_IGMP) && ((ip_addr_isany(ifaddr) || ip_addr_cmp(&(netif->ip_addr), ifaddr)))) {
/* find group or create a new one if not found */
group = igmp_lookup_group(netif, groupaddr);
if (group != NULL) {
/* This should create a new group, check the state to make sure */
if (group->group_state != IGMP_GROUP_NON_MEMBER) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: join to group not in state IGMP_GROUP_NON_MEMBER\n"));
} else {
/* OK - it was new group */
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: join to new group: "));
ip_addr_debug_print(IGMP_DEBUG, groupaddr);
LWIP_DEBUGF(IGMP_DEBUG, ("\n"));
/* If first use of the group, allow the group at the MAC level */
if ((group->use==0) && (netif->igmp_mac_filter != NULL)) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: igmp_mac_filter(ADD "));
ip_addr_debug_print(IGMP_DEBUG, groupaddr);
LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif));
netif->igmp_mac_filter(netif, groupaddr, IGMP_ADD_MAC_FILTER);
}
IGMP_STATS_INC(igmp.join_sent);
igmp_send(group, IGMP_V2_MEMB_REPORT);
igmp_start_timer(group, IGMP_JOIN_DELAYING_MEMBER_TMR);
/* Need to work out where this timer comes from */
group->group_state = IGMP_GROUP_DELAYING_MEMBER;
}
/* Increment group use */
group->use++;
/* Join on this interface */
err = ERR_OK;
} else {
/* Return an error even if some network interfaces are joined */
/** @todo undo any other netif already joined */
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_joingroup: Not enought memory to join to group\n"));
return ERR_MEM;
}
}
/* proceed to next network interface */
netif = netif->next;
}
return err;
}
/**
* Leave a group on one network interface.
*
* @param ifaddr ip address of the network interface which should leave a group
* @param groupaddr the ip address of the group which to leave
* @return ERR_OK if group was left on the netif(s), an err_t otherwise
*/
err_t
igmp_leavegroup(struct ip_addr *ifaddr, struct ip_addr *groupaddr)
{
err_t err = ERR_VAL; /* no matching interface */
struct igmp_group *group;
struct netif *netif;
/* make sure it is multicast address */
LWIP_ERROR("igmp_leavegroup: attempt to leave non-multicast address", ip_addr_ismulticast(groupaddr), return ERR_VAL;);
LWIP_ERROR("igmp_leavegroup: attempt to leave allsystems address", (!ip_addr_cmp(groupaddr, &allsystems)), return ERR_VAL;);
/* loop through netif's */
netif = netif_list;
while (netif != NULL) {
/* Should we leave this interface ? */
if ((netif->flags & NETIF_FLAG_IGMP) && ((ip_addr_isany(ifaddr) || ip_addr_cmp(&(netif->ip_addr), ifaddr)))) {
/* find group */
group = igmp_lookfor_group(netif, groupaddr);
if (group != NULL) {
/* Only send a leave if the flag is set according to the state diagram */
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: Leaving group: "));
ip_addr_debug_print(IGMP_DEBUG, groupaddr);
LWIP_DEBUGF(IGMP_DEBUG, ("\n"));
/* If there is no other use of the group */
if (group->use <= 1) {
/* If we are the last reporter for this group */
if (group->last_reporter_flag) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: sending leaving group\n"));
IGMP_STATS_INC(igmp.leave_sent);
igmp_send(group, IGMP_LEAVE_GROUP);
}
/* Disable the group at the MAC level */
if (netif->igmp_mac_filter != NULL) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: igmp_mac_filter(DEL "));
ip_addr_debug_print(IGMP_DEBUG, groupaddr);
LWIP_DEBUGF(IGMP_DEBUG, (") on if %p\n", netif));
netif->igmp_mac_filter(netif, groupaddr, IGMP_DEL_MAC_FILTER);
}
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: remove group: "));
ip_addr_debug_print(IGMP_DEBUG, groupaddr);
LWIP_DEBUGF(IGMP_DEBUG, ("\n"));
/* Free the group */
igmp_remove_group(group);
} else {
/* Decrement group use */
group->use--;
}
/* Leave on this interface */
err = ERR_OK;
} else {
/* It's not a fatal error on "leavegroup" */
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_leavegroup: not member of group\n"));
}
}
/* proceed to next network interface */
netif = netif->next;
}
return err;
}
/**
* The igmp timer function (both for NO_SYS=1 and =0)
* Should be called every IGMP_TMR_INTERVAL milliseconds (100 ms is default).
*/
void
igmp_tmr(void)
{
struct igmp_group *group = igmp_group_list;
while (group != NULL) {
if (group->timer != 0) {
group->timer -= 1;
if (group->timer == 0) {
igmp_timeout(group);
}
}
group = group->next;
}
}
/**
* Called if a timeout for one group is reached.
* Sends a report for this group.
*
* @param group an igmp_group for which a timeout is reached
*/
void
igmp_timeout(struct igmp_group *group)
{
/* If the state is IGMP_GROUP_DELAYING_MEMBER then we send a report for this group */
if (group->group_state == IGMP_GROUP_DELAYING_MEMBER) {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_timeout: report membership for group with address "));
ip_addr_debug_print(IGMP_DEBUG, &(group->group_address));
LWIP_DEBUGF(IGMP_DEBUG, (" on if %p\n", group->interface));
igmp_send(group, IGMP_V2_MEMB_REPORT);
}
}
/**
* Start a timer for an igmp group
*
* @param group the igmp_group for which to start a timer
* @param max_time the time in multiples of IGMP_TMR_INTERVAL (decrease with
* every call to igmp_tmr())
*/
void
igmp_start_timer(struct igmp_group *group, u8_t max_time)
{
/**
* @todo Important !! this should be random 0 -> max_time. Find out how to do this
*/
group->timer = max_time;
}
/**
* Stop a timer for an igmp_group
*
* @param group the igmp_group for which to stop the timer
*/
void
igmp_stop_timer(struct igmp_group *group)
{
group->timer = 0;
}
/**
* Delaying membership report for a group if necessary
*
* @param group the igmp_group for which "delaying" membership report
* @param maxresp query delay
*/
void
igmp_delaying_member( struct igmp_group *group, u8_t maxresp)
{
if ((group->group_state == IGMP_GROUP_IDLE_MEMBER) ||
((group->group_state == IGMP_GROUP_DELAYING_MEMBER) && (maxresp > group->timer))) {
igmp_start_timer(group, (maxresp)/2);
group->group_state = IGMP_GROUP_DELAYING_MEMBER;
}
}
/**
* Sends an IP packet on a network interface. This function constructs the IP header
* and calculates the IP header checksum. If the source IP address is NULL,
* the IP address of the outgoing network interface is filled in as source address.
*
* @param p the packet to send (p->payload points to the data, e.g. next
protocol header; if dest == IP_HDRINCL, p already includes an IP
header and p->payload points to that IP header)
* @param src the source IP address to send from (if src == IP_ADDR_ANY, the
* IP address of the netif used to send is used as source address)
* @param dest the destination IP address to send the packet to
* @param ttl the TTL value to be set in the IP header
* @param proto the PROTOCOL to be set in the IP header
* @param netif the netif on which to send this packet
* @return ERR_OK if the packet was sent OK
* ERR_BUF if p doesn't have enough space for IP/LINK headers
* returns errors returned by netif->output
*/
err_t
igmp_ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t proto, struct netif *netif)
{
/* This is the "router alert" option */
u16_t ra[2];
ra[0] = htons (ROUTER_ALERT);
ra[1] = 0x0000; /* Router shall examine packet */
return ip_output_if_opt(p, src, dest, ttl, 0, proto, netif, ra, ROUTER_ALERTLEN);
}
/**
* Send an igmp packet to a specific group.
*
* @param group the group to which to send the packet
* @param type the type of igmp packet to send
*/
void
igmp_send(struct igmp_group *group, u8_t type)
{
struct pbuf* p = NULL;
struct igmp_msg* igmp = NULL;
struct ip_addr src = {0};
struct ip_addr* dest = NULL;
/* IP header + "router alert" option + IGMP header */
p = pbuf_alloc(PBUF_TRANSPORT, IGMP_MINLEN, PBUF_RAM);
if (p) {
igmp = p->payload;
LWIP_ASSERT("igmp_send: check that first pbuf can hold struct igmp_msg",
(p->len >= sizeof(struct igmp_msg)));
ip_addr_set(&src, &((group->interface)->ip_addr));
if (type == IGMP_V2_MEMB_REPORT) {
dest = &(group->group_address);
IGMP_STATS_INC(igmp.report_sent);
ip_addr_set(&(igmp->igmp_group_address), &(group->group_address));
group->last_reporter_flag = 1; /* Remember we were the last to report */
} else {
if (type == IGMP_LEAVE_GROUP) {
dest = &allrouters;
ip_addr_set(&(igmp->igmp_group_address), &(group->group_address));
}
}
if ((type == IGMP_V2_MEMB_REPORT) || (type == IGMP_LEAVE_GROUP)) {
igmp->igmp_msgtype = type;
igmp->igmp_maxresp = 0;
igmp->igmp_checksum = 0;
igmp->igmp_checksum = inet_chksum( igmp, IGMP_MINLEN);
igmp_ip_output_if(p, &src, dest, IGMP_TTL, IP_PROTO_IGMP, group->interface);
}
pbuf_free(p);
} else {
LWIP_DEBUGF(IGMP_DEBUG, ("igmp_send: not enough memory for igmp_send\n"));
}
}
#endif /* LWIP_IGMP */

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* Functions common to all TCP/IPv4 modules, such as the byte order functions.
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/inet.h"
/* Here for now until needed in other places in lwIP */
#ifndef isprint
#define in_range(c, lo, up) ((u8_t)c >= lo && (u8_t)c <= up)
#define isprint(c) in_range(c, 0x20, 0x7f)
#define isdigit(c) in_range(c, '0', '9')
#define isxdigit(c) (isdigit(c) || in_range(c, 'a', 'f') || in_range(c, 'A', 'F'))
#define islower(c) in_range(c, 'a', 'z')
#define isspace(c) (c == ' ' || c == '\f' || c == '\n' || c == '\r' || c == '\t' || c == '\v')
#endif
/**
* Ascii internet address interpretation routine.
* The value returned is in network order.
*
* @param cp IP address in ascii represenation (e.g. "127.0.0.1")
* @return ip address in network order
*/
u32_t
inet_addr(const char *cp)
{
struct in_addr val;
if (inet_aton(cp, &val)) {
return (val.s_addr);
}
return (INADDR_NONE);
}
/**
* Check whether "cp" is a valid ascii representation
* of an Internet address and convert to a binary address.
* Returns 1 if the address is valid, 0 if not.
* This replaces inet_addr, the return value from which
* cannot distinguish between failure and a local broadcast address.
*
* @param cp IP address in ascii represenation (e.g. "127.0.0.1")
* @param addr pointer to which to save the ip address in network order
* @return 1 if cp could be converted to addr, 0 on failure
*/
int
inet_aton(const char *cp, struct in_addr *addr)
{
u32_t val;
u8_t base;
char c;
u32_t parts[4];
u32_t *pp = parts;
c = *cp;
for (;;) {
/*
* Collect number up to ``.''.
* Values are specified as for C:
* 0x=hex, 0=octal, 1-9=decimal.
*/
if (!isdigit(c))
return (0);
val = 0;
base = 10;
if (c == '0') {
c = *++cp;
if (c == 'x' || c == 'X') {
base = 16;
c = *++cp;
} else
base = 8;
}
for (;;) {
if (isdigit(c)) {
val = (val * base) + (int)(c - '0');
c = *++cp;
} else if (base == 16 && isxdigit(c)) {
val = (val << 4) | (int)(c + 10 - (islower(c) ? 'a' : 'A'));
c = *++cp;
} else
break;
}
if (c == '.') {
/*
* Internet format:
* a.b.c.d
* a.b.c (with c treated as 16 bits)
* a.b (with b treated as 24 bits)
*/
if (pp >= parts + 3)
return (0);
*pp++ = val;
c = *++cp;
} else
break;
}
/*
* Check for trailing characters.
*/
if (c != '\0' && !isspace(c))
return (0);
/*
* Concoct the address according to
* the number of parts specified.
*/
switch (pp - parts + 1) {
case 0:
return (0); /* initial nondigit */
case 1: /* a -- 32 bits */
break;
case 2: /* a.b -- 8.24 bits */
if (val > 0xffffffUL)
return (0);
val |= parts[0] << 24;
break;
case 3: /* a.b.c -- 8.8.16 bits */
if (val > 0xffff)
return (0);
val |= (parts[0] << 24) | (parts[1] << 16);
break;
case 4: /* a.b.c.d -- 8.8.8.8 bits */
if (val > 0xff)
return (0);
val |= (parts[0] << 24) | (parts[1] << 16) | (parts[2] << 8);
break;
}
if (addr)
addr->s_addr = htonl(val);
return (1);
}
/**
* Convert numeric IP address into decimal dotted ASCII representation.
* returns ptr to static buffer; not reentrant!
*
* @param addr ip address in network order to convert
* @return pointer to a global static (!) buffer that holds the ASCII
* represenation of addr
*/
char *
inet_ntoa(struct in_addr addr)
{
static char str[16];
u32_t s_addr = addr.s_addr;
char inv[3];
char *rp;
u8_t *ap;
u8_t rem;
u8_t n;
u8_t i;
rp = str;
ap = (u8_t *)&s_addr;
for(n = 0; n < 4; n++) {
i = 0;
do {
rem = *ap % (u8_t)10;
*ap /= (u8_t)10;
inv[i++] = '0' + rem;
} while(*ap);
while(i--)
*rp++ = inv[i];
*rp++ = '.';
ap++;
}
*--rp = 0;
return str;
}
/**
* These are reference implementations of the byte swapping functions.
* Again with the aim of being simple, correct and fully portable.
* Byte swapping is the second thing you would want to optimize. You will
* need to port it to your architecture and in your cc.h:
*
* #define LWIP_PLATFORM_BYTESWAP 1
* #define LWIP_PLATFORM_HTONS(x) <your_htons>
* #define LWIP_PLATFORM_HTONL(x) <your_htonl>
*
* Note ntohs() and ntohl() are merely references to the htonx counterparts.
*/
#if (LWIP_PLATFORM_BYTESWAP == 0) && (BYTE_ORDER == LITTLE_ENDIAN)
/**
* Convert an u16_t from host- to network byte order.
*
* @param n u16_t in host byte order
* @return n in network byte order
*/
u16_t
htons(u16_t n)
{
return ((n & 0xff) << 8) | ((n & 0xff00) >> 8);
}
/**
* Convert an u16_t from network- to host byte order.
*
* @param n u16_t in network byte order
* @return n in host byte order
*/
u16_t
ntohs(u16_t n)
{
return htons(n);
}
/**
* Convert an u32_t from host- to network byte order.
*
* @param n u32_t in host byte order
* @return n in network byte order
*/
u32_t
htonl(u32_t n)
{
return ((n & 0xff) << 24) |
((n & 0xff00) << 8) |
((n & 0xff0000UL) >> 8) |
((n & 0xff000000UL) >> 24);
}
/**
* Convert an u32_t from network- to host byte order.
*
* @param n u32_t in network byte order
* @return n in host byte order
*/
u32_t
ntohl(u32_t n)
{
return htonl(n);
}
#endif /* (LWIP_PLATFORM_BYTESWAP == 0) && (BYTE_ORDER == LITTLE_ENDIAN) */

440
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* Incluse internet checksum functions.
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/inet_chksum.h"
#include "lwip/inet.h"
#include <stddef.h>
/* These are some reference implementations of the checksum algorithm, with the
* aim of being simple, correct and fully portable. Checksumming is the
* first thing you would want to optimize for your platform. If you create
* your own version, link it in and in your cc.h put:
*
* #define LWIP_CHKSUM <your_checksum_routine>
*
* Or you can select from the implementations below by defining
* LWIP_CHKSUM_ALGORITHM to 1, 2 or 3.
*/
#ifndef LWIP_CHKSUM
# define LWIP_CHKSUM lwip_standard_chksum
# ifndef LWIP_CHKSUM_ALGORITHM
# define LWIP_CHKSUM_ALGORITHM 1
# endif
#endif
/* If none set: */
#ifndef LWIP_CHKSUM_ALGORITHM
# define LWIP_CHKSUM_ALGORITHM 0
#endif
/** Like the name says... */
#if LWIP_PLATFORM_BYTESWAP && (BYTE_ORDER == LITTLE_ENDIAN)
/* little endian and PLATFORM_BYTESWAP defined */
#define SWAP_BYTES_IN_WORD(w) LWIP_PLATFORM_HTONS(w)
#else
/* can't use htons on big endian (or PLATFORM_BYTESWAP not defined)... */
#define SWAP_BYTES_IN_WORD(w) ((w & 0xff) << 8) | ((w & 0xff00) >> 8)
#endif
/** Split an u32_t in two u16_ts and add them up */
#define FOLD_U32T(u) ((u >> 16) + (u & 0x0000ffffUL))
#if (LWIP_CHKSUM_ALGORITHM == 1) /* Version #1 */
/**
* lwip checksum
*
* @param dataptr points to start of data to be summed at any boundary
* @param len length of data to be summed
* @return host order (!) lwip checksum (non-inverted Internet sum)
*
* @note accumulator size limits summable length to 64k
* @note host endianess is irrelevant (p3 RFC1071)
*/
static u16_t
lwip_standard_chksum(void *dataptr, u16_t len)
{
u32_t acc;
u16_t src;
u8_t *octetptr;
acc = 0;
/* dataptr may be at odd or even addresses */
octetptr = (u8_t*)dataptr;
while (len > 1) {
/* declare first octet as most significant
thus assume network order, ignoring host order */
src = (*octetptr) << 8;
octetptr++;
/* declare second octet as least significant */
src |= (*octetptr);
octetptr++;
acc += src;
len -= 2;
}
if (len > 0) {
/* accumulate remaining octet */
src = (*octetptr) << 8;
acc += src;
}
/* add deferred carry bits */
acc = (acc >> 16) + (acc & 0x0000ffffUL);
if ((acc & 0xffff0000UL) != 0) {
acc = (acc >> 16) + (acc & 0x0000ffffUL);
}
/* This maybe a little confusing: reorder sum using htons()
instead of ntohs() since it has a little less call overhead.
The caller must invert bits for Internet sum ! */
return htons((u16_t)acc);
}
#endif
#if (LWIP_CHKSUM_ALGORITHM == 2) /* Alternative version #2 */
/*
* Curt McDowell
* Broadcom Corp.
* csm@broadcom.com
*
* IP checksum two bytes at a time with support for
* unaligned buffer.
* Works for len up to and including 0x20000.
* by Curt McDowell, Broadcom Corp. 12/08/2005
*
* @param dataptr points to start of data to be summed at any boundary
* @param len length of data to be summed
* @return host order (!) lwip checksum (non-inverted Internet sum)
*/
static u16_t
lwip_standard_chksum(void *dataptr, int len)
{
u8_t *pb = dataptr;
u16_t *ps, t = 0;
u32_t sum = 0;
int odd = ((u32_t)pb & 1);
/* Get aligned to u16_t */
if (odd && len > 0) {
((u8_t *)&t)[1] = *pb++;
len--;
}
/* Add the bulk of the data */
ps = (u16_t *)pb;
while (len > 1) {
sum += *ps++;
len -= 2;
}
/* Consume left-over byte, if any */
if (len > 0) {
((u8_t *)&t)[0] = *(u8_t *)ps;;
}
/* Add end bytes */
sum += t;
/* Fold 32-bit sum to 16 bits
calling this twice is propably faster than if statements... */
sum = FOLD_U32T(sum);
sum = FOLD_U32T(sum);
/* Swap if alignment was odd */
if (odd) {
sum = SWAP_BYTES_IN_WORD(sum);
}
return sum;
}
#endif
#if (LWIP_CHKSUM_ALGORITHM == 3) /* Alternative version #3 */
/**
* An optimized checksum routine. Basically, it uses loop-unrolling on
* the checksum loop, treating the head and tail bytes specially, whereas
* the inner loop acts on 8 bytes at a time.
*
* @arg start of buffer to be checksummed. May be an odd byte address.
* @len number of bytes in the buffer to be checksummed.
* @return host order (!) lwip checksum (non-inverted Internet sum)
*
* by Curt McDowell, Broadcom Corp. December 8th, 2005
*/
static u16_t
lwip_standard_chksum(void *dataptr, int len)
{
u8_t *pb = dataptr;
u16_t *ps, t = 0;
u32_t *pl;
u32_t sum = 0, tmp;
/* starts at odd byte address? */
int odd = ((u32_t)pb & 1);
if (odd && len > 0) {
((u8_t *)&t)[1] = *pb++;
len--;
}
ps = (u16_t *)pb;
if (((u32_t)ps & 3) && len > 1) {
sum += *ps++;
len -= 2;
}
pl = (u32_t *)ps;
while (len > 7) {
tmp = sum + *pl++; /* ping */
if (tmp < sum) {
tmp++; /* add back carry */
}
sum = tmp + *pl++; /* pong */
if (sum < tmp) {
sum++; /* add back carry */
}
len -= 8;
}
/* make room in upper bits */
sum = FOLD_U32T(sum);
ps = (u16_t *)pl;
/* 16-bit aligned word remaining? */
while (len > 1) {
sum += *ps++;
len -= 2;
}
/* dangling tail byte remaining? */
if (len > 0) { /* include odd byte */
((u8_t *)&t)[0] = *(u8_t *)ps;
}
sum += t; /* add end bytes */
/* Fold 32-bit sum to 16 bits
calling this twice is propably faster than if statements... */
sum = FOLD_U32T(sum);
sum = FOLD_U32T(sum);
if (odd) {
sum = SWAP_BYTES_IN_WORD(sum);
}
return sum;
}
#endif
/* inet_chksum_pseudo:
*
* Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain.
* IP addresses are expected to be in network byte order.
*
* @param p chain of pbufs over that a checksum should be calculated (ip data part)
* @param src source ip address (used for checksum of pseudo header)
* @param dst destination ip address (used for checksum of pseudo header)
* @param proto ip protocol (used for checksum of pseudo header)
* @param proto_len length of the ip data part (used for checksum of pseudo header)
* @return checksum (as u16_t) to be saved directly in the protocol header
*/
u16_t
inet_chksum_pseudo(struct pbuf *p,
struct ip_addr *src, struct ip_addr *dest,
u8_t proto, u16_t proto_len)
{
u32_t acc;
struct pbuf *q;
u8_t swapped;
acc = 0;
swapped = 0;
/* iterate through all pbuf in chain */
for(q = p; q != NULL; q = q->next) {
LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n",
(void *)q, (void *)q->next));
acc += LWIP_CHKSUM(q->payload, q->len);
/*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/
/* just executing this next line is probably faster that the if statement needed
to check whether we really need to execute it, and does no harm */
acc = FOLD_U32T(acc);
if (q->len % 2 != 0) {
swapped = 1 - swapped;
acc = SWAP_BYTES_IN_WORD(acc);
}
/*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/
}
if (swapped) {
acc = SWAP_BYTES_IN_WORD(acc);
}
acc += (src->addr & 0xffffUL);
acc += ((src->addr >> 16) & 0xffffUL);
acc += (dest->addr & 0xffffUL);
acc += ((dest->addr >> 16) & 0xffffUL);
acc += (u32_t)htons((u16_t)proto);
acc += (u32_t)htons(proto_len);
/* Fold 32-bit sum to 16 bits
calling this twice is propably faster than if statements... */
acc = FOLD_U32T(acc);
acc = FOLD_U32T(acc);
LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc));
return (u16_t)~(acc & 0xffffUL);
}
/* inet_chksum_pseudo:
*
* Calculates the pseudo Internet checksum used by TCP and UDP for a pbuf chain.
* IP addresses are expected to be in network byte order.
*
* @param p chain of pbufs over that a checksum should be calculated (ip data part)
* @param src source ip address (used for checksum of pseudo header)
* @param dst destination ip address (used for checksum of pseudo header)
* @param proto ip protocol (used for checksum of pseudo header)
* @param proto_len length of the ip data part (used for checksum of pseudo header)
* @return checksum (as u16_t) to be saved directly in the protocol header
*/
/* Currently only used by UDPLITE, although this could change in the future. */
#if LWIP_UDPLITE
u16_t
inet_chksum_pseudo_partial(struct pbuf *p,
struct ip_addr *src, struct ip_addr *dest,
u8_t proto, u16_t proto_len, u16_t chksum_len)
{
u32_t acc;
struct pbuf *q;
u8_t swapped;
u16_t chklen;
acc = 0;
swapped = 0;
/* iterate through all pbuf in chain */
for(q = p; (q != NULL) && (chksum_len > 0); q = q->next) {
LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): checksumming pbuf %p (has next %p) \n",
(void *)q, (void *)q->next));
chklen = q->len;
if (chklen > chksum_len) {
chklen = chksum_len;
}
acc += LWIP_CHKSUM(q->payload, chklen);
chksum_len -= chklen;
LWIP_ASSERT("delete me", chksum_len < 0x7fff);
/*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): unwrapped lwip_chksum()=%"X32_F" \n", acc));*/
/* fold the upper bit down */
acc = FOLD_U32T(acc);
if (q->len % 2 != 0) {
swapped = 1 - swapped;
acc = SWAP_BYTES_IN_WORD(acc);
}
/*LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): wrapped lwip_chksum()=%"X32_F" \n", acc));*/
}
if (swapped) {
acc = SWAP_BYTES_IN_WORD(acc);
}
acc += (src->addr & 0xffffUL);
acc += ((src->addr >> 16) & 0xffffUL);
acc += (dest->addr & 0xffffUL);
acc += ((dest->addr >> 16) & 0xffffUL);
acc += (u32_t)htons((u16_t)proto);
acc += (u32_t)htons(proto_len);
/* Fold 32-bit sum to 16 bits
calling this twice is propably faster than if statements... */
acc = FOLD_U32T(acc);
acc = FOLD_U32T(acc);
LWIP_DEBUGF(INET_DEBUG, ("inet_chksum_pseudo(): pbuf chain lwip_chksum()=%"X32_F"\n", acc));
return (u16_t)~(acc & 0xffffUL);
}
#endif /* LWIP_UDPLITE */
/* inet_chksum:
*
* Calculates the Internet checksum over a portion of memory. Used primarily for IP
* and ICMP.
*
* @param dataptr start of the buffer to calculate the checksum (no alignment needed)
* @param len length of the buffer to calculate the checksum
* @return checksum (as u16_t) to be saved directly in the protocol header
*/
u16_t
inet_chksum(void *dataptr, u16_t len)
{
return ~LWIP_CHKSUM(dataptr, len);
}
/**
* Calculate a checksum over a chain of pbufs (without pseudo-header, much like
* inet_chksum only pbufs are used).
*
* @param p pbuf chain over that the checksum should be calculated
* @return checksum (as u16_t) to be saved directly in the protocol header
*/
u16_t
inet_chksum_pbuf(struct pbuf *p)
{
u32_t acc;
struct pbuf *q;
u8_t swapped;
acc = 0;
swapped = 0;
for(q = p; q != NULL; q = q->next) {
acc += LWIP_CHKSUM(q->payload, q->len);
acc = FOLD_U32T(acc);
if (q->len % 2 != 0) {
swapped = 1 - swapped;
acc = SWAP_BYTES_IN_WORD(acc);
}
}
if (swapped) {
acc = SWAP_BYTES_IN_WORD(acc);
}
return (u16_t)~(acc & 0xffffUL);
}

725
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip.c Normal file
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@ -0,0 +1,725 @@
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* This is the IPv4 layer implementation for incoming and outgoing IP traffic.
*
* @see ip_frag.c
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/ip.h"
#include "lwip/def.h"
#include "lwip/mem.h"
#include "lwip/ip_frag.h"
#include "lwip/inet.h"
#include "lwip/inet_chksum.h"
#include "lwip/netif.h"
#include "lwip/icmp.h"
#include "lwip/igmp.h"
#include "lwip/raw.h"
#include "lwip/udp.h"
#include "lwip/tcp.h"
#include "lwip/snmp.h"
#include "lwip/dhcp.h"
#include "lwip/stats.h"
#include "arch/perf.h"
#include <string.h>
/**
* The interface that provided the packet for the current callback
* invocation.
*/
struct netif *current_netif;
/**
* Header of the input packet currently being processed.
*/
const struct ip_hdr *current_header;
/**
* Finds the appropriate network interface for a given IP address. It
* searches the list of network interfaces linearly. A match is found
* if the masked IP address of the network interface equals the masked
* IP address given to the function.
*
* @param dest the destination IP address for which to find the route
* @return the netif on which to send to reach dest
*/
struct netif *
ip_route(struct ip_addr *dest)
{
struct netif *netif;
/* iterate through netifs */
for(netif = netif_list; netif != NULL; netif = netif->next) {
/* network mask matches? */
if (netif_is_up(netif)) {
if (ip_addr_netcmp(dest, &(netif->ip_addr), &(netif->netmask))) {
/* return netif on which to forward IP packet */
return netif;
}
}
}
if ((netif_default == NULL) || (!netif_is_up(netif_default))) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_route: No route to 0x%"X32_F"\n", dest->addr));
IP_STATS_INC(ip.rterr);
snmp_inc_ipoutnoroutes();
return NULL;
}
/* no matching netif found, use default netif */
return netif_default;
}
#if IP_FORWARD
/**
* Forwards an IP packet. It finds an appropriate route for the
* packet, decrements the TTL value of the packet, adjusts the
* checksum and outputs the packet on the appropriate interface.
*
* @param p the packet to forward (p->payload points to IP header)
* @param iphdr the IP header of the input packet
* @param inp the netif on which this packet was received
* @return the netif on which the packet was sent (NULL if it wasn't sent)
*/
static struct netif *
ip_forward(struct pbuf *p, struct ip_hdr *iphdr, struct netif *inp)
{
struct netif *netif;
PERF_START;
/* Find network interface where to forward this IP packet to. */
netif = ip_route((struct ip_addr *)&(iphdr->dest));
if (netif == NULL) {
LWIP_DEBUGF(IP_DEBUG, ("ip_forward: no forwarding route for 0x%"X32_F" found\n",
iphdr->dest.addr));
snmp_inc_ipoutnoroutes();
return (struct netif *)NULL;
}
/* Do not forward packets onto the same network interface on which
* they arrived. */
if (netif == inp) {
LWIP_DEBUGF(IP_DEBUG, ("ip_forward: not bouncing packets back on incoming interface.\n"));
snmp_inc_ipoutnoroutes();
return (struct netif *)NULL;
}
/* decrement TTL */
IPH_TTL_SET(iphdr, IPH_TTL(iphdr) - 1);
/* send ICMP if TTL == 0 */
if (IPH_TTL(iphdr) == 0) {
snmp_inc_ipinhdrerrors();
#if LWIP_ICMP
/* Don't send ICMP messages in response to ICMP messages */
if (IPH_PROTO(iphdr) != IP_PROTO_ICMP) {
icmp_time_exceeded(p, ICMP_TE_TTL);
}
#endif /* LWIP_ICMP */
return (struct netif *)NULL;
}
/* Incrementally update the IP checksum. */
if (IPH_CHKSUM(iphdr) >= htons(0xffff - 0x100)) {
IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100) + 1);
} else {
IPH_CHKSUM_SET(iphdr, IPH_CHKSUM(iphdr) + htons(0x100));
}
LWIP_DEBUGF(IP_DEBUG, ("ip_forward: forwarding packet to 0x%"X32_F"\n",
iphdr->dest.addr));
IP_STATS_INC(ip.fw);
IP_STATS_INC(ip.xmit);
snmp_inc_ipforwdatagrams();
PERF_STOP("ip_forward");
/* transmit pbuf on chosen interface */
netif->output(netif, p, (struct ip_addr *)&(iphdr->dest));
return netif;
}
#endif /* IP_FORWARD */
/**
* This function is called by the network interface device driver when
* an IP packet is received. The function does the basic checks of the
* IP header such as packet size being at least larger than the header
* size etc. If the packet was not destined for us, the packet is
* forwarded (using ip_forward). The IP checksum is always checked.
*
* Finally, the packet is sent to the upper layer protocol input function.
*
* @param p the received IP packet (p->payload points to IP header)
* @param inp the netif on which this packet was received
* @return ERR_OK if the packet was processed (could return ERR_* if it wasn't
* processed, but currently always returns ERR_OK)
*/
err_t
ip_input(struct pbuf *p, struct netif *inp)
{
struct ip_hdr *iphdr;
struct netif *netif;
u16_t iphdr_hlen;
u16_t iphdr_len;
#if LWIP_DHCP
int check_ip_src=1;
#endif /* LWIP_DHCP */
IP_STATS_INC(ip.recv);
snmp_inc_ipinreceives();
/* identify the IP header */
iphdr = p->payload;
if (IPH_V(iphdr) != 4) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_WARNING, ("IP packet dropped due to bad version number %"U16_F"\n", IPH_V(iphdr)));
ip_debug_print(p);
pbuf_free(p);
IP_STATS_INC(ip.err);
IP_STATS_INC(ip.drop);
snmp_inc_ipinhdrerrors();
return ERR_OK;
}
/* obtain IP header length in number of 32-bit words */
iphdr_hlen = IPH_HL(iphdr);
/* calculate IP header length in bytes */
iphdr_hlen *= 4;
/* obtain ip length in bytes */
iphdr_len = ntohs(IPH_LEN(iphdr));
/* header length exceeds first pbuf length, or ip length exceeds total pbuf length? */
if ((iphdr_hlen > p->len) || (iphdr_len > p->tot_len)) {
if (iphdr_hlen > p->len) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("IP header (len %"U16_F") does not fit in first pbuf (len %"U16_F"), IP packet dropped.\n",
iphdr_hlen, p->len));
}
if (iphdr_len > p->tot_len) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("IP (len %"U16_F") is longer than pbuf (len %"U16_F"), IP packet dropped.\n",
iphdr_len, p->tot_len));
}
/* free (drop) packet pbufs */
pbuf_free(p);
IP_STATS_INC(ip.lenerr);
IP_STATS_INC(ip.drop);
snmp_inc_ipindiscards();
return ERR_OK;
}
/* verify checksum */
#if CHECKSUM_CHECK_IP
if (inet_chksum(iphdr, iphdr_hlen) != 0) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("Checksum (0x%"X16_F") failed, IP packet dropped.\n", inet_chksum(iphdr, iphdr_hlen)));
ip_debug_print(p);
pbuf_free(p);
IP_STATS_INC(ip.chkerr);
IP_STATS_INC(ip.drop);
snmp_inc_ipinhdrerrors();
return ERR_OK;
}
#endif
/* Trim pbuf. This should have been done at the netif layer,
* but we'll do it anyway just to be sure that its done. */
pbuf_realloc(p, iphdr_len);
/* match packet against an interface, i.e. is this packet for us? */
#if LWIP_IGMP
if (ip_addr_ismulticast(&(iphdr->dest))) {
if ((inp->flags & NETIF_FLAG_IGMP) && (igmp_lookfor_group(inp, &(iphdr->dest)))) {
netif = inp;
} else {
netif = NULL;
}
} else
#endif /* LWIP_IGMP */
{
/* start trying with inp. if that's not acceptable, start walking the
list of configured netifs.
'first' is used as a boolean to mark whether we started walking the list */
int first = 1;
netif = inp;
do {
LWIP_DEBUGF(IP_DEBUG, ("ip_input: iphdr->dest 0x%"X32_F" netif->ip_addr 0x%"X32_F" (0x%"X32_F", 0x%"X32_F", 0x%"X32_F")\n",
iphdr->dest.addr, netif->ip_addr.addr,
iphdr->dest.addr & netif->netmask.addr,
netif->ip_addr.addr & netif->netmask.addr,
iphdr->dest.addr & ~(netif->netmask.addr)));
/* interface is up and configured? */
if ((netif_is_up(netif)) && (!ip_addr_isany(&(netif->ip_addr)))) {
/* unicast to this interface address? */
if (ip_addr_cmp(&(iphdr->dest), &(netif->ip_addr)) ||
/* or broadcast on this interface network address? */
ip_addr_isbroadcast(&(iphdr->dest), netif)) {
LWIP_DEBUGF(IP_DEBUG, ("ip_input: packet accepted on interface %c%c\n",
netif->name[0], netif->name[1]));
/* break out of for loop */
break;
}
}
if (first) {
first = 0;
netif = netif_list;
} else {
netif = netif->next;
}
if (netif == inp) {
netif = netif->next;
}
} while(netif != NULL);
}
#if LWIP_DHCP
/* Pass DHCP messages regardless of destination address. DHCP traffic is addressed
* using link layer addressing (such as Ethernet MAC) so we must not filter on IP.
* According to RFC 1542 section 3.1.1, referred by RFC 2131).
*/
if (netif == NULL) {
/* remote port is DHCP server? */
if (IPH_PROTO(iphdr) == IP_PROTO_UDP) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: UDP packet to DHCP client port %"U16_F"\n",
ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdr_hlen))->dest)));
if (ntohs(((struct udp_hdr *)((u8_t *)iphdr + iphdr_hlen))->dest) == DHCP_CLIENT_PORT) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: DHCP packet accepted.\n"));
netif = inp;
check_ip_src = 0;
}
}
}
#endif /* LWIP_DHCP */
/* broadcast or multicast packet source address? Compliant with RFC 1122: 3.2.1.3 */
#if LWIP_DHCP
/* DHCP servers need 0.0.0.0 to be allowed as source address (RFC 1.1.2.2: 3.2.1.3/a) */
if (check_ip_src && (iphdr->src.addr != 0))
#endif /* LWIP_DHCP */
{ if ((ip_addr_isbroadcast(&(iphdr->src), inp)) ||
(ip_addr_ismulticast(&(iphdr->src)))) {
/* packet source is not valid */
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_WARNING, ("ip_input: packet source is not valid.\n"));
/* free (drop) packet pbufs */
pbuf_free(p);
IP_STATS_INC(ip.drop);
snmp_inc_ipinaddrerrors();
snmp_inc_ipindiscards();
return ERR_OK;
}
}
/* packet not for us? */
if (netif == NULL) {
/* packet not for us, route or discard */
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_TRACE, ("ip_input: packet not for us.\n"));
#if IP_FORWARD
/* non-broadcast packet? */
if (!ip_addr_isbroadcast(&(iphdr->dest), inp)) {
/* try to forward IP packet on (other) interfaces */
ip_forward(p, iphdr, inp);
} else
#endif /* IP_FORWARD */
{
snmp_inc_ipinaddrerrors();
snmp_inc_ipindiscards();
}
pbuf_free(p);
return ERR_OK;
}
/* packet consists of multiple fragments? */
if ((IPH_OFFSET(iphdr) & htons(IP_OFFMASK | IP_MF)) != 0) {
#if IP_REASSEMBLY /* packet fragment reassembly code present? */
LWIP_DEBUGF(IP_DEBUG, ("IP packet is a fragment (id=0x%04"X16_F" tot_len=%"U16_F" len=%"U16_F" MF=%"U16_F" offset=%"U16_F"), calling ip_reass()\n",
ntohs(IPH_ID(iphdr)), p->tot_len, ntohs(IPH_LEN(iphdr)), !!(IPH_OFFSET(iphdr) & htons(IP_MF)), (ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK)*8));
/* reassemble the packet*/
p = ip_reass(p);
/* packet not fully reassembled yet? */
if (p == NULL) {
return ERR_OK;
}
iphdr = p->payload;
#else /* IP_REASSEMBLY == 0, no packet fragment reassembly code present */
pbuf_free(p);
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP packet dropped since it was fragmented (0x%"X16_F") (while IP_REASSEMBLY == 0).\n",
ntohs(IPH_OFFSET(iphdr))));
IP_STATS_INC(ip.opterr);
IP_STATS_INC(ip.drop);
/* unsupported protocol feature */
snmp_inc_ipinunknownprotos();
return ERR_OK;
#endif /* IP_REASSEMBLY */
}
#if IP_OPTIONS_ALLOWED == 0 /* no support for IP options in the IP header? */
#if LWIP_IGMP
/* there is an extra "router alert" option in IGMP messages which we allow for but do not police */
if((iphdr_hlen > IP_HLEN && (IPH_PROTO(iphdr) != IP_PROTO_IGMP)) {
#else
if (iphdr_hlen > IP_HLEN) {
#endif /* LWIP_IGMP */
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("IP packet dropped since there were IP options (while IP_OPTIONS_ALLOWED == 0).\n"));
pbuf_free(p);
IP_STATS_INC(ip.opterr);
IP_STATS_INC(ip.drop);
/* unsupported protocol feature */
snmp_inc_ipinunknownprotos();
return ERR_OK;
}
#endif /* IP_OPTIONS_ALLOWED == 0 */
/* send to upper layers */
LWIP_DEBUGF(IP_DEBUG, ("ip_input: \n"));
ip_debug_print(p);
LWIP_DEBUGF(IP_DEBUG, ("ip_input: p->len %"U16_F" p->tot_len %"U16_F"\n", p->len, p->tot_len));
current_netif = inp;
current_header = iphdr;
#if LWIP_RAW
/* raw input did not eat the packet? */
if (raw_input(p, inp) == 0)
#endif /* LWIP_RAW */
{
switch (IPH_PROTO(iphdr)) {
#if LWIP_UDP
case IP_PROTO_UDP:
#if LWIP_UDPLITE
case IP_PROTO_UDPLITE:
#endif /* LWIP_UDPLITE */
snmp_inc_ipindelivers();
udp_input(p, inp);
break;
#endif /* LWIP_UDP */
#if LWIP_TCP
case IP_PROTO_TCP:
snmp_inc_ipindelivers();
tcp_input(p, inp);
break;
#endif /* LWIP_TCP */
#if LWIP_ICMP
case IP_PROTO_ICMP:
snmp_inc_ipindelivers();
icmp_input(p, inp);
break;
#endif /* LWIP_ICMP */
#if LWIP_IGMP
case IP_PROTO_IGMP:
igmp_input(p,inp,&(iphdr->dest));
break;
#endif /* LWIP_IGMP */
default:
#if LWIP_ICMP
/* send ICMP destination protocol unreachable unless is was a broadcast */
if (!ip_addr_isbroadcast(&(iphdr->dest), inp) &&
!ip_addr_ismulticast(&(iphdr->dest))) {
p->payload = iphdr;
icmp_dest_unreach(p, ICMP_DUR_PROTO);
}
#endif /* LWIP_ICMP */
pbuf_free(p);
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("Unsupported transport protocol %"U16_F"\n", IPH_PROTO(iphdr)));
IP_STATS_INC(ip.proterr);
IP_STATS_INC(ip.drop);
snmp_inc_ipinunknownprotos();
}
}
current_netif = NULL;
current_header = NULL;
return ERR_OK;
}
/**
* Sends an IP packet on a network interface. This function constructs
* the IP header and calculates the IP header checksum. If the source
* IP address is NULL, the IP address of the outgoing network
* interface is filled in as source address.
* If the destination IP address is IP_HDRINCL, p is assumed to already
* include an IP header and p->payload points to it instead of the data.
*
* @param p the packet to send (p->payload points to the data, e.g. next
protocol header; if dest == IP_HDRINCL, p already includes an IP
header and p->payload points to that IP header)
* @param src the source IP address to send from (if src == IP_ADDR_ANY, the
* IP address of the netif used to send is used as source address)
* @param dest the destination IP address to send the packet to
* @param ttl the TTL value to be set in the IP header
* @param tos the TOS value to be set in the IP header
* @param proto the PROTOCOL to be set in the IP header
* @param netif the netif on which to send this packet
* @return ERR_OK if the packet was sent OK
* ERR_BUF if p doesn't have enough space for IP/LINK headers
* returns errors returned by netif->output
*
* @note ip_id: RFC791 "some host may be able to simply use
* unique identifiers independent of destination"
*/
err_t
ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t tos,
u8_t proto, struct netif *netif)
{
#if IP_OPTIONS_SEND
return ip_output_if_opt(p, src, dest, ttl, tos, proto, netif, NULL, 0);
}
/**
* Same as ip_output_if() but with the possibility to include IP options:
*
* @ param ip_options pointer to the IP options, copied into the IP header
* @ param optlen length of ip_options
*/
err_t ip_output_if_opt(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
u16_t optlen)
{
#endif /* IP_OPTIONS_SEND */
struct ip_hdr *iphdr;
static u16_t ip_id = 0;
snmp_inc_ipoutrequests();
/* Should the IP header be generated or is it already included in p? */
if (dest != IP_HDRINCL) {
u16_t ip_hlen = IP_HLEN;
#if IP_OPTIONS_SEND
u16_t optlen_aligned = 0;
if (optlen != 0) {
/* round up to a multiple of 4 */
optlen_aligned = ((optlen + 3) & ~3);
ip_hlen += optlen_aligned;
/* First write in the IP options */
if (pbuf_header(p, optlen_aligned)) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_output_if_opt: not enough room for IP options in pbuf\n"));
IP_STATS_INC(ip.err);
snmp_inc_ipoutdiscards();
return ERR_BUF;
}
MEMCPY(p->payload, ip_options, optlen);
if (optlen < optlen_aligned) {
/* zero the remaining bytes */
memset(((char*)p->payload) + optlen, 0, optlen_aligned - optlen);
}
}
#endif /* IP_OPTIONS_SEND */
/* generate IP header */
if (pbuf_header(p, IP_HLEN)) {
LWIP_DEBUGF(IP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("ip_output: not enough room for IP header in pbuf\n"));
IP_STATS_INC(ip.err);
snmp_inc_ipoutdiscards();
return ERR_BUF;
}
iphdr = p->payload;
LWIP_ASSERT("check that first pbuf can hold struct ip_hdr",
(p->len >= sizeof(struct ip_hdr)));
IPH_TTL_SET(iphdr, ttl);
IPH_PROTO_SET(iphdr, proto);
ip_addr_set(&(iphdr->dest), dest);
IPH_VHLTOS_SET(iphdr, 4, ip_hlen / 4, tos);
IPH_LEN_SET(iphdr, htons(p->tot_len));
IPH_OFFSET_SET(iphdr, 0);
IPH_ID_SET(iphdr, htons(ip_id));
++ip_id;
if (ip_addr_isany(src)) {
ip_addr_set(&(iphdr->src), &(netif->ip_addr));
} else {
ip_addr_set(&(iphdr->src), src);
}
IPH_CHKSUM_SET(iphdr, 0);
#if CHECKSUM_GEN_IP
IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, ip_hlen));
#endif
} else {
/* IP header already included in p */
iphdr = p->payload;
dest = &(iphdr->dest);
}
IP_STATS_INC(ip.xmit);
LWIP_DEBUGF(IP_DEBUG, ("ip_output_if: %c%c%"U16_F"\n", netif->name[0], netif->name[1], netif->num));
ip_debug_print(p);
#if ENABLE_LOOPBACK
if (ip_addr_cmp(dest, &netif->ip_addr)) {
/* Packet to self, enqueue it for loopback */
LWIP_DEBUGF(IP_DEBUG, ("netif_loop_output()"));
return netif_loop_output(netif, p, dest);
}
#endif /* ENABLE_LOOPBACK */
#if IP_FRAG
/* don't fragment if interface has mtu set to 0 [loopif] */
if (netif->mtu && (p->tot_len > netif->mtu)) {
return ip_frag(p,netif,dest);
}
#endif
LWIP_DEBUGF(IP_DEBUG, ("netif->output()"));
return netif->output(netif, p, dest);
}
/**
* Simple interface to ip_output_if. It finds the outgoing network
* interface and calls upon ip_output_if to do the actual work.
*
* @param p the packet to send (p->payload points to the data, e.g. next
protocol header; if dest == IP_HDRINCL, p already includes an IP
header and p->payload points to that IP header)
* @param src the source IP address to send from (if src == IP_ADDR_ANY, the
* IP address of the netif used to send is used as source address)
* @param dest the destination IP address to send the packet to
* @param ttl the TTL value to be set in the IP header
* @param tos the TOS value to be set in the IP header
* @param proto the PROTOCOL to be set in the IP header
*
* @return ERR_RTE if no route is found
* see ip_output_if() for more return values
*/
err_t
ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t tos, u8_t proto)
{
struct netif *netif;
if ((netif = ip_route(dest)) == NULL) {
LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr));
IP_STATS_INC(ip.rterr);
return ERR_RTE;
}
return ip_output_if(p, src, dest, ttl, tos, proto, netif);
}
#if LWIP_NETIF_HWADDRHINT
/** Like ip_output, but takes and addr_hint pointer that is passed on to netif->addr_hint
* before calling ip_output_if.
*
* @param p the packet to send (p->payload points to the data, e.g. next
protocol header; if dest == IP_HDRINCL, p already includes an IP
header and p->payload points to that IP header)
* @param src the source IP address to send from (if src == IP_ADDR_ANY, the
* IP address of the netif used to send is used as source address)
* @param dest the destination IP address to send the packet to
* @param ttl the TTL value to be set in the IP header
* @param tos the TOS value to be set in the IP header
* @param proto the PROTOCOL to be set in the IP header
* @param addr_hint address hint pointer set to netif->addr_hint before
* calling ip_output_if()
*
* @return ERR_RTE if no route is found
* see ip_output_if() for more return values
*/
err_t
ip_output_hinted(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint)
{
struct netif *netif;
err_t err;
if ((netif = ip_route(dest)) == NULL) {
LWIP_DEBUGF(IP_DEBUG, ("ip_output: No route to 0x%"X32_F"\n", dest->addr));
IP_STATS_INC(ip.rterr);
return ERR_RTE;
}
netif->addr_hint = addr_hint;
err = ip_output_if(p, src, dest, ttl, tos, proto, netif);
netif->addr_hint = NULL;
return err;
}
#endif /* LWIP_NETIF_HWADDRHINT*/
#if IP_DEBUG
/* Print an IP header by using LWIP_DEBUGF
* @param p an IP packet, p->payload pointing to the IP header
*/
void
ip_debug_print(struct pbuf *p)
{
struct ip_hdr *iphdr = p->payload;
u8_t *payload;
payload = (u8_t *)iphdr + IP_HLEN;
LWIP_DEBUGF(IP_DEBUG, ("IP header:\n"));
LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n"));
LWIP_DEBUGF(IP_DEBUG, ("|%2"S16_F" |%2"S16_F" | 0x%02"X16_F" | %5"U16_F" | (v, hl, tos, len)\n",
IPH_V(iphdr),
IPH_HL(iphdr),
IPH_TOS(iphdr),
ntohs(IPH_LEN(iphdr))));
LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n"));
LWIP_DEBUGF(IP_DEBUG, ("| %5"U16_F" |%"U16_F"%"U16_F"%"U16_F"| %4"U16_F" | (id, flags, offset)\n",
ntohs(IPH_ID(iphdr)),
ntohs(IPH_OFFSET(iphdr)) >> 15 & 1,
ntohs(IPH_OFFSET(iphdr)) >> 14 & 1,
ntohs(IPH_OFFSET(iphdr)) >> 13 & 1,
ntohs(IPH_OFFSET(iphdr)) & IP_OFFMASK));
LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n"));
LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | 0x%04"X16_F" | (ttl, proto, chksum)\n",
IPH_TTL(iphdr),
IPH_PROTO(iphdr),
ntohs(IPH_CHKSUM(iphdr))));
LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n"));
LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (src)\n",
ip4_addr1(&iphdr->src),
ip4_addr2(&iphdr->src),
ip4_addr3(&iphdr->src),
ip4_addr4(&iphdr->src)));
LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n"));
LWIP_DEBUGF(IP_DEBUG, ("| %3"U16_F" | %3"U16_F" | %3"U16_F" | %3"U16_F" | (dest)\n",
ip4_addr1(&iphdr->dest),
ip4_addr2(&iphdr->dest),
ip4_addr3(&iphdr->dest),
ip4_addr4(&iphdr->dest)));
LWIP_DEBUGF(IP_DEBUG, ("+-------------------------------+\n"));
}
#endif /* IP_DEBUG */

86
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip_addr.c Normal file
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* This is the IPv4 address tools implementation.
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/ip_addr.h"
#include "lwip/inet.h"
#include "lwip/netif.h"
#define IP_ADDR_ANY_VALUE 0x00000000UL
#define IP_ADDR_BROADCAST_VALUE 0xffffffffUL
/* used by IP_ADDR_ANY and IP_ADDR_BROADCAST in ip_addr.h */
const struct ip_addr ip_addr_any = { IP_ADDR_ANY_VALUE };
const struct ip_addr ip_addr_broadcast = { IP_ADDR_BROADCAST_VALUE };
/**
* Determine if an address is a broadcast address on a network interface
*
* @param addr address to be checked
* @param netif the network interface against which the address is checked
* @return returns non-zero if the address is a broadcast address
*/
u8_t ip_addr_isbroadcast(struct ip_addr *addr, struct netif *netif)
{
u32_t addr2test;
addr2test = addr->addr;
/* all ones (broadcast) or all zeroes (old skool broadcast) */
if ((~addr2test == IP_ADDR_ANY_VALUE) ||
(addr2test == IP_ADDR_ANY_VALUE))
return 1;
/* no broadcast support on this network interface? */
else if ((netif->flags & NETIF_FLAG_BROADCAST) == 0)
/* the given address cannot be a broadcast address
* nor can we check against any broadcast addresses */
return 0;
/* address matches network interface address exactly? => no broadcast */
else if (addr2test == netif->ip_addr.addr)
return 0;
/* on the same (sub) network... */
else if (ip_addr_netcmp(addr, &(netif->ip_addr), &(netif->netmask))
/* ...and host identifier bits are all ones? =>... */
&& ((addr2test & ~netif->netmask.addr) ==
(IP_ADDR_BROADCAST_VALUE & ~netif->netmask.addr)))
/* => network broadcast address */
return 1;
else
return 0;
}

794
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/ipv4/ip_frag.c Normal file
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* This is the IPv4 packet segmentation and reassembly implementation.
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Jani Monoses <jani@iv.ro>
* Simon Goldschmidt
* original reassembly code by Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/ip_frag.h"
#include "lwip/ip.h"
#include "lwip/inet.h"
#include "lwip/inet_chksum.h"
#include "lwip/netif.h"
#include "lwip/snmp.h"
#include "lwip/stats.h"
#include "lwip/icmp.h"
#include <string.h>
#if IP_REASSEMBLY
/**
* The IP reassembly code currently has the following limitations:
* - IP header options are not supported
* - fragments must not overlap (e.g. due to different routes),
* currently, overlapping or duplicate fragments are thrown away
* if IP_REASS_CHECK_OVERLAP=1 (the default)!
*
* @todo: work with IP header options
*/
/** Setting this to 0, you can turn off checking the fragments for overlapping
* regions. The code gets a little smaller. Only use this if you know that
* overlapping won't occur on your network! */
#ifndef IP_REASS_CHECK_OVERLAP
#define IP_REASS_CHECK_OVERLAP 1
#endif /* IP_REASS_CHECK_OVERLAP */
/** Set to 0 to prevent freeing the oldest datagram when the reassembly buffer is
* full (IP_REASS_MAX_PBUFS pbufs are enqueued). The code gets a little smaller.
* Datagrams will be freed by timeout only. Especially useful when MEMP_NUM_REASSDATA
* is set to 1, so one datagram can be reassembled at a time, only. */
#ifndef IP_REASS_FREE_OLDEST
#define IP_REASS_FREE_OLDEST 1
#endif /* IP_REASS_FREE_OLDEST */
#define IP_REASS_FLAG_LASTFRAG 0x01
/** This is a helper struct which holds the starting
* offset and the ending offset of this fragment to
* easily chain the fragments.
* It has to be packed since it has to fit inside the IP header.
*/
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
PACK_STRUCT_BEGIN
struct ip_reass_helper {
PACK_STRUCT_FIELD(struct pbuf *next_pbuf);
PACK_STRUCT_FIELD(u16_t start);
PACK_STRUCT_FIELD(u16_t end);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
#define IP_ADDRESSES_AND_ID_MATCH(iphdrA, iphdrB) \
(ip_addr_cmp(&(iphdrA)->src, &(iphdrB)->src) && \
ip_addr_cmp(&(iphdrA)->dest, &(iphdrB)->dest) && \
IPH_ID(iphdrA) == IPH_ID(iphdrB)) ? 1 : 0
/* global variables */
static struct ip_reassdata *reassdatagrams;
static u16_t ip_reass_pbufcount;
/* function prototypes */
static void ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev);
static int ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev);
/**
* Reassembly timer base function
* for both NO_SYS == 0 and 1 (!).
*
* Should be called every 1000 msec (defined by IP_TMR_INTERVAL).
*/
void
ip_reass_tmr(void)
{
struct ip_reassdata *r, *prev = NULL;
r = reassdatagrams;
while (r != NULL) {
/* Decrement the timer. Once it reaches 0,
* clean up the incomplete fragment assembly */
if (r->timer > 0) {
r->timer--;
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer dec %"U16_F"\n",(u16_t)r->timer));
prev = r;
r = r->next;
} else {
/* reassembly timed out */
struct ip_reassdata *tmp;
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass_tmr: timer timed out\n"));
tmp = r;
/* get the next pointer before freeing */
r = r->next;
/* free the helper struct and all enqueued pbufs */
ip_reass_free_complete_datagram(tmp, prev);
}
}
}
/**
* Free a datagram (struct ip_reassdata) and all its pbufs.
* Updates the total count of enqueued pbufs (ip_reass_pbufcount),
* SNMP counters and sends an ICMP time exceeded packet.
*
* @param ipr datagram to free
* @param prev the previous datagram in the linked list
* @return the number of pbufs freed
*/
static int
ip_reass_free_complete_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
int pbufs_freed = 0;
struct pbuf *p;
struct ip_reass_helper *iprh;
LWIP_ASSERT("prev != ipr", prev != ipr);
if (prev != NULL) {
LWIP_ASSERT("prev->next == ipr", prev->next == ipr);
}
snmp_inc_ipreasmfails();
#if LWIP_ICMP
iprh = (struct ip_reass_helper *)ipr->p->payload;
if (iprh->start == 0) {
/* The first fragment was received, send ICMP time exceeded. */
/* First, de-queue the first pbuf from r->p. */
p = ipr->p;
ipr->p = iprh->next_pbuf;
/* Then, copy the original header into it. */
SMEMCPY(p->payload, &ipr->iphdr, IP_HLEN);
icmp_time_exceeded(p, ICMP_TE_FRAG);
pbufs_freed += pbuf_clen(p);
pbuf_free(p);
}
#endif /* LWIP_ICMP */
/* First, free all received pbufs. The individual pbufs need to be released
separately as they have not yet been chained */
p = ipr->p;
while (p != NULL) {
struct pbuf *pcur;
iprh = (struct ip_reass_helper *)p->payload;
pcur = p;
/* get the next pointer before freeing */
p = iprh->next_pbuf;
pbufs_freed += pbuf_clen(pcur);
pbuf_free(pcur);
}
/* Then, unchain the struct ip_reassdata from the list and free it. */
ip_reass_dequeue_datagram(ipr, prev);
LWIP_ASSERT("ip_reass_pbufcount >= clen", ip_reass_pbufcount >= pbufs_freed);
ip_reass_pbufcount -= pbufs_freed;
return pbufs_freed;
}
#if IP_REASS_FREE_OLDEST
/**
* Free the oldest datagram to make room for enqueueing new fragments.
* The datagram 'fraghdr' belongs to is not freed!
*
* @param fraghdr IP header of the current fragment
* @param pbufs_needed number of pbufs needed to enqueue
* (used for freeing other datagrams if not enough space)
* @return the number of pbufs freed
*/
static int
ip_reass_remove_oldest_datagram(struct ip_hdr *fraghdr, int pbufs_needed)
{
/* @todo Can't we simply remove the last datagram in the
* linked list behind reassdatagrams?
*/
struct ip_reassdata *r, *oldest, *prev;
int pbufs_freed = 0, pbufs_freed_current;
int other_datagrams;
/* Free datagrams until being allowed to enqueue 'pbufs_needed' pbufs,
* but don't free the datagram that 'fraghdr' belongs to! */
do {
oldest = NULL;
prev = NULL;
other_datagrams = 0;
r = reassdatagrams;
while (r != NULL) {
if (!IP_ADDRESSES_AND_ID_MATCH(&r->iphdr, fraghdr)) {
/* Not the same datagram as fraghdr */
other_datagrams++;
if (oldest == NULL) {
oldest = r;
} else if (r->timer <= oldest->timer) {
/* older than the previous oldest */
oldest = r;
}
}
if (r->next != NULL) {
prev = r;
}
r = r->next;
}
if (oldest != NULL) {
pbufs_freed_current = ip_reass_free_complete_datagram(oldest, prev);
pbufs_freed += pbufs_freed_current;
}
} while ((pbufs_freed < pbufs_needed) && (other_datagrams > 1));
return pbufs_freed;
}
#endif /* IP_REASS_FREE_OLDEST */
/**
* Enqueues a new fragment into the fragment queue
* @param fraghdr points to the new fragments IP hdr
* @param clen number of pbufs needed to enqueue (used for freeing other datagrams if not enough space)
* @return A pointer to the queue location into which the fragment was enqueued
*/
static struct ip_reassdata*
ip_reass_enqueue_new_datagram(struct ip_hdr *fraghdr, int clen)
{
struct ip_reassdata* ipr;
/* No matching previous fragment found, allocate a new reassdata struct */
ipr = memp_malloc(MEMP_REASSDATA);
if (ipr == NULL) {
#if IP_REASS_FREE_OLDEST
if (ip_reass_remove_oldest_datagram(fraghdr, clen) >= clen) {
ipr = memp_malloc(MEMP_REASSDATA);
}
if (ipr == NULL)
#endif /* IP_REASS_FREE_OLDEST */
{
IPFRAG_STATS_INC(ip_frag.memerr);
LWIP_DEBUGF(IP_REASS_DEBUG,("Failed to alloc reassdata struct\n"));
return NULL;
}
}
memset(ipr, 0, sizeof(struct ip_reassdata));
ipr->timer = IP_REASS_MAXAGE;
/* enqueue the new structure to the front of the list */
ipr->next = reassdatagrams;
reassdatagrams = ipr;
/* copy the ip header for later tests and input */
/* @todo: no ip options supported? */
SMEMCPY(&(ipr->iphdr), fraghdr, IP_HLEN);
return ipr;
}
/**
* Dequeues a datagram from the datagram queue. Doesn't deallocate the pbufs.
* @param ipr points to the queue entry to dequeue
*/
static void
ip_reass_dequeue_datagram(struct ip_reassdata *ipr, struct ip_reassdata *prev)
{
/* dequeue the reass struct */
if (reassdatagrams == ipr) {
/* it was the first in the list */
reassdatagrams = ipr->next;
} else {
/* it wasn't the first, so it must have a valid 'prev' */
LWIP_ASSERT("sanity check linked list", prev != NULL);
prev->next = ipr->next;
}
/* now we can free the ip_reass struct */
memp_free(MEMP_REASSDATA, ipr);
}
/**
* Chain a new pbuf into the pbuf list that composes the datagram. The pbuf list
* will grow over time as new pbufs are rx.
* Also checks that the datagram passes basic continuity checks (if the last
* fragment was received at least once).
* @param root_p points to the 'root' pbuf for the current datagram being assembled.
* @param new_p points to the pbuf for the current fragment
* @return 0 if invalid, >0 otherwise
*/
static int
ip_reass_chain_frag_into_datagram_and_validate(struct ip_reassdata *ipr, struct pbuf *new_p)
{
struct ip_reass_helper *iprh, *iprh_tmp, *iprh_prev=NULL;
struct pbuf *q;
u16_t offset,len;
struct ip_hdr *fraghdr;
int valid = 1;
/* Extract length and fragment offset from current fragment */
fraghdr = (struct ip_hdr*)new_p->payload;
len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4;
offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8;
/* overwrite the fragment's ip header from the pbuf with our helper struct,
* and setup the embedded helper structure. */
/* make sure the struct ip_reass_helper fits into the IP header */
LWIP_ASSERT("sizeof(struct ip_reass_helper) <= IP_HLEN",
sizeof(struct ip_reass_helper) <= IP_HLEN);
iprh = (struct ip_reass_helper*)new_p->payload;
iprh->next_pbuf = NULL;
iprh->start = offset;
iprh->end = offset + len;
/* Iterate through until we either get to the end of the list (append),
* or we find on with a larger offset (insert). */
for (q = ipr->p; q != NULL;) {
iprh_tmp = (struct ip_reass_helper*)q->payload;
if (iprh->start < iprh_tmp->start) {
/* the new pbuf should be inserted before this */
iprh->next_pbuf = q;
if (iprh_prev != NULL) {
/* not the fragment with the lowest offset */
#if IP_REASS_CHECK_OVERLAP
if ((iprh->start < iprh_prev->end) || (iprh->end > iprh_tmp->start)) {
/* fragment overlaps with previous or following, throw away */
goto freepbuf;
}
#endif /* IP_REASS_CHECK_OVERLAP */
iprh_prev->next_pbuf = new_p;
} else {
/* fragment with the lowest offset */
ipr->p = new_p;
}
break;
} else if(iprh->start == iprh_tmp->start) {
/* received the same datagram twice: no need to keep the datagram */
goto freepbuf;
#if IP_REASS_CHECK_OVERLAP
} else if(iprh->start < iprh_tmp->end) {
/* overlap: no need to keep the new datagram */
goto freepbuf;
#endif /* IP_REASS_CHECK_OVERLAP */
} else {
/* Check if the fragments received so far have no wholes. */
if (iprh_prev != NULL) {
if (iprh_prev->end != iprh_tmp->start) {
/* There is a fragment missing between the current
* and the previous fragment */
valid = 0;
}
}
}
q = iprh_tmp->next_pbuf;
iprh_prev = iprh_tmp;
}
/* If q is NULL, then we made it to the end of the list. Determine what to do now */
if (q == NULL) {
if (iprh_prev != NULL) {
/* this is (for now), the fragment with the highest offset:
* chain it to the last fragment */
#if IP_REASS_CHECK_OVERLAP
LWIP_ASSERT("check fragments don't overlap", iprh_prev->end <= iprh->start);
#endif /* IP_REASS_CHECK_OVERLAP */
iprh_prev->next_pbuf = new_p;
if (iprh_prev->end != iprh->start) {
valid = 0;
}
} else {
#if IP_REASS_CHECK_OVERLAP
LWIP_ASSERT("no previous fragment, this must be the first fragment!",
ipr->p == NULL);
#endif /* IP_REASS_CHECK_OVERLAP */
/* this is the first fragment we ever received for this ip datagram */
ipr->p = new_p;
}
}
/* At this point, the validation part begins: */
/* If we already received the last fragment */
if ((ipr->flags & IP_REASS_FLAG_LASTFRAG) != 0) {
/* and had no wholes so far */
if (valid) {
/* then check if the rest of the fragments is here */
/* Check if the queue starts with the first datagram */
if (((struct ip_reass_helper*)ipr->p->payload)->start != 0) {
valid = 0;
} else {
/* and check that there are no wholes after this datagram */
iprh_prev = iprh;
q = iprh->next_pbuf;
while (q != NULL) {
iprh = (struct ip_reass_helper*)q->payload;
if (iprh_prev->end != iprh->start) {
valid = 0;
break;
}
iprh_prev = iprh;
q = iprh->next_pbuf;
}
/* if still valid, all fragments are received
* (because to the MF==0 already arrived */
if (valid) {
LWIP_ASSERT("sanity check", ipr->p != NULL);
LWIP_ASSERT("sanity check",
((struct ip_reass_helper*)ipr->p->payload) != iprh);
LWIP_ASSERT("validate_datagram:next_pbuf!=NULL",
iprh->next_pbuf == NULL);
LWIP_ASSERT("validate_datagram:datagram end!=datagram len",
iprh->end == ipr->datagram_len);
}
}
}
/* If valid is 0 here, there are some fragments missing in the middle
* (since MF == 0 has already arrived). Such datagrams simply time out if
* no more fragments are received... */
return valid;
}
/* If we come here, not all fragments were received, yet! */
return 0; /* not yet valid! */
#if IP_REASS_CHECK_OVERLAP
freepbuf:
ip_reass_pbufcount -= pbuf_clen(new_p);
pbuf_free(new_p);
return 0;
#endif /* IP_REASS_CHECK_OVERLAP */
}
/**
* Reassembles incoming IP fragments into an IP datagram.
*
* @param p points to a pbuf chain of the fragment
* @return NULL if reassembly is incomplete, ? otherwise
*/
struct pbuf *
ip_reass(struct pbuf *p)
{
struct pbuf *r;
struct ip_hdr *fraghdr;
struct ip_reassdata *ipr;
struct ip_reass_helper *iprh;
u16_t offset, len;
u8_t clen;
struct ip_reassdata *ipr_prev = NULL;
IPFRAG_STATS_INC(ip_frag.recv);
snmp_inc_ipreasmreqds();
fraghdr = (struct ip_hdr*)p->payload;
if ((IPH_HL(fraghdr) * 4) != IP_HLEN) {
LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: IP options currently not supported!\n"));
IPFRAG_STATS_INC(ip_frag.err);
goto nullreturn;
}
offset = (ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) * 8;
len = ntohs(IPH_LEN(fraghdr)) - IPH_HL(fraghdr) * 4;
/* Check if we are allowed to enqueue more datagrams. */
clen = pbuf_clen(p);
if ((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS) {
#if IP_REASS_FREE_OLDEST
if (!ip_reass_remove_oldest_datagram(fraghdr, clen) ||
((ip_reass_pbufcount + clen) > IP_REASS_MAX_PBUFS))
#endif /* IP_REASS_FREE_OLDEST */
{
/* No datagram could be freed and still too many pbufs enqueued */
LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: Overflow condition: pbufct=%d, clen=%d, MAX=%d\n",
ip_reass_pbufcount, clen, IP_REASS_MAX_PBUFS));
IPFRAG_STATS_INC(ip_frag.memerr);
/* @todo: send ICMP time exceeded here? */
/* drop this pbuf */
goto nullreturn;
}
}
/* Look for the datagram the fragment belongs to in the current datagram queue,
* remembering the previous in the queue for later dequeueing. */
for (ipr = reassdatagrams; ipr != NULL; ipr = ipr->next) {
/* Check if the incoming fragment matches the one currently present
in the reassembly buffer. If so, we proceed with copying the
fragment into the buffer. */
if (IP_ADDRESSES_AND_ID_MATCH(&ipr->iphdr, fraghdr)) {
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_reass: matching previous fragment ID=%"X16_F"\n",
ntohs(IPH_ID(fraghdr))));
IPFRAG_STATS_INC(ip_frag.cachehit);
break;
}
ipr_prev = ipr;
}
if (ipr == NULL) {
/* Enqueue a new datagram into the datagram queue */
ipr = ip_reass_enqueue_new_datagram(fraghdr, clen);
/* Bail if unable to enqueue */
if(ipr == NULL) {
goto nullreturn;
}
} else {
if (((ntohs(IPH_OFFSET(fraghdr)) & IP_OFFMASK) == 0) &&
((ntohs(IPH_OFFSET(&ipr->iphdr)) & IP_OFFMASK) != 0)) {
/* ipr->iphdr is not the header from the first fragment, but fraghdr is
* -> copy fraghdr into ipr->iphdr since we want to have the header
* of the first fragment (for ICMP time exceeded and later, for copying
* all options, if supported)*/
SMEMCPY(&ipr->iphdr, fraghdr, IP_HLEN);
}
}
/* Track the current number of pbufs current 'in-flight', in order to limit
the number of fragments that may be enqueued at any one time */
ip_reass_pbufcount += clen;
/* At this point, we have either created a new entry or pointing
* to an existing one */
/* check for 'no more fragments', and update queue entry*/
if ((ntohs(IPH_OFFSET(fraghdr)) & IP_MF) == 0) {
ipr->flags |= IP_REASS_FLAG_LASTFRAG;
ipr->datagram_len = offset + len;
LWIP_DEBUGF(IP_REASS_DEBUG,
("ip_reass: last fragment seen, total len %"S16_F"\n",
ipr->datagram_len));
}
/* find the right place to insert this pbuf */
/* @todo: trim pbufs if fragments are overlapping */
if (ip_reass_chain_frag_into_datagram_and_validate(ipr, p)) {
/* the totally last fragment (flag more fragments = 0) was received at least
* once AND all fragments are received */
ipr->datagram_len += IP_HLEN;
/* save the second pbuf before copying the header over the pointer */
r = ((struct ip_reass_helper*)ipr->p->payload)->next_pbuf;
/* copy the original ip header back to the first pbuf */
fraghdr = (struct ip_hdr*)(ipr->p->payload);
SMEMCPY(fraghdr, &ipr->iphdr, IP_HLEN);
IPH_LEN_SET(fraghdr, htons(ipr->datagram_len));
IPH_OFFSET_SET(fraghdr, 0);
IPH_CHKSUM_SET(fraghdr, 0);
/* @todo: do we need to set calculate the correct checksum? */
IPH_CHKSUM_SET(fraghdr, inet_chksum(fraghdr, IP_HLEN));
p = ipr->p;
/* chain together the pbufs contained within the reass_data list. */
while(r != NULL) {
iprh = (struct ip_reass_helper*)r->payload;
/* hide the ip header for every succeding fragment */
pbuf_header(r, -IP_HLEN);
pbuf_cat(p, r);
r = iprh->next_pbuf;
}
/* release the sources allocate for the fragment queue entry */
ip_reass_dequeue_datagram(ipr, ipr_prev);
/* and adjust the number of pbufs currently queued for reassembly. */
ip_reass_pbufcount -= pbuf_clen(p);
/* Return the pbuf chain */
return p;
}
/* the datagram is not (yet?) reassembled completely */
LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass_pbufcount: %d out\n", ip_reass_pbufcount));
return NULL;
nullreturn:
LWIP_DEBUGF(IP_REASS_DEBUG,("ip_reass: nullreturn\n"));
IPFRAG_STATS_INC(ip_frag.drop);
pbuf_free(p);
return NULL;
}
#endif /* IP_REASSEMBLY */
#if IP_FRAG
#if IP_FRAG_USES_STATIC_BUF
static u8_t buf[LWIP_MEM_ALIGN_SIZE(IP_FRAG_MAX_MTU + MEM_ALIGNMENT - 1)];
#endif /* IP_FRAG_USES_STATIC_BUF */
/**
* Fragment an IP datagram if too large for the netif.
*
* Chop the datagram in MTU sized chunks and send them in order
* by using a fixed size static memory buffer (PBUF_REF) or
* point PBUF_REFs into p (depending on IP_FRAG_USES_STATIC_BUF).
*
* @param p ip packet to send
* @param netif the netif on which to send
* @param dest destination ip address to which to send
*
* @return ERR_OK if sent successfully, err_t otherwise
*/
err_t
ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest)
{
struct pbuf *rambuf;
#if IP_FRAG_USES_STATIC_BUF
struct pbuf *header;
#else
struct pbuf *newpbuf;
struct ip_hdr *original_iphdr;
#endif
struct ip_hdr *iphdr;
u16_t nfb;
u16_t left, cop;
u16_t mtu = netif->mtu;
u16_t ofo, omf;
u16_t last;
u16_t poff = IP_HLEN;
u16_t tmp;
#if !IP_FRAG_USES_STATIC_BUF
u16_t newpbuflen = 0;
u16_t left_to_copy;
#endif
/* Get a RAM based MTU sized pbuf */
#if IP_FRAG_USES_STATIC_BUF
/* When using a static buffer, we use a PBUF_REF, which we will
* use to reference the packet (without link header).
* Layer and length is irrelevant.
*/
rambuf = pbuf_alloc(PBUF_LINK, 0, PBUF_REF);
if (rambuf == NULL) {
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_frag: pbuf_alloc(PBUF_LINK, 0, PBUF_REF) failed\n"));
return ERR_MEM;
}
rambuf->tot_len = rambuf->len = mtu;
rambuf->payload = LWIP_MEM_ALIGN((void *)buf);
/* Copy the IP header in it */
iphdr = rambuf->payload;
SMEMCPY(iphdr, p->payload, IP_HLEN);
#else /* IP_FRAG_USES_STATIC_BUF */
original_iphdr = p->payload;
iphdr = original_iphdr;
#endif /* IP_FRAG_USES_STATIC_BUF */
/* Save original offset */
tmp = ntohs(IPH_OFFSET(iphdr));
ofo = tmp & IP_OFFMASK;
omf = tmp & IP_MF;
left = p->tot_len - IP_HLEN;
nfb = (mtu - IP_HLEN) / 8;
while (left) {
last = (left <= mtu - IP_HLEN);
/* Set new offset and MF flag */
tmp = omf | (IP_OFFMASK & (ofo));
if (!last)
tmp = tmp | IP_MF;
/* Fill this fragment */
cop = last ? left : nfb * 8;
#if IP_FRAG_USES_STATIC_BUF
poff += pbuf_copy_partial(p, (u8_t*)iphdr + IP_HLEN, cop, poff);
#else /* IP_FRAG_USES_STATIC_BUF */
/* When not using a static buffer, create a chain of pbufs.
* The first will be a PBUF_RAM holding the link and IP header.
* The rest will be PBUF_REFs mirroring the pbuf chain to be fragged,
* but limited to the size of an mtu.
*/
rambuf = pbuf_alloc(PBUF_LINK, IP_HLEN, PBUF_RAM);
if (rambuf == NULL) {
return ERR_MEM;
}
LWIP_ASSERT("this needs a pbuf in one piece!",
(p->len >= (IP_HLEN)));
SMEMCPY(rambuf->payload, original_iphdr, IP_HLEN);
iphdr = rambuf->payload;
/* Can just adjust p directly for needed offset. */
p->payload = (u8_t *)p->payload + poff;
p->len -= poff;
left_to_copy = cop;
while (left_to_copy) {
newpbuflen = (left_to_copy < p->len) ? left_to_copy : p->len;
/* Is this pbuf already empty? */
if (!newpbuflen) {
p = p->next;
continue;
}
newpbuf = pbuf_alloc(PBUF_RAW, 0, PBUF_REF);
if (newpbuf == NULL) {
pbuf_free(rambuf);
return ERR_MEM;
}
/* Mirror this pbuf, although we might not need all of it. */
newpbuf->payload = p->payload;
newpbuf->len = newpbuf->tot_len = newpbuflen;
/* Add it to end of rambuf's chain, but using pbuf_cat, not pbuf_chain
* so that it is removed when pbuf_dechain is later called on rambuf.
*/
pbuf_cat(rambuf, newpbuf);
left_to_copy -= newpbuflen;
if (left_to_copy)
p = p->next;
}
poff = newpbuflen;
#endif /* IP_FRAG_USES_STATIC_BUF */
/* Correct header */
IPH_OFFSET_SET(iphdr, htons(tmp));
IPH_LEN_SET(iphdr, htons(cop + IP_HLEN));
IPH_CHKSUM_SET(iphdr, 0);
IPH_CHKSUM_SET(iphdr, inet_chksum(iphdr, IP_HLEN));
#if IP_FRAG_USES_STATIC_BUF
if (last)
pbuf_realloc(rambuf, left + IP_HLEN);
/* This part is ugly: we alloc a RAM based pbuf for
* the link level header for each chunk and then
* free it.A PBUF_ROM style pbuf for which pbuf_header
* worked would make things simpler.
*/
header = pbuf_alloc(PBUF_LINK, 0, PBUF_RAM);
if (header != NULL) {
pbuf_chain(header, rambuf);
netif->output(netif, header, dest);
IPFRAG_STATS_INC(ip_frag.xmit);
snmp_inc_ipfragcreates();
pbuf_free(header);
} else {
LWIP_DEBUGF(IP_REASS_DEBUG, ("ip_frag: pbuf_alloc() for header failed\n"));
pbuf_free(rambuf);
return ERR_MEM;
}
#else /* IP_FRAG_USES_STATIC_BUF */
/* No need for separate header pbuf - we allowed room for it in rambuf
* when allocated.
*/
netif->output(netif, rambuf, dest);
IPFRAG_STATS_INC(ip_frag.xmit);
/* Unfortunately we can't reuse rambuf - the hardware may still be
* using the buffer. Instead we free it (and the ensuing chain) and
* recreate it next time round the loop. If we're lucky the hardware
* will have already sent the packet, the free will really free, and
* there will be zero memory penalty.
*/
pbuf_free(rambuf);
#endif /* IP_FRAG_USES_STATIC_BUF */
left -= cop;
ofo += nfb;
}
#if IP_FRAG_USES_STATIC_BUF
pbuf_free(rambuf);
#endif /* IP_FRAG_USES_STATIC_BUF */
snmp_inc_ipfragoks();
return ERR_OK;
}
#endif /* IP_FRAG */

635
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/mem.c Normal file
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@ -0,0 +1,635 @@
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* Dynamic memory manager
*
* This is a lightweight replacement for the standard C library malloc().
*
* If you want to use the standard C library malloc() instead, define
* MEM_LIBC_MALLOC to 1 in your lwipopts.h
*
* To let mem_malloc() use pools (prevents fragmentation and is much faster than
* a heap but might waste some memory), define MEM_USE_POOLS to 1, define
* MEM_USE_CUSTOM_POOLS to 1 and create a file "lwippools.h" that includes a list
* of pools like this (more pools can be added between _START and _END):
*
* Define three pools with sizes 256, 512, and 1512 bytes
* LWIP_MALLOC_MEMPOOL_START
* LWIP_MALLOC_MEMPOOL(20, 256)
* LWIP_MALLOC_MEMPOOL(10, 512)
* LWIP_MALLOC_MEMPOOL(5, 1512)
* LWIP_MALLOC_MEMPOOL_END
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
* Simon Goldschmidt
*
*/
#include "lwip/opt.h"
#if !MEM_LIBC_MALLOC /* don't build if not configured for use in lwipopts.h */
#include "lwip/def.h"
#include "lwip/mem.h"
#include "lwip/sys.h"
#include "lwip/stats.h"
#include <string.h>
#if MEM_USE_POOLS
/* lwIP head implemented with different sized pools */
/**
* Allocate memory: determine the smallest pool that is big enough
* to contain an element of 'size' and get an element from that pool.
*
* @param size the size in bytes of the memory needed
* @return a pointer to the allocated memory or NULL if the pool is empty
*/
void *
mem_malloc(mem_size_t size)
{
struct memp_malloc_helper *element;
memp_t poolnr;
mem_size_t required_size = size + sizeof(struct memp_malloc_helper);
for (poolnr = MEMP_POOL_FIRST; poolnr <= MEMP_POOL_LAST; poolnr++) {
#if MEM_USE_POOLS_TRY_BIGGER_POOL
again:
#endif /* MEM_USE_POOLS_TRY_BIGGER_POOL */
/* is this pool big enough to hold an element of the required size
plus a struct memp_malloc_helper that saves the pool this element came from? */
if (required_size <= memp_sizes[poolnr]) {
break;
}
}
if (poolnr > MEMP_POOL_LAST) {
LWIP_ASSERT("mem_malloc(): no pool is that big!", 0);
return NULL;
}
element = (struct memp_malloc_helper*)memp_malloc(poolnr);
if (element == NULL) {
/* No need to DEBUGF or ASSERT: This error is already
taken care of in memp.c */
#if MEM_USE_POOLS_TRY_BIGGER_POOL
/** Try a bigger pool if this one is empty! */
if (poolnr < MEMP_POOL_LAST) {
poolnr++;
goto again;
}
#endif /* MEM_USE_POOLS_TRY_BIGGER_POOL */
return NULL;
}
/* save the pool number this element came from */
element->poolnr = poolnr;
/* and return a pointer to the memory directly after the struct memp_malloc_helper */
element++;
return element;
}
/**
* Free memory previously allocated by mem_malloc. Loads the pool number
* and calls memp_free with that pool number to put the element back into
* its pool
*
* @param rmem the memory element to free
*/
void
mem_free(void *rmem)
{
struct memp_malloc_helper *hmem = (struct memp_malloc_helper*)rmem;
LWIP_ASSERT("rmem != NULL", (rmem != NULL));
LWIP_ASSERT("rmem == MEM_ALIGN(rmem)", (rmem == LWIP_MEM_ALIGN(rmem)));
/* get the original struct memp_malloc_helper */
hmem--;
LWIP_ASSERT("hmem != NULL", (hmem != NULL));
LWIP_ASSERT("hmem == MEM_ALIGN(hmem)", (hmem == LWIP_MEM_ALIGN(hmem)));
LWIP_ASSERT("hmem->poolnr < MEMP_MAX", (hmem->poolnr < MEMP_MAX));
/* and put it in the pool we saved earlier */
memp_free(hmem->poolnr, hmem);
}
#else /* MEM_USE_POOLS */
/* lwIP replacement for your libc malloc() */
/**
* The heap is made up as a list of structs of this type.
* This does not have to be aligned since for getting its size,
* we only use the macro SIZEOF_STRUCT_MEM, which automatically alignes.
*/
struct mem {
/** index (-> ram[next]) of the next struct */
mem_size_t next;
/** index (-> ram[next]) of the next struct */
mem_size_t prev;
/** 1: this area is used; 0: this area is unused */
u8_t used;
};
/** All allocated blocks will be MIN_SIZE bytes big, at least!
* MIN_SIZE can be overridden to suit your needs. Smaller values save space,
* larger values could prevent too small blocks to fragment the RAM too much. */
#ifndef MIN_SIZE
#define MIN_SIZE 12
#endif /* MIN_SIZE */
/* some alignment macros: we define them here for better source code layout */
#define MIN_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MIN_SIZE)
#define SIZEOF_STRUCT_MEM LWIP_MEM_ALIGN_SIZE(sizeof(struct mem))
#define MEM_SIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEM_SIZE)
/** the heap. we need one struct mem at the end and some room for alignment */
static u8_t ram_heap[MEM_SIZE_ALIGNED + (2*SIZEOF_STRUCT_MEM) + MEM_ALIGNMENT];
/** pointer to the heap (ram_heap): for alignment, ram is now a pointer instead of an array */
static u8_t *ram;
/** the last entry, always unused! */
static struct mem *ram_end;
/** pointer to the lowest free block, this is used for faster search */
static struct mem *lfree;
/** concurrent access protection */
static sys_sem_t mem_sem;
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
static volatile u8_t mem_free_count;
/* Allow mem_free from other (e.g. interrupt) context */
#define LWIP_MEM_FREE_DECL_PROTECT() SYS_ARCH_DECL_PROTECT(lev_free)
#define LWIP_MEM_FREE_PROTECT() SYS_ARCH_PROTECT(lev_free)
#define LWIP_MEM_FREE_UNPROTECT() SYS_ARCH_UNPROTECT(lev_free)
#define LWIP_MEM_ALLOC_DECL_PROTECT() SYS_ARCH_DECL_PROTECT(lev_alloc)
#define LWIP_MEM_ALLOC_PROTECT() SYS_ARCH_PROTECT(lev_alloc)
#define LWIP_MEM_ALLOC_UNPROTECT() SYS_ARCH_UNPROTECT(lev_alloc)
#else /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
/* Protect the heap only by using a semaphore */
#define LWIP_MEM_FREE_DECL_PROTECT()
#define LWIP_MEM_FREE_PROTECT() sys_arch_sem_wait(mem_sem, 0)
#define LWIP_MEM_FREE_UNPROTECT() sys_sem_signal(mem_sem)
/* mem_malloc is protected using semaphore AND LWIP_MEM_ALLOC_PROTECT */
#define LWIP_MEM_ALLOC_DECL_PROTECT()
#define LWIP_MEM_ALLOC_PROTECT()
#define LWIP_MEM_ALLOC_UNPROTECT()
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
/**
* "Plug holes" by combining adjacent empty struct mems.
* After this function is through, there should not exist
* one empty struct mem pointing to another empty struct mem.
*
* @param mem this points to a struct mem which just has been freed
* @internal this function is only called by mem_free() and mem_realloc()
*
* This assumes access to the heap is protected by the calling function
* already.
*/
static void
plug_holes(struct mem *mem)
{
struct mem *nmem;
struct mem *pmem;
LWIP_ASSERT("plug_holes: mem >= ram", (u8_t *)mem >= ram);
LWIP_ASSERT("plug_holes: mem < ram_end", (u8_t *)mem < (u8_t *)ram_end);
LWIP_ASSERT("plug_holes: mem->used == 0", mem->used == 0);
/* plug hole forward */
LWIP_ASSERT("plug_holes: mem->next <= MEM_SIZE_ALIGNED", mem->next <= MEM_SIZE_ALIGNED);
nmem = (struct mem *)&ram[mem->next];
if (mem != nmem && nmem->used == 0 && (u8_t *)nmem != (u8_t *)ram_end) {
/* if mem->next is unused and not end of ram, combine mem and mem->next */
if (lfree == nmem) {
lfree = mem;
}
mem->next = nmem->next;
((struct mem *)&ram[nmem->next])->prev = (u8_t *)mem - ram;
}
/* plug hole backward */
pmem = (struct mem *)&ram[mem->prev];
if (pmem != mem && pmem->used == 0) {
/* if mem->prev is unused, combine mem and mem->prev */
if (lfree == mem) {
lfree = pmem;
}
pmem->next = mem->next;
((struct mem *)&ram[mem->next])->prev = (u8_t *)pmem - ram;
}
}
/**
* Zero the heap and initialize start, end and lowest-free
*/
void
mem_init(void)
{
struct mem *mem;
LWIP_ASSERT("Sanity check alignment",
(SIZEOF_STRUCT_MEM & (MEM_ALIGNMENT-1)) == 0);
/* align the heap */
ram = LWIP_MEM_ALIGN(ram_heap);
/* initialize the start of the heap */
mem = (struct mem *)ram;
mem->next = MEM_SIZE_ALIGNED;
mem->prev = 0;
mem->used = 0;
/* initialize the end of the heap */
ram_end = (struct mem *)&ram[MEM_SIZE_ALIGNED];
ram_end->used = 1;
ram_end->next = MEM_SIZE_ALIGNED;
ram_end->prev = MEM_SIZE_ALIGNED;
mem_sem = sys_sem_new(1);
/* initialize the lowest-free pointer to the start of the heap */
lfree = (struct mem *)ram;
MEM_STATS_AVAIL(avail, MEM_SIZE_ALIGNED);
}
/**
* Put a struct mem back on the heap
*
* @param rmem is the data portion of a struct mem as returned by a previous
* call to mem_malloc()
*/
void
mem_free(void *rmem)
{
struct mem *mem;
LWIP_MEM_FREE_DECL_PROTECT();
if (rmem == NULL) {
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("mem_free(p == NULL) was called.\n"));
return;
}
LWIP_ASSERT("mem_free: sanity check alignment", (((mem_ptr_t)rmem) & (MEM_ALIGNMENT-1)) == 0);
LWIP_ASSERT("mem_free: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
(u8_t *)rmem < (u8_t *)ram_end);
if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
SYS_ARCH_DECL_PROTECT(lev);
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_free: illegal memory\n"));
/* protect mem stats from concurrent access */
SYS_ARCH_PROTECT(lev);
MEM_STATS_INC(illegal);
SYS_ARCH_UNPROTECT(lev);
return;
}
/* protect the heap from concurrent access */
LWIP_MEM_FREE_PROTECT();
/* Get the corresponding struct mem ... */
mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM);
/* ... which has to be in a used state ... */
LWIP_ASSERT("mem_free: mem->used", mem->used);
/* ... and is now unused. */
mem->used = 0;
if (mem < lfree) {
/* the newly freed struct is now the lowest */
lfree = mem;
}
MEM_STATS_DEC_USED(used, mem->next - ((u8_t *)mem - ram));
/* finally, see if prev or next are free also */
plug_holes(mem);
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
LWIP_MEM_FREE_UNPROTECT();
}
/**
* In contrast to its name, mem_realloc can only shrink memory, not expand it.
* Since the only use (for now) is in pbuf_realloc (which also can only shrink),
* this shouldn't be a problem!
*
* @param rmem pointer to memory allocated by mem_malloc the is to be shrinked
* @param newsize required size after shrinking (needs to be smaller than or
* equal to the previous size)
* @return for compatibility reasons: is always == rmem, at the moment
* or NULL if newsize is > old size, in which case rmem is NOT touched
* or freed!
*/
void *
mem_realloc(void *rmem, mem_size_t newsize)
{
mem_size_t size;
mem_size_t ptr, ptr2;
struct mem *mem, *mem2;
/* use the FREE_PROTECT here: it protects with sem OR SYS_ARCH_PROTECT */
LWIP_MEM_FREE_DECL_PROTECT();
/* Expand the size of the allocated memory region so that we can
adjust for alignment. */
newsize = LWIP_MEM_ALIGN_SIZE(newsize);
if(newsize < MIN_SIZE_ALIGNED) {
/* every data block must be at least MIN_SIZE_ALIGNED long */
newsize = MIN_SIZE_ALIGNED;
}
if (newsize > MEM_SIZE_ALIGNED) {
return NULL;
}
LWIP_ASSERT("mem_realloc: legal memory", (u8_t *)rmem >= (u8_t *)ram &&
(u8_t *)rmem < (u8_t *)ram_end);
if ((u8_t *)rmem < (u8_t *)ram || (u8_t *)rmem >= (u8_t *)ram_end) {
SYS_ARCH_DECL_PROTECT(lev);
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SEVERE, ("mem_realloc: illegal memory\n"));
/* protect mem stats from concurrent access */
SYS_ARCH_PROTECT(lev);
MEM_STATS_INC(illegal);
SYS_ARCH_UNPROTECT(lev);
return rmem;
}
/* Get the corresponding struct mem ... */
mem = (struct mem *)((u8_t *)rmem - SIZEOF_STRUCT_MEM);
/* ... and its offset pointer */
ptr = (u8_t *)mem - ram;
size = mem->next - ptr - SIZEOF_STRUCT_MEM;
LWIP_ASSERT("mem_realloc can only shrink memory", newsize <= size);
if (newsize > size) {
/* not supported */
return NULL;
}
if (newsize == size) {
/* No change in size, simply return */
return rmem;
}
/* protect the heap from concurrent access */
LWIP_MEM_FREE_PROTECT();
MEM_STATS_DEC_USED(used, (size - newsize));
mem2 = (struct mem *)&ram[mem->next];
if(mem2->used == 0) {
/* The next struct is unused, we can simply move it at little */
mem_size_t next;
/* remember the old next pointer */
next = mem2->next;
/* create new struct mem which is moved directly after the shrinked mem */
ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize;
if (lfree == mem2) {
lfree = (struct mem *)&ram[ptr2];
}
mem2 = (struct mem *)&ram[ptr2];
mem2->used = 0;
/* restore the next pointer */
mem2->next = next;
/* link it back to mem */
mem2->prev = ptr;
/* link mem to it */
mem->next = ptr2;
/* last thing to restore linked list: as we have moved mem2,
* let 'mem2->next->prev' point to mem2 again. but only if mem2->next is not
* the end of the heap */
if (mem2->next != MEM_SIZE_ALIGNED) {
((struct mem *)&ram[mem2->next])->prev = ptr2;
}
/* no need to plug holes, we've already done that */
} else if (newsize + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED <= size) {
/* Next struct is used but there's room for another struct mem with
* at least MIN_SIZE_ALIGNED of data.
* Old size ('size') must be big enough to contain at least 'newsize' plus a struct mem
* ('SIZEOF_STRUCT_MEM') with some data ('MIN_SIZE_ALIGNED').
* @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
* region that couldn't hold data, but when mem->next gets freed,
* the 2 regions would be combined, resulting in more free memory */
ptr2 = ptr + SIZEOF_STRUCT_MEM + newsize;
mem2 = (struct mem *)&ram[ptr2];
if (mem2 < lfree) {
lfree = mem2;
}
mem2->used = 0;
mem2->next = mem->next;
mem2->prev = ptr;
mem->next = ptr2;
if (mem2->next != MEM_SIZE_ALIGNED) {
((struct mem *)&ram[mem2->next])->prev = ptr2;
}
/* the original mem->next is used, so no need to plug holes! */
}
/* else {
next struct mem is used but size between mem and mem2 is not big enough
to create another struct mem
-> don't do anyhting.
-> the remaining space stays unused since it is too small
} */
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_free_count = 1;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
LWIP_MEM_FREE_UNPROTECT();
return rmem;
}
/**
* Adam's mem_malloc() plus solution for bug #17922
* Allocate a block of memory with a minimum of 'size' bytes.
*
* @param size is the minimum size of the requested block in bytes.
* @return pointer to allocated memory or NULL if no free memory was found.
*
* Note that the returned value will always be aligned (as defined by MEM_ALIGNMENT).
*/
void *
mem_malloc(mem_size_t size)
{
mem_size_t ptr, ptr2;
struct mem *mem, *mem2;
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
u8_t local_mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
LWIP_MEM_ALLOC_DECL_PROTECT();
if (size == 0) {
return NULL;
}
/* Expand the size of the allocated memory region so that we can
adjust for alignment. */
size = LWIP_MEM_ALIGN_SIZE(size);
if(size < MIN_SIZE_ALIGNED) {
/* every data block must be at least MIN_SIZE_ALIGNED long */
size = MIN_SIZE_ALIGNED;
}
if (size > MEM_SIZE_ALIGNED) {
return NULL;
}
/* protect the heap from concurrent access */
sys_arch_sem_wait(mem_sem, 0);
LWIP_MEM_ALLOC_PROTECT();
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
/* run as long as a mem_free disturbed mem_malloc */
do {
local_mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
/* Scan through the heap searching for a free block that is big enough,
* beginning with the lowest free block.
*/
for (ptr = (u8_t *)lfree - ram; ptr < MEM_SIZE_ALIGNED - size;
ptr = ((struct mem *)&ram[ptr])->next) {
mem = (struct mem *)&ram[ptr];
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
mem_free_count = 0;
LWIP_MEM_ALLOC_UNPROTECT();
/* allow mem_free to run */
LWIP_MEM_ALLOC_PROTECT();
if (mem_free_count != 0) {
local_mem_free_count = mem_free_count;
}
mem_free_count = 0;
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
if ((!mem->used) &&
(mem->next - (ptr + SIZEOF_STRUCT_MEM)) >= size) {
/* mem is not used and at least perfect fit is possible:
* mem->next - (ptr + SIZEOF_STRUCT_MEM) gives us the 'user data size' of mem */
if (mem->next - (ptr + SIZEOF_STRUCT_MEM) >= (size + SIZEOF_STRUCT_MEM + MIN_SIZE_ALIGNED)) {
/* (in addition to the above, we test if another struct mem (SIZEOF_STRUCT_MEM) containing
* at least MIN_SIZE_ALIGNED of data also fits in the 'user data space' of 'mem')
* -> split large block, create empty remainder,
* remainder must be large enough to contain MIN_SIZE_ALIGNED data: if
* mem->next - (ptr + (2*SIZEOF_STRUCT_MEM)) == size,
* struct mem would fit in but no data between mem2 and mem2->next
* @todo we could leave out MIN_SIZE_ALIGNED. We would create an empty
* region that couldn't hold data, but when mem->next gets freed,
* the 2 regions would be combined, resulting in more free memory
*/
ptr2 = ptr + SIZEOF_STRUCT_MEM + size;
/* create mem2 struct */
mem2 = (struct mem *)&ram[ptr2];
mem2->used = 0;
mem2->next = mem->next;
mem2->prev = ptr;
/* and insert it between mem and mem->next */
mem->next = ptr2;
mem->used = 1;
if (mem2->next != MEM_SIZE_ALIGNED) {
((struct mem *)&ram[mem2->next])->prev = ptr2;
}
MEM_STATS_INC_USED(used, (size + SIZEOF_STRUCT_MEM));
} else {
/* (a mem2 struct does no fit into the user data space of mem and mem->next will always
* be used at this point: if not we have 2 unused structs in a row, plug_holes should have
* take care of this).
* -> near fit or excact fit: do not split, no mem2 creation
* also can't move mem->next directly behind mem, since mem->next
* will always be used at this point!
*/
mem->used = 1;
MEM_STATS_INC_USED(used, mem->next - ((u8_t *)mem - ram));
}
if (mem == lfree) {
/* Find next free block after mem and update lowest free pointer */
while (lfree->used && lfree != ram_end) {
LWIP_MEM_ALLOC_UNPROTECT();
/* prevent high interrupt latency... */
LWIP_MEM_ALLOC_PROTECT();
lfree = (struct mem *)&ram[lfree->next];
}
LWIP_ASSERT("mem_malloc: !lfree->used", ((lfree == ram_end) || (!lfree->used)));
}
LWIP_MEM_ALLOC_UNPROTECT();
sys_sem_signal(mem_sem);
LWIP_ASSERT("mem_malloc: allocated memory not above ram_end.",
(mem_ptr_t)mem + SIZEOF_STRUCT_MEM + size <= (mem_ptr_t)ram_end);
LWIP_ASSERT("mem_malloc: allocated memory properly aligned.",
((mem_ptr_t)mem + SIZEOF_STRUCT_MEM) % MEM_ALIGNMENT == 0);
LWIP_ASSERT("mem_malloc: sanity check alignment",
(((mem_ptr_t)mem) & (MEM_ALIGNMENT-1)) == 0);
return (u8_t *)mem + SIZEOF_STRUCT_MEM;
}
}
#if LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT
/* if we got interrupted by a mem_free, try again */
} while(local_mem_free_count != 0);
#endif /* LWIP_ALLOW_MEM_FREE_FROM_OTHER_CONTEXT */
LWIP_DEBUGF(MEM_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("mem_malloc: could not allocate %"S16_F" bytes\n", (s16_t)size));
MEM_STATS_INC(err);
LWIP_MEM_ALLOC_UNPROTECT();
sys_sem_signal(mem_sem);
return NULL;
}
#endif /* MEM_USE_POOLS */
/**
* Contiguously allocates enough space for count objects that are size bytes
* of memory each and returns a pointer to the allocated memory.
*
* The allocated memory is filled with bytes of value zero.
*
* @param count number of objects to allocate
* @param size size of the objects to allocate
* @return pointer to allocated memory / NULL pointer if there is an error
*/
void *mem_calloc(mem_size_t count, mem_size_t size)
{
void *p;
/* allocate 'count' objects of size 'size' */
p = mem_malloc(count * size);
if (p) {
/* zero the memory */
memset(p, 0, count * size);
}
return p;
}
#endif /* !MEM_LIBC_MALLOC */

388
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@ -0,0 +1,388 @@
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* Dynamic pool memory manager
*
* lwIP has dedicated pools for many structures (netconn, protocol control blocks,
* packet buffers, ...). All these pools are managed here.
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/memp.h"
#include "lwip/pbuf.h"
#include "lwip/udp.h"
#include "lwip/raw.h"
#include "lwip/tcp.h"
#include "lwip/igmp.h"
#include "lwip/api.h"
#include "lwip/api_msg.h"
#include "lwip/tcpip.h"
#include "lwip/sys.h"
#include "lwip/stats.h"
#include "netif/etharp.h"
#include "lwip/ip_frag.h"
#include <string.h>
#if !MEMP_MEM_MALLOC /* don't build if not configured for use in lwipopts.h */
struct memp {
struct memp *next;
#if MEMP_OVERFLOW_CHECK
const char *file;
int line;
#endif /* MEMP_OVERFLOW_CHECK */
};
#if MEMP_OVERFLOW_CHECK
/* if MEMP_OVERFLOW_CHECK is turned on, we reserve some bytes at the beginning
* and at the end of each element, initialize them as 0xcd and check
* them later. */
/* If MEMP_OVERFLOW_CHECK is >= 2, on every call to memp_malloc or memp_free,
* every single element in each pool is checked!
* This is VERY SLOW but also very helpful. */
/* MEMP_SANITY_REGION_BEFORE and MEMP_SANITY_REGION_AFTER can be overridden in
* lwipopts.h to change the amount reserved for checking. */
#ifndef MEMP_SANITY_REGION_BEFORE
#define MEMP_SANITY_REGION_BEFORE 16
#endif /* MEMP_SANITY_REGION_BEFORE*/
#if MEMP_SANITY_REGION_BEFORE > 0
#define MEMP_SANITY_REGION_BEFORE_ALIGNED LWIP_MEM_ALIGN_SIZE(MEMP_SANITY_REGION_BEFORE)
#else
#define MEMP_SANITY_REGION_BEFORE_ALIGNED 0
#endif /* MEMP_SANITY_REGION_BEFORE*/
#ifndef MEMP_SANITY_REGION_AFTER
#define MEMP_SANITY_REGION_AFTER 16
#endif /* MEMP_SANITY_REGION_AFTER*/
#if MEMP_SANITY_REGION_AFTER > 0
#define MEMP_SANITY_REGION_AFTER_ALIGNED LWIP_MEM_ALIGN_SIZE(MEMP_SANITY_REGION_AFTER)
#else
#define MEMP_SANITY_REGION_AFTER_ALIGNED 0
#endif /* MEMP_SANITY_REGION_AFTER*/
/* MEMP_SIZE: save space for struct memp and for sanity check */
#define MEMP_SIZE (LWIP_MEM_ALIGN_SIZE(sizeof(struct memp)) + MEMP_SANITY_REGION_BEFORE_ALIGNED)
#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x) + MEMP_SANITY_REGION_AFTER_ALIGNED)
#else /* MEMP_OVERFLOW_CHECK */
/* No sanity checks
* We don't need to preserve the struct memp while not allocated, so we
* can save a little space and set MEMP_SIZE to 0.
*/
#define MEMP_SIZE 0
#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x))
#endif /* MEMP_OVERFLOW_CHECK */
/** This array holds the first free element of each pool.
* Elements form a linked list. */
static struct memp *memp_tab[MEMP_MAX];
#else /* MEMP_MEM_MALLOC */
#define MEMP_ALIGN_SIZE(x) (LWIP_MEM_ALIGN_SIZE(x))
#endif /* MEMP_MEM_MALLOC */
/** This array holds the element sizes of each pool. */
#if !MEM_USE_POOLS && !MEMP_MEM_MALLOC
static
#endif
const u16_t memp_sizes[MEMP_MAX] = {
#define LWIP_MEMPOOL(name,num,size,desc) LWIP_MEM_ALIGN_SIZE(size),
#include "lwip/memp_std.h"
};
#if !MEMP_MEM_MALLOC /* don't build if not configured for use in lwipopts.h */
/** This array holds the number of elements in each pool. */
static const u16_t memp_num[MEMP_MAX] = {
#define LWIP_MEMPOOL(name,num,size,desc) (num),
#include "lwip/memp_std.h"
};
/** This array holds a textual description of each pool. */
#ifdef LWIP_DEBUG
static const char *memp_desc[MEMP_MAX] = {
#define LWIP_MEMPOOL(name,num,size,desc) (desc),
#include "lwip/memp_std.h"
};
#endif /* LWIP_DEBUG */
/** This is the actual memory used by the pools. */
static u8_t memp_memory[MEM_ALIGNMENT - 1
#define LWIP_MEMPOOL(name,num,size,desc) + ( (num) * (MEMP_SIZE + MEMP_ALIGN_SIZE(size) ) )
#include "lwip/memp_std.h"
];
#if MEMP_SANITY_CHECK
/**
* Check that memp-lists don't form a circle
*/
static int
memp_sanity(void)
{
s16_t i, c;
struct memp *m, *n;
for (i = 0; i < MEMP_MAX; i++) {
for (m = memp_tab[i]; m != NULL; m = m->next) {
c = 1;
for (n = memp_tab[i]; n != NULL; n = n->next) {
if (n == m && --c < 0) {
return 0;
}
}
}
}
return 1;
}
#endif /* MEMP_SANITY_CHECK*/
#if MEMP_OVERFLOW_CHECK
/**
* Check if a memp element was victim of an overflow
* (e.g. the restricted area after it has been altered)
*
* @param p the memp element to check
* @param memp_size the element size of the pool p comes from
*/
static void
memp_overflow_check_element(struct memp *p, u16_t memp_size)
{
u16_t k;
u8_t *m;
#if MEMP_SANITY_REGION_BEFORE_ALIGNED > 0
m = (u8_t*)p + MEMP_SIZE - MEMP_SANITY_REGION_BEFORE_ALIGNED;
for (k = 0; k < MEMP_SANITY_REGION_BEFORE_ALIGNED; k++) {
if (m[k] != 0xcd) {
LWIP_ASSERT("detected memp underflow!", 0);
}
}
#endif
#if MEMP_SANITY_REGION_AFTER_ALIGNED > 0
m = (u8_t*)p + MEMP_SIZE + memp_size;
for (k = 0; k < MEMP_SANITY_REGION_AFTER_ALIGNED; k++) {
if (m[k] != 0xcd) {
LWIP_ASSERT("detected memp overflow!", 0);
}
}
#endif
}
/**
* Do an overflow check for all elements in every pool.
*
* @see memp_overflow_check_element for a description of the check
*/
static void
memp_overflow_check_all(void)
{
u16_t i, j;
struct memp *p;
p = LWIP_MEM_ALIGN(memp_memory);
for (i = 0; i < MEMP_MAX; ++i) {
p = p;
for (j = 0; j < memp_num[i]; ++j) {
memp_overflow_check_element(p, memp_sizes[i]);
p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED);
}
}
}
/**
* Initialize the restricted areas of all memp elements in every pool.
*/
static void
memp_overflow_init(void)
{
u16_t i, j;
struct memp *p;
u8_t *m;
p = LWIP_MEM_ALIGN(memp_memory);
for (i = 0; i < MEMP_MAX; ++i) {
p = p;
for (j = 0; j < memp_num[i]; ++j) {
#if MEMP_SANITY_REGION_BEFORE_ALIGNED > 0
m = (u8_t*)p + MEMP_SIZE - MEMP_SANITY_REGION_BEFORE_ALIGNED;
memset(m, 0xcd, MEMP_SANITY_REGION_BEFORE_ALIGNED);
#endif
#if MEMP_SANITY_REGION_AFTER_ALIGNED > 0
m = (u8_t*)p + MEMP_SIZE + memp_sizes[i];
memset(m, 0xcd, MEMP_SANITY_REGION_AFTER_ALIGNED);
#endif
p = (struct memp*)((u8_t*)p + MEMP_SIZE + memp_sizes[i] + MEMP_SANITY_REGION_AFTER_ALIGNED);
}
}
}
#endif /* MEMP_OVERFLOW_CHECK */
/**
* Initialize this module.
*
* Carves out memp_memory into linked lists for each pool-type.
*/
void
memp_init(void)
{
struct memp *memp;
u16_t i, j;
for (i = 0; i < MEMP_MAX; ++i) {
MEMP_STATS_AVAIL(used, i, 0);
MEMP_STATS_AVAIL(max, i, 0);
MEMP_STATS_AVAIL(err, i, 0);
MEMP_STATS_AVAIL(avail, i, memp_num[i]);
}
memp = LWIP_MEM_ALIGN(memp_memory);
/* for every pool: */
for (i = 0; i < MEMP_MAX; ++i) {
memp_tab[i] = NULL;
/* create a linked list of memp elements */
for (j = 0; j < memp_num[i]; ++j) {
memp->next = memp_tab[i];
memp_tab[i] = memp;
memp = (struct memp *)((u8_t *)memp + MEMP_SIZE + memp_sizes[i]
#if MEMP_OVERFLOW_CHECK
+ MEMP_SANITY_REGION_AFTER_ALIGNED
#endif
);
}
}
#if MEMP_OVERFLOW_CHECK
memp_overflow_init();
/* check everything a first time to see if it worked */
memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK */
}
/**
* Get an element from a specific pool.
*
* @param type the pool to get an element from
*
* the debug version has two more parameters:
* @param file file name calling this function
* @param line number of line where this function is called
*
* @return a pointer to the allocated memory or a NULL pointer on error
*/
void *
#if !MEMP_OVERFLOW_CHECK
memp_malloc(memp_t type)
#else
memp_malloc_fn(memp_t type, const char* file, const int line)
#endif
{
struct memp *memp;
SYS_ARCH_DECL_PROTECT(old_level);
LWIP_ERROR("memp_malloc: type < MEMP_MAX", (type < MEMP_MAX), return NULL;);
SYS_ARCH_PROTECT(old_level);
#if MEMP_OVERFLOW_CHECK >= 2
memp_overflow_check_all();
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
memp = memp_tab[type];
if (memp != NULL) {
memp_tab[type] = memp->next;
#if MEMP_OVERFLOW_CHECK
memp->next = NULL;
memp->file = file;
memp->line = line;
#endif /* MEMP_OVERFLOW_CHECK */
MEMP_STATS_INC_USED(used, type);
LWIP_ASSERT("memp_malloc: memp properly aligned",
((mem_ptr_t)memp % MEM_ALIGNMENT) == 0);
memp = (struct memp*)((u8_t*)memp + MEMP_SIZE);
} else {
LWIP_DEBUGF(MEMP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("memp_malloc: out of memory in pool %s\n", memp_desc[type]));
MEMP_STATS_INC(err, type);
}
SYS_ARCH_UNPROTECT(old_level);
return memp;
}
/**
* Put an element back into its pool.
*
* @param type the pool where to put mem
* @param mem the memp element to free
*/
void
memp_free(memp_t type, void *mem)
{
struct memp *memp;
SYS_ARCH_DECL_PROTECT(old_level);
if (mem == NULL) {
return;
}
LWIP_ASSERT("memp_free: mem properly aligned",
((mem_ptr_t)mem % MEM_ALIGNMENT) == 0);
memp = (struct memp *)((u8_t*)mem - MEMP_SIZE);
SYS_ARCH_PROTECT(old_level);
#if MEMP_OVERFLOW_CHECK
#if MEMP_OVERFLOW_CHECK >= 2
memp_overflow_check_all();
#else
memp_overflow_check_element(memp, memp_sizes[type]);
#endif /* MEMP_OVERFLOW_CHECK >= 2 */
#endif /* MEMP_OVERFLOW_CHECK */
MEMP_STATS_DEC(used, type);
memp->next = memp_tab[type];
memp_tab[type] = memp;
#if MEMP_SANITY_CHECK
LWIP_ASSERT("memp sanity", memp_sanity());
#endif /* MEMP_SANITY_CHECK */
SYS_ARCH_UNPROTECT(old_level);
}
#endif /* MEMP_MEM_MALLOC */

683
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/netif.c Normal file
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@ -0,0 +1,683 @@
/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* lwIP network interface abstraction
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/def.h"
#include "lwip/ip_addr.h"
#include "lwip/netif.h"
#include "lwip/tcp.h"
#include "lwip/snmp.h"
#include "lwip/igmp.h"
#include "netif/etharp.h"
#if ENABLE_LOOPBACK
#include "lwip/sys.h"
#if LWIP_NETIF_LOOPBACK_MULTITHREADING
#include "lwip/tcpip.h"
#endif /* LWIP_NETIF_LOOPBACK_MULTITHREADING */
#endif /* ENABLE_LOOPBACK */
#if LWIP_AUTOIP
#include "lwip/autoip.h"
#endif /* LWIP_AUTOIP */
#if LWIP_DHCP
#include "lwip/dhcp.h"
#endif /* LWIP_DHCP */
#if LWIP_NETIF_STATUS_CALLBACK
#define NETIF_STATUS_CALLBACK(n) { if (n->status_callback) (n->status_callback)(n); }
#else
#define NETIF_STATUS_CALLBACK(n) { /* NOP */ }
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
#define NETIF_LINK_CALLBACK(n) { if (n->link_callback) (n->link_callback)(n); }
#else
#define NETIF_LINK_CALLBACK(n) { /* NOP */ }
#endif /* LWIP_NETIF_LINK_CALLBACK */
struct netif *netif_list;
struct netif *netif_default;
/**
* Add a network interface to the list of lwIP netifs.
*
* @param netif a pre-allocated netif structure
* @param ipaddr IP address for the new netif
* @param netmask network mask for the new netif
* @param gw default gateway IP address for the new netif
* @param state opaque data passed to the new netif
* @param init callback function that initializes the interface
* @param input callback function that is called to pass
* ingress packets up in the protocol layer stack.
*
* @return netif, or NULL if failed.
*/
struct netif *
netif_add(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask,
struct ip_addr *gw,
void *state,
err_t (* init)(struct netif *netif),
err_t (* input)(struct pbuf *p, struct netif *netif))
{
static u8_t netifnum = 0;
/* reset new interface configuration state */
netif->ip_addr.addr = 0;
netif->netmask.addr = 0;
netif->gw.addr = 0;
netif->flags = 0;
#if LWIP_DHCP
/* netif not under DHCP control by default */
netif->dhcp = NULL;
#endif /* LWIP_DHCP */
#if LWIP_AUTOIP
/* netif not under AutoIP control by default */
netif->autoip = NULL;
#endif /* LWIP_AUTOIP */
#if LWIP_NETIF_STATUS_CALLBACK
netif->status_callback = NULL;
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
netif->link_callback = NULL;
#endif /* LWIP_NETIF_LINK_CALLBACK */
#if LWIP_IGMP
netif->igmp_mac_filter = NULL;
#endif /* LWIP_IGMP */
#if ENABLE_LOOPBACK
netif->loop_first = NULL;
netif->loop_last = NULL;
#endif /* ENABLE_LOOPBACK */
/* remember netif specific state information data */
netif->state = state;
netif->num = netifnum++;
netif->input = input;
#if LWIP_NETIF_HWADDRHINT
netif->addr_hint = NULL;
#endif /* LWIP_NETIF_HWADDRHINT*/
#if ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS
netif->loop_cnt_current = 0;
#endif /* ENABLE_LOOPBACK && LWIP_LOOPBACK_MAX_PBUFS */
netif_set_addr(netif, ipaddr, netmask, gw);
/* call user specified initialization function for netif */
if (init(netif) != ERR_OK) {
return NULL;
}
/* add this netif to the list */
netif->next = netif_list;
netif_list = netif;
snmp_inc_iflist();
#if LWIP_IGMP
/* start IGMP processing */
if (netif->flags & NETIF_FLAG_IGMP) {
igmp_start( netif);
}
#endif /* LWIP_IGMP */
LWIP_DEBUGF(NETIF_DEBUG, ("netif: added interface %c%c IP addr ",
netif->name[0], netif->name[1]));
ip_addr_debug_print(NETIF_DEBUG, ipaddr);
LWIP_DEBUGF(NETIF_DEBUG, (" netmask "));
ip_addr_debug_print(NETIF_DEBUG, netmask);
LWIP_DEBUGF(NETIF_DEBUG, (" gw "));
ip_addr_debug_print(NETIF_DEBUG, gw);
LWIP_DEBUGF(NETIF_DEBUG, ("\n"));
return netif;
}
/**
* Change IP address configuration for a network interface (including netmask
* and default gateway).
*
* @param netif the network interface to change
* @param ipaddr the new IP address
* @param netmask the new netmask
* @param gw the new default gateway
*/
void
netif_set_addr(struct netif *netif, struct ip_addr *ipaddr, struct ip_addr *netmask,
struct ip_addr *gw)
{
netif_set_ipaddr(netif, ipaddr);
netif_set_netmask(netif, netmask);
netif_set_gw(netif, gw);
}
/**
* Remove a network interface from the list of lwIP netifs.
*
* @param netif the network interface to remove
*/
void netif_remove(struct netif * netif)
{
if ( netif == NULL ) return;
#if LWIP_IGMP
/* stop IGMP processing */
if (netif->flags & NETIF_FLAG_IGMP) {
igmp_stop( netif);
}
#endif /* LWIP_IGMP */
snmp_delete_ipaddridx_tree(netif);
/* is it the first netif? */
if (netif_list == netif) {
netif_list = netif->next;
snmp_dec_iflist();
}
else {
/* look for netif further down the list */
struct netif * tmpNetif;
for (tmpNetif = netif_list; tmpNetif != NULL; tmpNetif = tmpNetif->next) {
if (tmpNetif->next == netif) {
tmpNetif->next = netif->next;
snmp_dec_iflist();
break;
}
}
if (tmpNetif == NULL)
return; /* we didn't find any netif today */
}
/* this netif is default? */
if (netif_default == netif)
/* reset default netif */
netif_set_default(NULL);
LWIP_DEBUGF( NETIF_DEBUG, ("netif_remove: removed netif\n") );
}
/**
* Find a network interface by searching for its name
*
* @param name the name of the netif (like netif->name) plus concatenated number
* in ascii representation (e.g. 'en0')
*/
struct netif *
netif_find(char *name)
{
struct netif *netif;
u8_t num;
if (name == NULL) {
return NULL;
}
num = name[2] - '0';
for(netif = netif_list; netif != NULL; netif = netif->next) {
if (num == netif->num &&
name[0] == netif->name[0] &&
name[1] == netif->name[1]) {
LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: found %c%c\n", name[0], name[1]));
return netif;
}
}
LWIP_DEBUGF(NETIF_DEBUG, ("netif_find: didn't find %c%c\n", name[0], name[1]));
return NULL;
}
/**
* Change the IP address of a network interface
*
* @param netif the network interface to change
* @param ipaddr the new IP address
*
* @note call netif_set_addr() if you also want to change netmask and
* default gateway
*/
void
netif_set_ipaddr(struct netif *netif, struct ip_addr *ipaddr)
{
/* TODO: Handling of obsolete pcbs */
/* See: http://mail.gnu.org/archive/html/lwip-users/2003-03/msg00118.html */
#if LWIP_TCP
struct tcp_pcb *pcb;
struct tcp_pcb_listen *lpcb;
/* address is actually being changed? */
if ((ip_addr_cmp(ipaddr, &(netif->ip_addr))) == 0)
{
/* extern struct tcp_pcb *tcp_active_pcbs; defined by tcp.h */
LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: netif address being changed\n"));
pcb = tcp_active_pcbs;
while (pcb != NULL) {
/* PCB bound to current local interface address? */
if (ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) {
/* this connection must be aborted */
struct tcp_pcb *next = pcb->next;
LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_STATE, ("netif_set_ipaddr: aborting TCP pcb %p\n", (void *)pcb));
tcp_abort(pcb);
pcb = next;
} else {
pcb = pcb->next;
}
}
for (lpcb = tcp_listen_pcbs.listen_pcbs; lpcb != NULL; lpcb = lpcb->next) {
/* PCB bound to current local interface address? */
if ((!(ip_addr_isany(&(lpcb->local_ip)))) &&
(ip_addr_cmp(&(lpcb->local_ip), &(netif->ip_addr)))) {
/* The PCB is listening to the old ipaddr and
* is set to listen to the new one instead */
ip_addr_set(&(lpcb->local_ip), ipaddr);
}
}
}
#endif
snmp_delete_ipaddridx_tree(netif);
snmp_delete_iprteidx_tree(0,netif);
/* set new IP address to netif */
ip_addr_set(&(netif->ip_addr), ipaddr);
snmp_insert_ipaddridx_tree(netif);
snmp_insert_iprteidx_tree(0,netif);
LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: IP address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
netif->name[0], netif->name[1],
ip4_addr1(&netif->ip_addr),
ip4_addr2(&netif->ip_addr),
ip4_addr3(&netif->ip_addr),
ip4_addr4(&netif->ip_addr)));
}
/**
* Change the default gateway for a network interface
*
* @param netif the network interface to change
* @param gw the new default gateway
*
* @note call netif_set_addr() if you also want to change ip address and netmask
*/
void
netif_set_gw(struct netif *netif, struct ip_addr *gw)
{
ip_addr_set(&(netif->gw), gw);
LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: GW address of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
netif->name[0], netif->name[1],
ip4_addr1(&netif->gw),
ip4_addr2(&netif->gw),
ip4_addr3(&netif->gw),
ip4_addr4(&netif->gw)));
}
/**
* Change the netmask of a network interface
*
* @param netif the network interface to change
* @param netmask the new netmask
*
* @note call netif_set_addr() if you also want to change ip address and
* default gateway
*/
void
netif_set_netmask(struct netif *netif, struct ip_addr *netmask)
{
snmp_delete_iprteidx_tree(0, netif);
/* set new netmask to netif */
ip_addr_set(&(netif->netmask), netmask);
snmp_insert_iprteidx_tree(0, netif);
LWIP_DEBUGF(NETIF_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("netif: netmask of interface %c%c set to %"U16_F".%"U16_F".%"U16_F".%"U16_F"\n",
netif->name[0], netif->name[1],
ip4_addr1(&netif->netmask),
ip4_addr2(&netif->netmask),
ip4_addr3(&netif->netmask),
ip4_addr4(&netif->netmask)));
}
/**
* Set a network interface as the default network interface
* (used to output all packets for which no specific route is found)
*
* @param netif the default network interface
*/
void
netif_set_default(struct netif *netif)
{
if (netif == NULL)
{
/* remove default route */
snmp_delete_iprteidx_tree(1, netif);
}
else
{
/* install default route */
snmp_insert_iprteidx_tree(1, netif);
}
netif_default = netif;
LWIP_DEBUGF(NETIF_DEBUG, ("netif: setting default interface %c%c\n",
netif ? netif->name[0] : '\'', netif ? netif->name[1] : '\''));
}
/**
* Bring an interface up, available for processing
* traffic.
*
* @note: Enabling DHCP on a down interface will make it come
* up once configured.
*
* @see dhcp_start()
*/
void netif_set_up(struct netif *netif)
{
if ( !(netif->flags & NETIF_FLAG_UP )) {
netif->flags |= NETIF_FLAG_UP;
#if LWIP_SNMP
snmp_get_sysuptime(&netif->ts);
#endif /* LWIP_SNMP */
NETIF_LINK_CALLBACK(netif);
NETIF_STATUS_CALLBACK(netif);
#if LWIP_ARP
/* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
if (netif->flags & NETIF_FLAG_ETHARP) {
etharp_gratuitous(netif);
}
#endif /* LWIP_ARP */
#if LWIP_IGMP
/* resend IGMP memberships */
if (netif->flags & NETIF_FLAG_IGMP) {
igmp_report_groups( netif);
}
#endif /* LWIP_IGMP */
}
}
/**
* Bring an interface down, disabling any traffic processing.
*
* @note: Enabling DHCP on a down interface will make it come
* up once configured.
*
* @see dhcp_start()
*/
void netif_set_down(struct netif *netif)
{
if ( netif->flags & NETIF_FLAG_UP )
{
netif->flags &= ~NETIF_FLAG_UP;
#if LWIP_SNMP
snmp_get_sysuptime(&netif->ts);
#endif
NETIF_LINK_CALLBACK(netif);
NETIF_STATUS_CALLBACK(netif);
}
}
/**
* Ask if an interface is up
*/
u8_t netif_is_up(struct netif *netif)
{
return (netif->flags & NETIF_FLAG_UP)?1:0;
}
#if LWIP_NETIF_STATUS_CALLBACK
/**
* Set callback to be called when interface is brought up/down
*/
void netif_set_status_callback(struct netif *netif, void (* status_callback)(struct netif *netif ))
{
if ( netif )
netif->status_callback = status_callback;
}
#endif /* LWIP_NETIF_STATUS_CALLBACK */
#if LWIP_NETIF_LINK_CALLBACK
/**
* Called by a driver when its link goes up
*/
void netif_set_link_up(struct netif *netif )
{
netif->flags |= NETIF_FLAG_LINK_UP;
#if LWIP_DHCP
if (netif->dhcp) {
dhcp_network_changed(netif);
}
#endif /* LWIP_DHCP */
#if LWIP_AUTOIP
if (netif->autoip) {
autoip_network_changed(netif);
}
#endif /* LWIP_AUTOIP */
if (netif->flags & NETIF_FLAG_UP) {
#if LWIP_ARP
/* For Ethernet network interfaces, we would like to send a "gratuitous ARP" */
if (netif->flags & NETIF_FLAG_ETHARP) {
etharp_gratuitous(netif);
}
#endif /* LWIP_ARP */
#if LWIP_IGMP
/* resend IGMP memberships */
if (netif->flags & NETIF_FLAG_IGMP) {
igmp_report_groups( netif);
}
#endif /* LWIP_IGMP */
}
NETIF_LINK_CALLBACK(netif);
}
/**
* Called by a driver when its link goes down
*/
void netif_set_link_down(struct netif *netif )
{
netif->flags &= ~NETIF_FLAG_LINK_UP;
NETIF_LINK_CALLBACK(netif);
}
/**
* Ask if a link is up
*/
u8_t netif_is_link_up(struct netif *netif)
{
return (netif->flags & NETIF_FLAG_LINK_UP) ? 1 : 0;
}
/**
* Set callback to be called when link is brought up/down
*/
void netif_set_link_callback(struct netif *netif, void (* link_callback)(struct netif *netif ))
{
if (netif) {
netif->link_callback = link_callback;
}
}
#endif /* LWIP_NETIF_LINK_CALLBACK */
#if ENABLE_LOOPBACK
/**
* Send an IP packet to be received on the same netif (loopif-like).
* The pbuf is simply copied and handed back to netif->input.
* In multithreaded mode, this is done directly since netif->input must put
* the packet on a queue.
* In callback mode, the packet is put on an internal queue and is fed to
* netif->input by netif_poll().
*
* @param netif the lwip network interface structure
* @param p the (IP) packet to 'send'
* @param ipaddr the ip address to send the packet to (not used)
* @return ERR_OK if the packet has been sent
* ERR_MEM if the pbuf used to copy the packet couldn't be allocated
*/
err_t
netif_loop_output(struct netif *netif, struct pbuf *p,
struct ip_addr *ipaddr)
{
struct pbuf *r;
err_t err;
struct pbuf *last;
#if LWIP_LOOPBACK_MAX_PBUFS
u8_t clen = 0;
#endif /* LWIP_LOOPBACK_MAX_PBUFS */
SYS_ARCH_DECL_PROTECT(lev);
LWIP_UNUSED_ARG(ipaddr);
/* Allocate a new pbuf */
r = pbuf_alloc(PBUF_LINK, p->tot_len, PBUF_RAM);
if (r == NULL) {
return ERR_MEM;
}
#if LWIP_LOOPBACK_MAX_PBUFS
clen = pbuf_clen(r);
/* check for overflow or too many pbuf on queue */
if(((netif->loop_cnt_current + clen) < netif->loop_cnt_current) ||
((netif->loop_cnt_current + clen) > LWIP_LOOPBACK_MAX_PBUFS)) {
pbuf_free(r);
r = NULL;
return ERR_MEM;
}
netif->loop_cnt_current += clen;
#endif /* LWIP_LOOPBACK_MAX_PBUFS */
/* Copy the whole pbuf queue p into the single pbuf r */
if ((err = pbuf_copy(r, p)) != ERR_OK) {
pbuf_free(r);
r = NULL;
return err;
}
/* Put the packet on a linked list which gets emptied through calling
netif_poll(). */
/* let last point to the last pbuf in chain r */
for (last = r; last->next != NULL; last = last->next);
SYS_ARCH_PROTECT(lev);
if(netif->loop_first != NULL) {
LWIP_ASSERT("if first != NULL, last must also be != NULL", netif->loop_last != NULL);
netif->loop_last->next = r;
netif->loop_last = last;
} else {
netif->loop_first = r;
netif->loop_last = last;
}
SYS_ARCH_UNPROTECT(lev);
#if LWIP_NETIF_LOOPBACK_MULTITHREADING
/* For multithreading environment, schedule a call to netif_poll */
tcpip_callback((void (*)(void *))(netif_poll), netif);
#endif /* LWIP_NETIF_LOOPBACK_MULTITHREADING */
return ERR_OK;
}
/**
* Call netif_poll() in the main loop of your application. This is to prevent
* reentering non-reentrant functions like tcp_input(). Packets passed to
* netif_loop_output() are put on a list that is passed to netif->input() by
* netif_poll().
*/
void
netif_poll(struct netif *netif)
{
struct pbuf *in;
SYS_ARCH_DECL_PROTECT(lev);
do {
/* Get a packet from the list. With SYS_LIGHTWEIGHT_PROT=1, this is protected */
SYS_ARCH_PROTECT(lev);
in = netif->loop_first;
if(in != NULL) {
struct pbuf *in_end = in;
#if LWIP_LOOPBACK_MAX_PBUFS
u8_t clen = pbuf_clen(in);
/* adjust the number of pbufs on queue */
LWIP_ASSERT("netif->loop_cnt_current underflow",
((netif->loop_cnt_current - clen) < netif->loop_cnt_current));
netif->loop_cnt_current -= clen;
#endif /* LWIP_LOOPBACK_MAX_PBUFS */
while(in_end->len != in_end->tot_len) {
LWIP_ASSERT("bogus pbuf: len != tot_len but next == NULL!", in_end->next != NULL);
in_end = in_end->next;
}
/* 'in_end' now points to the last pbuf from 'in' */
if(in_end == netif->loop_last) {
/* this was the last pbuf in the list */
netif->loop_first = netif->loop_last = NULL;
} else {
/* pop the pbuf off the list */
netif->loop_first = in_end->next;
LWIP_ASSERT("should not be null since first != last!", netif->loop_first != NULL);
}
/* De-queue the pbuf from its successors on the 'loop_' list. */
in_end->next = NULL;
}
SYS_ARCH_UNPROTECT(lev);
if(in != NULL) {
/* loopback packets are always IP packets! */
if(ip_input(in, netif) != ERR_OK) {
pbuf_free(in);
}
/* Don't reference the packet any more! */
in = NULL;
}
/* go on while there is a packet on the list */
} while(netif->loop_first != NULL);
}
#if !LWIP_NETIF_LOOPBACK_MULTITHREADING
/**
* Calls netif_poll() for every netif on the netif_list.
*/
void
netif_poll_all(void)
{
struct netif *netif = netif_list;
/* loop through netifs */
while (netif != NULL) {
netif_poll(netif);
/* proceed to next network interface */
netif = netif->next;
}
}
#endif /* !LWIP_NETIF_LOOPBACK_MULTITHREADING */
#endif /* ENABLE_LOOPBACK */

931
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* Packet buffer management
*
* Packets are built from the pbuf data structure. It supports dynamic
* memory allocation for packet contents or can reference externally
* managed packet contents both in RAM and ROM. Quick allocation for
* incoming packets is provided through pools with fixed sized pbufs.
*
* A packet may span over multiple pbufs, chained as a singly linked
* list. This is called a "pbuf chain".
*
* Multiple packets may be queued, also using this singly linked list.
* This is called a "packet queue".
*
* So, a packet queue consists of one or more pbuf chains, each of
* which consist of one or more pbufs. CURRENTLY, PACKET QUEUES ARE
* NOT SUPPORTED!!! Use helper structs to queue multiple packets.
*
* The differences between a pbuf chain and a packet queue are very
* precise but subtle.
*
* The last pbuf of a packet has a ->tot_len field that equals the
* ->len field. It can be found by traversing the list. If the last
* pbuf of a packet has a ->next field other than NULL, more packets
* are on the queue.
*
* Therefore, looping through a pbuf of a single packet, has an
* loop end condition (tot_len == p->len), NOT (next == NULL).
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#include "lwip/stats.h"
#include "lwip/def.h"
#include "lwip/mem.h"
#include "lwip/memp.h"
#include "lwip/pbuf.h"
#include "lwip/sys.h"
#include "arch/perf.h"
#if TCP_QUEUE_OOSEQ
#include "lwip/tcp.h"
#endif
#include <string.h>
#define SIZEOF_STRUCT_PBUF LWIP_MEM_ALIGN_SIZE(sizeof(struct pbuf))
/* Since the pool is created in memp, PBUF_POOL_BUFSIZE will be automatically
aligned there. Therefore, PBUF_POOL_BUFSIZE_ALIGNED can be used here. */
#define PBUF_POOL_BUFSIZE_ALIGNED LWIP_MEM_ALIGN_SIZE(PBUF_POOL_BUFSIZE)
#if !TCP_QUEUE_OOSEQ || NO_SYS
#define PBUF_POOL_IS_EMPTY()
#else /* !TCP_QUEUE_OOSEQ || NO_SYS */
/** Define this to 0 to prevent freeing ooseq pbufs when the PBUF_POOL is empty */
#ifndef PBUF_POOL_FREE_OOSEQ
#define PBUF_POOL_FREE_OOSEQ 1
#endif /* PBUF_POOL_FREE_OOSEQ */
#if PBUF_POOL_FREE_OOSEQ
#include "lwip/tcpip.h"
#define PBUF_POOL_IS_EMPTY() pbuf_pool_is_empty()
static u8_t pbuf_free_ooseq_queued;
/**
* Attempt to reclaim some memory from queued out-of-sequence TCP segments
* if we run out of pool pbufs. It's better to give priority to new packets
* if we're running out.
*
* This must be done in the correct thread context therefore this function
* can only be used with NO_SYS=0 and through tcpip_callback.
*/
static void
pbuf_free_ooseq(void* arg)
{
struct tcp_pcb* pcb;
SYS_ARCH_DECL_PROTECT(old_level);
LWIP_UNUSED_ARG(arg);
SYS_ARCH_PROTECT(old_level);
pbuf_free_ooseq_queued = 0;
SYS_ARCH_UNPROTECT(old_level);
for (pcb = tcp_active_pcbs; NULL != pcb; pcb = pcb->next) {
if (NULL != pcb->ooseq) {
/** Free the ooseq pbufs of one PCB only */
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free_ooseq: freeing out-of-sequence pbufs\n"));
tcp_segs_free(pcb->ooseq);
pcb->ooseq = NULL;
return;
}
}
}
/** Queue a call to pbuf_free_ooseq if not already queued. */
static void
pbuf_pool_is_empty(void)
{
u8_t queued;
SYS_ARCH_DECL_PROTECT(old_level);
SYS_ARCH_PROTECT(old_level);
queued = pbuf_free_ooseq_queued;
pbuf_free_ooseq_queued = 1;
SYS_ARCH_UNPROTECT(old_level);
if(!queued) {
/* queue a call to pbuf_free_ooseq if not already queued */
if(tcpip_callback_with_block(pbuf_free_ooseq, NULL, 0) != ERR_OK) {
SYS_ARCH_PROTECT(old_level);
pbuf_free_ooseq_queued = 0;
SYS_ARCH_UNPROTECT(old_level);
}
}
}
#endif /* PBUF_POOL_FREE_OOSEQ */
#endif /* !TCP_QUEUE_OOSEQ || NO_SYS */
/**
* Allocates a pbuf of the given type (possibly a chain for PBUF_POOL type).
*
* The actual memory allocated for the pbuf is determined by the
* layer at which the pbuf is allocated and the requested size
* (from the size parameter).
*
* @param layer flag to define header size
* @param length size of the pbuf's payload
* @param type this parameter decides how and where the pbuf
* should be allocated as follows:
*
* - PBUF_RAM: buffer memory for pbuf is allocated as one large
* chunk. This includes protocol headers as well.
* - PBUF_ROM: no buffer memory is allocated for the pbuf, even for
* protocol headers. Additional headers must be prepended
* by allocating another pbuf and chain in to the front of
* the ROM pbuf. It is assumed that the memory used is really
* similar to ROM in that it is immutable and will not be
* changed. Memory which is dynamic should generally not
* be attached to PBUF_ROM pbufs. Use PBUF_REF instead.
* - PBUF_REF: no buffer memory is allocated for the pbuf, even for
* protocol headers. It is assumed that the pbuf is only
* being used in a single thread. If the pbuf gets queued,
* then pbuf_take should be called to copy the buffer.
* - PBUF_POOL: the pbuf is allocated as a pbuf chain, with pbufs from
* the pbuf pool that is allocated during pbuf_init().
*
* @return the allocated pbuf. If multiple pbufs where allocated, this
* is the first pbuf of a pbuf chain.
*/
struct pbuf *
pbuf_alloc(pbuf_layer layer, u16_t length, pbuf_type type)
{
struct pbuf *p, *q, *r;
u16_t offset;
s32_t rem_len; /* remaining length */
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F")\n", length));
/* determine header offset */
offset = 0;
switch (layer) {
case PBUF_TRANSPORT:
/* add room for transport (often TCP) layer header */
offset += PBUF_TRANSPORT_HLEN;
/* FALLTHROUGH */
case PBUF_IP:
/* add room for IP layer header */
offset += PBUF_IP_HLEN;
/* FALLTHROUGH */
case PBUF_LINK:
/* add room for link layer header */
offset += PBUF_LINK_HLEN;
break;
case PBUF_RAW:
break;
default:
LWIP_ASSERT("pbuf_alloc: bad pbuf layer", 0);
return NULL;
}
switch (type) {
case PBUF_POOL:
/* allocate head of pbuf chain into p */
p = memp_malloc(MEMP_PBUF_POOL);
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc: allocated pbuf %p\n", (void *)p));
if (p == NULL) {
PBUF_POOL_IS_EMPTY();
return NULL;
}
p->type = type;
p->next = NULL;
/* make the payload pointer point 'offset' bytes into pbuf data memory */
p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)p + (SIZEOF_STRUCT_PBUF + offset)));
LWIP_ASSERT("pbuf_alloc: pbuf p->payload properly aligned",
((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
/* the total length of the pbuf chain is the requested size */
p->tot_len = length;
/* set the length of the first pbuf in the chain */
p->len = LWIP_MIN(length, PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset));
LWIP_ASSERT("check p->payload + p->len does not overflow pbuf",
((u8_t*)p->payload + p->len <=
(u8_t*)p + SIZEOF_STRUCT_PBUF + PBUF_POOL_BUFSIZE_ALIGNED));
LWIP_ASSERT("PBUF_POOL_BUFSIZE must be bigger than MEM_ALIGNMENT",
(PBUF_POOL_BUFSIZE_ALIGNED - LWIP_MEM_ALIGN_SIZE(offset)) > 0 );
/* set reference count (needed here in case we fail) */
p->ref = 1;
/* now allocate the tail of the pbuf chain */
/* remember first pbuf for linkage in next iteration */
r = p;
/* remaining length to be allocated */
rem_len = length - p->len;
/* any remaining pbufs to be allocated? */
while (rem_len > 0) {
q = memp_malloc(MEMP_PBUF_POOL);
if (q == NULL) {
PBUF_POOL_IS_EMPTY();
/* free chain so far allocated */
pbuf_free(p);
/* bail out unsuccesfully */
return NULL;
}
q->type = type;
q->flags = 0;
q->next = NULL;
/* make previous pbuf point to this pbuf */
r->next = q;
/* set total length of this pbuf and next in chain */
LWIP_ASSERT("rem_len < max_u16_t", rem_len < 0xffff);
q->tot_len = (u16_t)rem_len;
/* this pbuf length is pool size, unless smaller sized tail */
q->len = LWIP_MIN((u16_t)rem_len, PBUF_POOL_BUFSIZE_ALIGNED);
q->payload = (void *)((u8_t *)q + SIZEOF_STRUCT_PBUF);
LWIP_ASSERT("pbuf_alloc: pbuf q->payload properly aligned",
((mem_ptr_t)q->payload % MEM_ALIGNMENT) == 0);
LWIP_ASSERT("check p->payload + p->len does not overflow pbuf",
((u8_t*)p->payload + p->len <=
(u8_t*)p + SIZEOF_STRUCT_PBUF + PBUF_POOL_BUFSIZE_ALIGNED));
q->ref = 1;
/* calculate remaining length to be allocated */
rem_len -= q->len;
/* remember this pbuf for linkage in next iteration */
r = q;
}
/* end of chain */
/*r->next = NULL;*/
break;
case PBUF_RAM:
/* If pbuf is to be allocated in RAM, allocate memory for it. */
p = (struct pbuf*)mem_malloc(LWIP_MEM_ALIGN_SIZE(SIZEOF_STRUCT_PBUF + offset) + LWIP_MEM_ALIGN_SIZE(length));
if (p == NULL) {
return NULL;
}
/* Set up internal structure of the pbuf. */
p->payload = LWIP_MEM_ALIGN((void *)((u8_t *)p + SIZEOF_STRUCT_PBUF + offset));
p->len = p->tot_len = length;
p->next = NULL;
p->type = type;
LWIP_ASSERT("pbuf_alloc: pbuf->payload properly aligned",
((mem_ptr_t)p->payload % MEM_ALIGNMENT) == 0);
break;
/* pbuf references existing (non-volatile static constant) ROM payload? */
case PBUF_ROM:
/* pbuf references existing (externally allocated) RAM payload? */
case PBUF_REF:
/* only allocate memory for the pbuf structure */
p = memp_malloc(MEMP_PBUF);
if (p == NULL) {
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("pbuf_alloc: Could not allocate MEMP_PBUF for PBUF_%s.\n",
(type == PBUF_ROM) ? "ROM" : "REF"));
return NULL;
}
/* caller must set this field properly, afterwards */
p->payload = NULL;
p->len = p->tot_len = length;
p->next = NULL;
p->type = type;
break;
default:
LWIP_ASSERT("pbuf_alloc: erroneous type", 0);
return NULL;
}
/* set reference count */
p->ref = 1;
/* set flags */
p->flags = 0;
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_alloc(length=%"U16_F") == %p\n", length, (void *)p));
return p;
}
/**
* Shrink a pbuf chain to a desired length.
*
* @param p pbuf to shrink.
* @param new_len desired new length of pbuf chain
*
* Depending on the desired length, the first few pbufs in a chain might
* be skipped and left unchanged. The new last pbuf in the chain will be
* resized, and any remaining pbufs will be freed.
*
* @note If the pbuf is ROM/REF, only the ->tot_len and ->len fields are adjusted.
* @note May not be called on a packet queue.
*
* @note Despite its name, pbuf_realloc cannot grow the size of a pbuf (chain).
*/
void
pbuf_realloc(struct pbuf *p, u16_t new_len)
{
struct pbuf *q;
u16_t rem_len; /* remaining length */
s32_t grow;
LWIP_ASSERT("pbuf_realloc: p != NULL", p != NULL);
LWIP_ASSERT("pbuf_realloc: sane p->type", p->type == PBUF_POOL ||
p->type == PBUF_ROM ||
p->type == PBUF_RAM ||
p->type == PBUF_REF);
/* desired length larger than current length? */
if (new_len >= p->tot_len) {
/* enlarging not yet supported */
return;
}
/* the pbuf chain grows by (new_len - p->tot_len) bytes
* (which may be negative in case of shrinking) */
grow = new_len - p->tot_len;
/* first, step over any pbufs that should remain in the chain */
rem_len = new_len;
q = p;
/* should this pbuf be kept? */
while (rem_len > q->len) {
/* decrease remaining length by pbuf length */
rem_len -= q->len;
/* decrease total length indicator */
LWIP_ASSERT("grow < max_u16_t", grow < 0xffff);
q->tot_len += (u16_t)grow;
/* proceed to next pbuf in chain */
q = q->next;
LWIP_ASSERT("pbuf_realloc: q != NULL", q != NULL);
}
/* we have now reached the new last pbuf (in q) */
/* rem_len == desired length for pbuf q */
/* shrink allocated memory for PBUF_RAM */
/* (other types merely adjust their length fields */
if ((q->type == PBUF_RAM) && (rem_len != q->len)) {
/* reallocate and adjust the length of the pbuf that will be split */
q = mem_realloc(q, (u8_t *)q->payload - (u8_t *)q + rem_len);
LWIP_ASSERT("mem_realloc give q == NULL", q != NULL);
}
/* adjust length fields for new last pbuf */
q->len = rem_len;
q->tot_len = q->len;
/* any remaining pbufs in chain? */
if (q->next != NULL) {
/* free remaining pbufs in chain */
pbuf_free(q->next);
}
/* q is last packet in chain */
q->next = NULL;
}
/**
* Adjusts the payload pointer to hide or reveal headers in the payload.
*
* Adjusts the ->payload pointer so that space for a header
* (dis)appears in the pbuf payload.
*
* The ->payload, ->tot_len and ->len fields are adjusted.
*
* @param p pbuf to change the header size.
* @param header_size_increment Number of bytes to increment header size which
* increases the size of the pbuf. New space is on the front.
* (Using a negative value decreases the header size.)
* If hdr_size_inc is 0, this function does nothing and returns succesful.
*
* PBUF_ROM and PBUF_REF type buffers cannot have their sizes increased, so
* the call will fail. A check is made that the increase in header size does
* not move the payload pointer in front of the start of the buffer.
* @return non-zero on failure, zero on success.
*
*/
u8_t
pbuf_header(struct pbuf *p, s16_t header_size_increment)
{
u16_t type;
void *payload;
u16_t increment_magnitude;
LWIP_ASSERT("p != NULL", p != NULL);
if ((header_size_increment == 0) || (p == NULL))
return 0;
if (header_size_increment < 0){
increment_magnitude = -header_size_increment;
/* Check that we aren't going to move off the end of the pbuf */
LWIP_ERROR("increment_magnitude <= p->len", (increment_magnitude <= p->len), return 1;);
} else {
increment_magnitude = header_size_increment;
#if 0
/* Can't assert these as some callers speculatively call
pbuf_header() to see if it's OK. Will return 1 below instead. */
/* Check that we've got the correct type of pbuf to work with */
LWIP_ASSERT("p->type == PBUF_RAM || p->type == PBUF_POOL",
p->type == PBUF_RAM || p->type == PBUF_POOL);
/* Check that we aren't going to move off the beginning of the pbuf */
LWIP_ASSERT("p->payload - increment_magnitude >= p + SIZEOF_STRUCT_PBUF",
(u8_t *)p->payload - increment_magnitude >= (u8_t *)p + SIZEOF_STRUCT_PBUF);
#endif
}
type = p->type;
/* remember current payload pointer */
payload = p->payload;
/* pbuf types containing payloads? */
if (type == PBUF_RAM || type == PBUF_POOL) {
/* set new payload pointer */
p->payload = (u8_t *)p->payload - header_size_increment;
/* boundary check fails? */
if ((u8_t *)p->payload < (u8_t *)p + SIZEOF_STRUCT_PBUF) {
LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("pbuf_header: failed as %p < %p (not enough space for new header size)\n",
(void *)p->payload, (void *)(p + 1)));
/* restore old payload pointer */
p->payload = payload;
/* bail out unsuccesfully */
return 1;
}
/* pbuf types refering to external payloads? */
} else if (type == PBUF_REF || type == PBUF_ROM) {
/* hide a header in the payload? */
if ((header_size_increment < 0) && (increment_magnitude <= p->len)) {
/* increase payload pointer */
p->payload = (u8_t *)p->payload - header_size_increment;
} else {
/* cannot expand payload to front (yet!)
* bail out unsuccesfully */
return 1;
}
}
else {
/* Unknown type */
LWIP_ASSERT("bad pbuf type", 0);
return 1;
}
/* modify pbuf length fields */
p->len += header_size_increment;
p->tot_len += header_size_increment;
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_header: old %p new %p (%"S16_F")\n",
(void *)payload, (void *)p->payload, header_size_increment));
return 0;
}
/**
* Dereference a pbuf chain or queue and deallocate any no-longer-used
* pbufs at the head of this chain or queue.
*
* Decrements the pbuf reference count. If it reaches zero, the pbuf is
* deallocated.
*
* For a pbuf chain, this is repeated for each pbuf in the chain,
* up to the first pbuf which has a non-zero reference count after
* decrementing. So, when all reference counts are one, the whole
* chain is free'd.
*
* @param p The pbuf (chain) to be dereferenced.
*
* @return the number of pbufs that were de-allocated
* from the head of the chain.
*
* @note MUST NOT be called on a packet queue (Not verified to work yet).
* @note the reference counter of a pbuf equals the number of pointers
* that refer to the pbuf (or into the pbuf).
*
* @internal examples:
*
* Assuming existing chains a->b->c with the following reference
* counts, calling pbuf_free(a) results in:
*
* 1->2->3 becomes ...1->3
* 3->3->3 becomes 2->3->3
* 1->1->2 becomes ......1
* 2->1->1 becomes 1->1->1
* 1->1->1 becomes .......
*
*/
u8_t
pbuf_free(struct pbuf *p)
{
u16_t type;
struct pbuf *q;
u8_t count;
if (p == NULL) {
LWIP_ASSERT("p != NULL", p != NULL);
/* if assertions are disabled, proceed with debug output */
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("pbuf_free(p == NULL) was called.\n"));
return 0;
}
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free(%p)\n", (void *)p));
PERF_START;
LWIP_ASSERT("pbuf_free: sane type",
p->type == PBUF_RAM || p->type == PBUF_ROM ||
p->type == PBUF_REF || p->type == PBUF_POOL);
count = 0;
/* de-allocate all consecutive pbufs from the head of the chain that
* obtain a zero reference count after decrementing*/
while (p != NULL) {
u16_t ref;
SYS_ARCH_DECL_PROTECT(old_level);
/* Since decrementing ref cannot be guaranteed to be a single machine operation
* we must protect it. We put the new ref into a local variable to prevent
* further protection. */
SYS_ARCH_PROTECT(old_level);
/* all pbufs in a chain are referenced at least once */
LWIP_ASSERT("pbuf_free: p->ref > 0", p->ref > 0);
/* decrease reference count (number of pointers to pbuf) */
ref = --(p->ref);
SYS_ARCH_UNPROTECT(old_level);
/* this pbuf is no longer referenced to? */
if (ref == 0) {
/* remember next pbuf in chain for next iteration */
q = p->next;
LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: deallocating %p\n", (void *)p));
type = p->type;
/* is this a pbuf from the pool? */
if (type == PBUF_POOL) {
memp_free(MEMP_PBUF_POOL, p);
/* is this a ROM or RAM referencing pbuf? */
} else if (type == PBUF_ROM || type == PBUF_REF) {
memp_free(MEMP_PBUF, p);
/* type == PBUF_RAM */
} else {
mem_free(p);
}
count++;
/* proceed to next pbuf */
p = q;
/* p->ref > 0, this pbuf is still referenced to */
/* (and so the remaining pbufs in chain as well) */
} else {
LWIP_DEBUGF( PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_free: %p has ref %"U16_F", ending here.\n", (void *)p, ref));
/* stop walking through the chain */
p = NULL;
}
}
PERF_STOP("pbuf_free");
/* return number of de-allocated pbufs */
return count;
}
/**
* Count number of pbufs in a chain
*
* @param p first pbuf of chain
* @return the number of pbufs in a chain
*/
u8_t
pbuf_clen(struct pbuf *p)
{
u8_t len;
len = 0;
while (p != NULL) {
++len;
p = p->next;
}
return len;
}
/**
* Increment the reference count of the pbuf.
*
* @param p pbuf to increase reference counter of
*
*/
void
pbuf_ref(struct pbuf *p)
{
SYS_ARCH_DECL_PROTECT(old_level);
/* pbuf given? */
if (p != NULL) {
SYS_ARCH_PROTECT(old_level);
++(p->ref);
SYS_ARCH_UNPROTECT(old_level);
}
}
/**
* Concatenate two pbufs (each may be a pbuf chain) and take over
* the caller's reference of the tail pbuf.
*
* @note The caller MAY NOT reference the tail pbuf afterwards.
* Use pbuf_chain() for that purpose.
*
* @see pbuf_chain()
*/
void
pbuf_cat(struct pbuf *h, struct pbuf *t)
{
struct pbuf *p;
LWIP_ERROR("(h != NULL) && (t != NULL) (programmer violates API)",
((h != NULL) && (t != NULL)), return;);
/* proceed to last pbuf of chain */
for (p = h; p->next != NULL; p = p->next) {
/* add total length of second chain to all totals of first chain */
p->tot_len += t->tot_len;
}
/* { p is last pbuf of first h chain, p->next == NULL } */
LWIP_ASSERT("p->tot_len == p->len (of last pbuf in chain)", p->tot_len == p->len);
LWIP_ASSERT("p->next == NULL", p->next == NULL);
/* add total length of second chain to last pbuf total of first chain */
p->tot_len += t->tot_len;
/* chain last pbuf of head (p) with first of tail (t) */
p->next = t;
/* p->next now references t, but the caller will drop its reference to t,
* so netto there is no change to the reference count of t.
*/
}
/**
* Chain two pbufs (or pbuf chains) together.
*
* The caller MUST call pbuf_free(t) once it has stopped
* using it. Use pbuf_cat() instead if you no longer use t.
*
* @param h head pbuf (chain)
* @param t tail pbuf (chain)
* @note The pbufs MUST belong to the same packet.
* @note MAY NOT be called on a packet queue.
*
* The ->tot_len fields of all pbufs of the head chain are adjusted.
* The ->next field of the last pbuf of the head chain is adjusted.
* The ->ref field of the first pbuf of the tail chain is adjusted.
*
*/
void
pbuf_chain(struct pbuf *h, struct pbuf *t)
{
pbuf_cat(h, t);
/* t is now referenced by h */
pbuf_ref(t);
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_chain: %p references %p\n", (void *)h, (void *)t));
}
/**
* Dechains the first pbuf from its succeeding pbufs in the chain.
*
* Makes p->tot_len field equal to p->len.
* @param p pbuf to dechain
* @return remainder of the pbuf chain, or NULL if it was de-allocated.
* @note May not be called on a packet queue.
*/
struct pbuf *
pbuf_dechain(struct pbuf *p)
{
struct pbuf *q;
u8_t tail_gone = 1;
/* tail */
q = p->next;
/* pbuf has successor in chain? */
if (q != NULL) {
/* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */
LWIP_ASSERT("p->tot_len == p->len + q->tot_len", q->tot_len == p->tot_len - p->len);
/* enforce invariant if assertion is disabled */
q->tot_len = p->tot_len - p->len;
/* decouple pbuf from remainder */
p->next = NULL;
/* total length of pbuf p is its own length only */
p->tot_len = p->len;
/* q is no longer referenced by p, free it */
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_dechain: unreferencing %p\n", (void *)q));
tail_gone = pbuf_free(q);
if (tail_gone > 0) {
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE,
("pbuf_dechain: deallocated %p (as it is no longer referenced)\n", (void *)q));
}
/* return remaining tail or NULL if deallocated */
}
/* assert tot_len invariant: (p->tot_len == p->len + (p->next? p->next->tot_len: 0) */
LWIP_ASSERT("p->tot_len == p->len", p->tot_len == p->len);
return ((tail_gone > 0) ? NULL : q);
}
/**
*
* Create PBUF_RAM copies of pbufs.
*
* Used to queue packets on behalf of the lwIP stack, such as
* ARP based queueing.
*
* @note You MUST explicitly use p = pbuf_take(p);
*
* @note Only one packet is copied, no packet queue!
*
* @param p_to pbuf destination of the copy
* @param p_from pbuf source of the copy
*
* @return ERR_OK if pbuf was copied
* ERR_ARG if one of the pbufs is NULL or p_to is not big
* enough to hold p_from
*/
err_t
pbuf_copy(struct pbuf *p_to, struct pbuf *p_from)
{
u16_t offset_to=0, offset_from=0, len;
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy(%p, %p)\n",
(void*)p_to, (void*)p_from));
/* is the target big enough to hold the source? */
LWIP_ERROR("pbuf_copy: target not big enough to hold source", ((p_to != NULL) &&
(p_from != NULL) && (p_to->tot_len >= p_from->tot_len)), return ERR_ARG;);
/* iterate through pbuf chain */
do
{
LWIP_ASSERT("p_to != NULL", p_to != NULL);
/* copy one part of the original chain */
if ((p_to->len - offset_to) >= (p_from->len - offset_from)) {
/* complete current p_from fits into current p_to */
len = p_from->len - offset_from;
} else {
/* current p_from does not fit into current p_to */
len = p_to->len - offset_to;
}
MEMCPY((u8_t*)p_to->payload + offset_to, (u8_t*)p_from->payload + offset_from, len);
offset_to += len;
offset_from += len;
LWIP_ASSERT("offset_to <= p_to->len", offset_to <= p_to->len);
if (offset_to == p_to->len) {
/* on to next p_to (if any) */
offset_to = 0;
p_to = p_to->next;
}
LWIP_ASSERT("offset_from <= p_from->len", offset_from <= p_from->len);
if (offset_from >= p_from->len) {
/* on to next p_from (if any) */
offset_from = 0;
p_from = p_from->next;
}
if((p_from != NULL) && (p_from->len == p_from->tot_len)) {
/* don't copy more than one packet! */
LWIP_ERROR("pbuf_copy() does not allow packet queues!\n",
(p_from->next == NULL), return ERR_VAL;);
}
if((p_to != NULL) && (p_to->len == p_to->tot_len)) {
/* don't copy more than one packet! */
LWIP_ERROR("pbuf_copy() does not allow packet queues!\n",
(p_to->next == NULL), return ERR_VAL;);
}
} while (p_from);
LWIP_DEBUGF(PBUF_DEBUG | LWIP_DBG_TRACE, ("pbuf_copy: end of chain reached.\n"));
return ERR_OK;
}
/**
* Copy (part of) the contents of a packet buffer
* to an application supplied buffer.
*
* @param buf the pbuf from which to copy data
* @param dataptr the application supplied buffer
* @param len length of data to copy (dataptr must be big enough). No more
* than buf->tot_len will be copied, irrespective of len
* @param offset offset into the packet buffer from where to begin copying len bytes
* @return the number of bytes copied, or 0 on failure
*/
u16_t
pbuf_copy_partial(struct pbuf *buf, void *dataptr, u16_t len, u16_t offset)
{
struct pbuf *p;
u16_t left;
u16_t buf_copy_len;
u16_t copied_total = 0;
LWIP_ERROR("pbuf_copy_partial: invalid buf", (buf != NULL), return 0;);
LWIP_ERROR("pbuf_copy_partial: invalid dataptr", (dataptr != NULL), return 0;);
left = 0;
if((buf == NULL) || (dataptr == NULL)) {
return 0;
}
/* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
for(p = buf; len != 0 && p != NULL; p = p->next) {
if ((offset != 0) && (offset >= p->len)) {
/* don't copy from this buffer -> on to the next */
offset -= p->len;
} else {
/* copy from this buffer. maybe only partially. */
buf_copy_len = p->len - offset;
if (buf_copy_len > len)
buf_copy_len = len;
/* copy the necessary parts of the buffer */
MEMCPY(&((char*)dataptr)[left], &((char*)p->payload)[offset], buf_copy_len);
copied_total += buf_copy_len;
left += buf_copy_len;
len -= buf_copy_len;
offset = 0;
}
}
return copied_total;
}
/**
* Copy application supplied data into a pbuf.
* This function can only be used to copy the equivalent of buf->tot_len data.
*
* @param buf pbuf to fill with data
* @param dataptr application supplied data buffer
* @param len length of the application supplied data buffer
*
* @return ERR_OK if successful, ERR_MEM if the pbuf is not big enough
*/
err_t
pbuf_take(struct pbuf *buf, const void *dataptr, u16_t len)
{
struct pbuf *p;
u16_t buf_copy_len;
u16_t total_copy_len = len;
u16_t copied_total = 0;
LWIP_ERROR("pbuf_take: invalid buf", (buf != NULL), return 0;);
LWIP_ERROR("pbuf_take: invalid dataptr", (dataptr != NULL), return 0;);
if ((buf == NULL) || (dataptr == NULL) || (buf->tot_len < len)) {
return ERR_ARG;
}
/* Note some systems use byte copy if dataptr or one of the pbuf payload pointers are unaligned. */
for(p = buf; total_copy_len != 0; p = p->next) {
LWIP_ASSERT("pbuf_take: invalid pbuf", p != NULL);
buf_copy_len = total_copy_len;
if (buf_copy_len > p->len) {
/* this pbuf cannot hold all remaining data */
buf_copy_len = p->len;
}
/* copy the necessary parts of the buffer */
MEMCPY(p->payload, &((char*)dataptr)[copied_total], buf_copy_len);
total_copy_len -= buf_copy_len;
copied_total += buf_copy_len;
}
LWIP_ASSERT("did not copy all data", total_copy_len == 0 && copied_total == len);
return ERR_OK;
}
/**
* Creates a single pbuf out of a queue of pbufs.
*
* @remark: The source pbuf 'p' is not freed by this function because that can
* be illegal in some places!
*
* @param p the source pbuf
* @param layer pbuf_layer of the new pbuf
*
* @return a new, single pbuf (p->next is NULL)
* or the old pbuf if allocation fails
*/
struct pbuf*
pbuf_coalesce(struct pbuf *p, pbuf_layer layer)
{
struct pbuf *q;
err_t err;
if (p->next == NULL) {
return p;
}
q = pbuf_alloc(layer, p->tot_len, PBUF_RAM);
if (q == NULL) {
/* @todo: what do we do now? */
return p;
}
err = pbuf_copy(q, p);
LWIP_ASSERT("pbuf_copy failed", err == ERR_OK);
pbuf_free(p);
return q;
}

355
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/raw.c Normal file
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* Implementation of raw protocol PCBs for low-level handling of
* different types of protocols besides (or overriding) those
* already available in lwIP.
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#if LWIP_RAW /* don't build if not configured for use in lwipopts.h */
#include "lwip/def.h"
#include "lwip/memp.h"
#include "lwip/inet.h"
#include "lwip/ip_addr.h"
#include "lwip/netif.h"
#include "lwip/raw.h"
#include "lwip/stats.h"
#include "lwip/snmp.h"
#include "arch/perf.h"
#include <string.h>
/** The list of RAW PCBs */
static struct raw_pcb *raw_pcbs;
/**
* Determine if in incoming IP packet is covered by a RAW PCB
* and if so, pass it to a user-provided receive callback function.
*
* Given an incoming IP datagram (as a chain of pbufs) this function
* finds a corresponding RAW PCB and calls the corresponding receive
* callback function.
*
* @param p pbuf to be demultiplexed to a RAW PCB.
* @param inp network interface on which the datagram was received.
* @return - 1 if the packet has been eaten by a RAW PCB receive
* callback function. The caller MAY NOT not reference the
* packet any longer, and MAY NOT call pbuf_free().
* @return - 0 if packet is not eaten (pbuf is still referenced by the
* caller).
*
*/
u8_t
raw_input(struct pbuf *p, struct netif *inp)
{
struct raw_pcb *pcb, *prev;
struct ip_hdr *iphdr;
s16_t proto;
u8_t eaten = 0;
LWIP_UNUSED_ARG(inp);
iphdr = p->payload;
proto = IPH_PROTO(iphdr);
prev = NULL;
pcb = raw_pcbs;
/* loop through all raw pcbs until the packet is eaten by one */
/* this allows multiple pcbs to match against the packet by design */
while ((eaten == 0) && (pcb != NULL)) {
if (pcb->protocol == proto) {
#if IP_SOF_BROADCAST_RECV
/* broadcast filter? */
if ((pcb->so_options & SOF_BROADCAST) || !ip_addr_isbroadcast(&(iphdr->dest), inp))
#endif /* IP_SOF_BROADCAST_RECV */
{
/* receive callback function available? */
if (pcb->recv != NULL) {
/* the receive callback function did not eat the packet? */
if (pcb->recv(pcb->recv_arg, pcb, p, &(iphdr->src)) != 0) {
/* receive function ate the packet */
p = NULL;
eaten = 1;
if (prev != NULL) {
/* move the pcb to the front of raw_pcbs so that is
found faster next time */
prev->next = pcb->next;
pcb->next = raw_pcbs;
raw_pcbs = pcb;
}
}
}
/* no receive callback function was set for this raw PCB */
}
/* drop the packet */
}
prev = pcb;
pcb = pcb->next;
}
return eaten;
}
/**
* Bind a RAW PCB.
*
* @param pcb RAW PCB to be bound with a local address ipaddr.
* @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to
* bind to all local interfaces.
*
* @return lwIP error code.
* - ERR_OK. Successful. No error occured.
* - ERR_USE. The specified IP address is already bound to by
* another RAW PCB.
*
* @see raw_disconnect()
*/
err_t
raw_bind(struct raw_pcb *pcb, struct ip_addr *ipaddr)
{
ip_addr_set(&pcb->local_ip, ipaddr);
return ERR_OK;
}
/**
* Connect an RAW PCB. This function is required by upper layers
* of lwip. Using the raw api you could use raw_sendto() instead
*
* This will associate the RAW PCB with the remote address.
*
* @param pcb RAW PCB to be connected with remote address ipaddr and port.
* @param ipaddr remote IP address to connect with.
*
* @return lwIP error code
*
* @see raw_disconnect() and raw_sendto()
*/
err_t
raw_connect(struct raw_pcb *pcb, struct ip_addr *ipaddr)
{
ip_addr_set(&pcb->remote_ip, ipaddr);
return ERR_OK;
}
/**
* Set the callback function for received packets that match the
* raw PCB's protocol and binding.
*
* The callback function MUST either
* - eat the packet by calling pbuf_free() and returning non-zero. The
* packet will not be passed to other raw PCBs or other protocol layers.
* - not free the packet, and return zero. The packet will be matched
* against further PCBs and/or forwarded to another protocol layers.
*
* @return non-zero if the packet was free()d, zero if the packet remains
* available for others.
*/
void
raw_recv(struct raw_pcb *pcb,
u8_t (* recv)(void *arg, struct raw_pcb *upcb, struct pbuf *p,
struct ip_addr *addr),
void *recv_arg)
{
/* remember recv() callback and user data */
pcb->recv = recv;
pcb->recv_arg = recv_arg;
}
/**
* Send the raw IP packet to the given address. Note that actually you cannot
* modify the IP headers (this is inconsistent with the receive callback where
* you actually get the IP headers), you can only specify the IP payload here.
* It requires some more changes in lwIP. (there will be a raw_send() function
* then.)
*
* @param pcb the raw pcb which to send
* @param p the IP payload to send
* @param ipaddr the destination address of the IP packet
*
*/
err_t
raw_sendto(struct raw_pcb *pcb, struct pbuf *p, struct ip_addr *ipaddr)
{
err_t err;
struct netif *netif;
struct ip_addr *src_ip;
struct pbuf *q; /* q will be sent down the stack */
LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE, ("raw_sendto\n"));
/* not enough space to add an IP header to first pbuf in given p chain? */
if (pbuf_header(p, IP_HLEN)) {
/* allocate header in new pbuf */
q = pbuf_alloc(PBUF_IP, 0, PBUF_RAM);
/* new header pbuf could not be allocated? */
if (q == NULL) {
LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("raw_sendto: could not allocate header\n"));
return ERR_MEM;
}
/* chain header q in front of given pbuf p */
pbuf_chain(q, p);
/* { first pbuf q points to header pbuf } */
LWIP_DEBUGF(RAW_DEBUG, ("raw_sendto: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
} else {
/* first pbuf q equals given pbuf */
q = p;
if(pbuf_header(q, -IP_HLEN)) {
LWIP_ASSERT("Can't restore header we just removed!", 0);
return ERR_MEM;
}
}
if ((netif = ip_route(ipaddr)) == NULL) {
LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_LEVEL_WARNING, ("raw_sendto: No route to 0x%"X32_F"\n", ipaddr->addr));
/* free any temporary header pbuf allocated by pbuf_header() */
if (q != p) {
pbuf_free(q);
}
return ERR_RTE;
}
#if IP_SOF_BROADCAST
/* broadcast filter? */
if ( ((pcb->so_options & SOF_BROADCAST) == 0) && ip_addr_isbroadcast(ipaddr, netif) ) {
LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_LEVEL_WARNING, ("raw_sendto: SOF_BROADCAST not enabled on pcb %p\n", (void *)pcb));
/* free any temporary header pbuf allocated by pbuf_header() */
if (q != p) {
pbuf_free(q);
}
return ERR_VAL;
}
#endif /* IP_SOF_BROADCAST */
if (ip_addr_isany(&pcb->local_ip)) {
/* use outgoing network interface IP address as source address */
src_ip = &(netif->ip_addr);
} else {
/* use RAW PCB local IP address as source address */
src_ip = &(pcb->local_ip);
}
#if LWIP_NETIF_HWADDRHINT
netif->addr_hint = &(pcb->addr_hint);
#endif /* LWIP_NETIF_HWADDRHINT*/
err = ip_output_if (q, src_ip, ipaddr, pcb->ttl, pcb->tos, pcb->protocol, netif);
#if LWIP_NETIF_HWADDRHINT
netif->addr_hint = NULL;
#endif /* LWIP_NETIF_HWADDRHINT*/
/* did we chain a header earlier? */
if (q != p) {
/* free the header */
pbuf_free(q);
}
return err;
}
/**
* Send the raw IP packet to the address given by raw_connect()
*
* @param pcb the raw pcb which to send
* @param p the IP payload to send
*
*/
err_t
raw_send(struct raw_pcb *pcb, struct pbuf *p)
{
return raw_sendto(pcb, p, &pcb->remote_ip);
}
/**
* Remove an RAW PCB.
*
* @param pcb RAW PCB to be removed. The PCB is removed from the list of
* RAW PCB's and the data structure is freed from memory.
*
* @see raw_new()
*/
void
raw_remove(struct raw_pcb *pcb)
{
struct raw_pcb *pcb2;
/* pcb to be removed is first in list? */
if (raw_pcbs == pcb) {
/* make list start at 2nd pcb */
raw_pcbs = raw_pcbs->next;
/* pcb not 1st in list */
} else {
for(pcb2 = raw_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
/* find pcb in raw_pcbs list */
if (pcb2->next != NULL && pcb2->next == pcb) {
/* remove pcb from list */
pcb2->next = pcb->next;
}
}
}
memp_free(MEMP_RAW_PCB, pcb);
}
/**
* Create a RAW PCB.
*
* @return The RAW PCB which was created. NULL if the PCB data structure
* could not be allocated.
*
* @param proto the protocol number of the IPs payload (e.g. IP_PROTO_ICMP)
*
* @see raw_remove()
*/
struct raw_pcb *
raw_new(u8_t proto) {
struct raw_pcb *pcb;
LWIP_DEBUGF(RAW_DEBUG | LWIP_DBG_TRACE, ("raw_new\n"));
pcb = memp_malloc(MEMP_RAW_PCB);
/* could allocate RAW PCB? */
if (pcb != NULL) {
/* initialize PCB to all zeroes */
memset(pcb, 0, sizeof(struct raw_pcb));
pcb->protocol = proto;
pcb->ttl = RAW_TTL;
pcb->next = raw_pcbs;
raw_pcbs = pcb;
}
return pcb;
}
#endif /* LWIP_RAW */

151
hardware/arduino/firmwares/wifishield/wifiHD/src/SOFTWARE_FRAMEWORK/SERVICES/LWIP/lwip-1.3.2/src/core/stats.c Normal file
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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* Statistics module
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#include "lwip/opt.h"
#if LWIP_STATS /* don't build if not configured for use in lwipopts.h */
#include "lwip/def.h"
#include "lwip/stats.h"
#include "lwip/mem.h"
#include <string.h>
struct stats_ lwip_stats;
#if LWIP_STATS_DISPLAY
void
stats_display_proto(struct stats_proto *proto, char *name)
{
LWIP_PLATFORM_DIAG(("\n%s\n\t", name));
LWIP_PLATFORM_DIAG(("xmit: %"STAT_COUNTER_F"\n\t", proto->xmit));
LWIP_PLATFORM_DIAG(("recv: %"STAT_COUNTER_F"\n\t", proto->recv));
LWIP_PLATFORM_DIAG(("fw: %"STAT_COUNTER_F"\n\t", proto->fw));
LWIP_PLATFORM_DIAG(("drop: %"STAT_COUNTER_F"\n\t", proto->drop));
LWIP_PLATFORM_DIAG(("chkerr: %"STAT_COUNTER_F"\n\t", proto->chkerr));
LWIP_PLATFORM_DIAG(("lenerr: %"STAT_COUNTER_F"\n\t", proto->lenerr));
LWIP_PLATFORM_DIAG(("memerr: %"STAT_COUNTER_F"\n\t", proto->memerr));
LWIP_PLATFORM_DIAG(("rterr: %"STAT_COUNTER_F"\n\t", proto->rterr));
LWIP_PLATFORM_DIAG(("proterr: %"STAT_COUNTER_F"\n\t", proto->proterr));
LWIP_PLATFORM_DIAG(("opterr: %"STAT_COUNTER_F"\n\t", proto->opterr));
LWIP_PLATFORM_DIAG(("err: %"STAT_COUNTER_F"\n\t", proto->err));
LWIP_PLATFORM_DIAG(("cachehit: %"STAT_COUNTER_F"\n", proto->cachehit));
}
#if IGMP_STATS
void
stats_display_igmp(struct stats_igmp *igmp)
{
LWIP_PLATFORM_DIAG(("\nIGMP\n\t"));
LWIP_PLATFORM_DIAG(("lenerr: %"STAT_COUNTER_F"\n\t", igmp->lenerr));
LWIP_PLATFORM_DIAG(("chkerr: %"STAT_COUNTER_F"\n\t", igmp->chkerr));
LWIP_PLATFORM_DIAG(("v1_rxed: %"STAT_COUNTER_F"\n\t", igmp->v1_rxed));
LWIP_PLATFORM_DIAG(("join_sent: %"STAT_COUNTER_F"\n\t", igmp->join_sent));
LWIP_PLATFORM_DIAG(("leave_sent: %"STAT_COUNTER_F"\n\t", igmp->leave_sent));
LWIP_PLATFORM_DIAG(("unicast_query: %"STAT_COUNTER_F"\n\t", igmp->unicast_query));
LWIP_PLATFORM_DIAG(("report_sent: %"STAT_COUNTER_F"\n\t", igmp->report_sent));
LWIP_PLATFORM_DIAG(("report_rxed: %"STAT_COUNTER_F"\n\t", igmp->report_rxed));
LWIP_PLATFORM_DIAG(("group_query_rxed: %"STAT_COUNTER_F"\n", igmp->group_query_rxed));
}
#endif /* IGMP_STATS */
#if MEM_STATS || MEMP_STATS
void
stats_display_mem(struct stats_mem *mem, char *name)
{
LWIP_PLATFORM_DIAG(("\nMEM %s\n\t", name));
LWIP_PLATFORM_DIAG(("avail: %"U32_F"\n\t", (u32_t)mem->avail));
LWIP_PLATFORM_DIAG(("used: %"U32_F"\n\t", (u32_t)mem->used));
LWIP_PLATFORM_DIAG(("max: %"U32_F"\n\t", (u32_t)mem->max));
LWIP_PLATFORM_DIAG(("err: %"U32_F"\n", (u32_t)mem->err));
}
#if MEMP_STATS
void
stats_display_memp(struct stats_mem *mem, int index)
{
char * memp_names[] = {
#define LWIP_MEMPOOL(name,num,size,desc) desc,
#include "lwip/memp_std.h"
};
if(index < MEMP_MAX) {
stats_display_mem(mem, memp_names[index]);
}
}
#endif /* MEMP_STATS */
#endif /* MEM_STATS || MEMP_STATS */
#if SYS_STATS
void
stats_display_sys(struct stats_sys *sys)
{
LWIP_PLATFORM_DIAG(("\nSYS\n\t"));
LWIP_PLATFORM_DIAG(("sem.used: %"U32_F"\n\t", (u32_t)sys->sem.used));
LWIP_PLATFORM_DIAG(("sem.max: %"U32_F"\n\t", (u32_t)sys->sem.max));
LWIP_PLATFORM_DIAG(("sem.err: %"U32_F"\n\t", (u32_t)sys->sem.err));
LWIP_PLATFORM_DIAG(("mbox.used: %"U32_F"\n\t", (u32_t)sys->mbox.used));
LWIP_PLATFORM_DIAG(("mbox.max: %"U32_F"\n\t", (u32_t)sys->mbox.max));
LWIP_PLATFORM_DIAG(("mbox.err: %"U32_F"\n\t", (u32_t)sys->mbox.err));
}
#endif /* SYS_STATS */
void
stats_display(void)
{
s16_t i;
LINK_STATS_DISPLAY();
ETHARP_STATS_DISPLAY();
IPFRAG_STATS_DISPLAY();
IP_STATS_DISPLAY();
IGMP_STATS_DISPLAY();
ICMP_STATS_DISPLAY();
UDP_STATS_DISPLAY();
TCP_STATS_DISPLAY();
MEM_STATS_DISPLAY();
for (i = 0; i < MEMP_MAX; i++) {
MEMP_STATS_DISPLAY(i);
}
SYS_STATS_DISPLAY();
}
#endif /* LWIP_STATS_DISPLAY */
#endif /* LWIP_STATS */

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/* This source file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
* User Datagram Protocol module
*
*/
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
/* udp.c
*
* The code for the User Datagram Protocol UDP & UDPLite (RFC 3828).
*
*/
/* @todo Check the use of '(struct udp_pcb).chksum_len_rx'!
*/
#include "lwip/opt.h"
#if LWIP_UDP /* don't build if not configured for use in lwipopts.h */
#include "lwip/udp.h"
#include "lwip/def.h"
#include "lwip/memp.h"
#include "lwip/inet.h"
#include "lwip/inet_chksum.h"
#include "lwip/ip_addr.h"
#include "lwip/netif.h"
#include "lwip/icmp.h"
#include "lwip/stats.h"
#include "lwip/snmp.h"
#include "arch/perf.h"
#include "lwip/dhcp.h"
#include <string.h>
/* The list of UDP PCBs */
/* exported in udp.h (was static) */
struct udp_pcb *udp_pcbs;
/**
* Process an incoming UDP datagram.
*
* Given an incoming UDP datagram (as a chain of pbufs) this function
* finds a corresponding UDP PCB and hands over the pbuf to the pcbs
* recv function. If no pcb is found or the datagram is incorrect, the
* pbuf is freed.
*
* @param p pbuf to be demultiplexed to a UDP PCB.
* @param inp network interface on which the datagram was received.
*
*/
void
udp_input(struct pbuf *p, struct netif *inp)
{
struct udp_hdr *udphdr;
struct udp_pcb *pcb, *prev;
struct udp_pcb *uncon_pcb;
struct ip_hdr *iphdr;
u16_t src, dest;
u8_t local_match;
u8_t broadcast;
PERF_START;
UDP_STATS_INC(udp.recv);
iphdr = p->payload;
/* Check minimum length (IP header + UDP header)
* and move payload pointer to UDP header */
if (p->tot_len < (IPH_HL(iphdr) * 4 + UDP_HLEN) || pbuf_header(p, -(s16_t)(IPH_HL(iphdr) * 4))) {
/* drop short packets */
LWIP_DEBUGF(UDP_DEBUG,
("udp_input: short UDP datagram (%"U16_F" bytes) discarded\n", p->tot_len));
UDP_STATS_INC(udp.lenerr);
UDP_STATS_INC(udp.drop);
snmp_inc_udpinerrors();
pbuf_free(p);
goto end;
}
udphdr = (struct udp_hdr *)p->payload;
/* is broadcast packet ? */
broadcast = ip_addr_isbroadcast(&(iphdr->dest), inp);
LWIP_DEBUGF(UDP_DEBUG, ("udp_input: received datagram of length %"U16_F"\n", p->tot_len));
/* convert src and dest ports to host byte order */
src = ntohs(udphdr->src);
dest = ntohs(udphdr->dest);
udp_debug_print(udphdr);
/* print the UDP source and destination */
LWIP_DEBUGF(UDP_DEBUG,
("udp (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") <-- "
"(%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n",
ip4_addr1(&iphdr->dest), ip4_addr2(&iphdr->dest),
ip4_addr3(&iphdr->dest), ip4_addr4(&iphdr->dest), ntohs(udphdr->dest),
ip4_addr1(&iphdr->src), ip4_addr2(&iphdr->src),
ip4_addr3(&iphdr->src), ip4_addr4(&iphdr->src), ntohs(udphdr->src)));
#if LWIP_DHCP
pcb = NULL;
/* when LWIP_DHCP is active, packets to DHCP_CLIENT_PORT may only be processed by
the dhcp module, no other UDP pcb may use the local UDP port DHCP_CLIENT_PORT */
if (dest == DHCP_CLIENT_PORT) {
/* all packets for DHCP_CLIENT_PORT not coming from DHCP_SERVER_PORT are dropped! */
if (src == DHCP_SERVER_PORT) {
if ((inp->dhcp != NULL) && (inp->dhcp->pcb != NULL)) {
/* accept the packe if
(- broadcast or directed to us) -> DHCP is link-layer-addressed, local ip is always ANY!
- inp->dhcp->pcb->remote == ANY or iphdr->src */
if ((ip_addr_isany(&inp->dhcp->pcb->remote_ip) ||
ip_addr_cmp(&(inp->dhcp->pcb->remote_ip), &(iphdr->src)))) {
pcb = inp->dhcp->pcb;
}
}
}
} else
#endif /* LWIP_DHCP */
{
prev = NULL;
local_match = 0;
uncon_pcb = NULL;
/* Iterate through the UDP pcb list for a matching pcb.
* 'Perfect match' pcbs (connected to the remote port & ip address) are
* preferred. If no perfect match is found, the first unconnected pcb that
* matches the local port and ip address gets the datagram. */
for (pcb = udp_pcbs; pcb != NULL; pcb = pcb->next) {
local_match = 0;
/* print the PCB local and remote address */
LWIP_DEBUGF(UDP_DEBUG,
("pcb (%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F") --- "
"(%"U16_F".%"U16_F".%"U16_F".%"U16_F", %"U16_F")\n",
ip4_addr1(&pcb->local_ip), ip4_addr2(&pcb->local_ip),
ip4_addr3(&pcb->local_ip), ip4_addr4(&pcb->local_ip), pcb->local_port,
ip4_addr1(&pcb->remote_ip), ip4_addr2(&pcb->remote_ip),
ip4_addr3(&pcb->remote_ip), ip4_addr4(&pcb->remote_ip), pcb->remote_port));
/* compare PCB local addr+port to UDP destination addr+port */
if ((pcb->local_port == dest) &&
((!broadcast && ip_addr_isany(&pcb->local_ip)) ||
ip_addr_cmp(&(pcb->local_ip), &(iphdr->dest)) ||
#if LWIP_IGMP
ip_addr_ismulticast(&(iphdr->dest)) ||
#endif /* LWIP_IGMP */
#if IP_SOF_BROADCAST_RECV
(broadcast && (pcb->so_options & SOF_BROADCAST)))) {
#else /* IP_SOF_BROADCAST_RECV */
(broadcast))) {
#endif /* IP_SOF_BROADCAST_RECV */
local_match = 1;
if ((uncon_pcb == NULL) &&
((pcb->flags & UDP_FLAGS_CONNECTED) == 0)) {
/* the first unconnected matching PCB */
uncon_pcb = pcb;
}
}
/* compare PCB remote addr+port to UDP source addr+port */
if ((local_match != 0) &&
(pcb->remote_port == src) &&
(ip_addr_isany(&pcb->remote_ip) ||
ip_addr_cmp(&(pcb->remote_ip), &(iphdr->src)))) {
/* the first fully matching PCB */
if (prev != NULL) {
/* move the pcb to the front of udp_pcbs so that is
found faster next time */
prev->next = pcb->next;
pcb->next = udp_pcbs;
udp_pcbs = pcb;
} else {
UDP_STATS_INC(udp.cachehit);
}
break;
}
prev = pcb;
}
/* no fully matching pcb found? then look for an unconnected pcb */
if (pcb == NULL) {
pcb = uncon_pcb;
}
}
/* Check checksum if this is a match or if it was directed at us. */
if (pcb != NULL || ip_addr_cmp(&inp->ip_addr, &iphdr->dest)) {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_input: calculating checksum\n"));
#if LWIP_UDPLITE
if (IPH_PROTO(iphdr) == IP_PROTO_UDPLITE) {
/* Do the UDP Lite checksum */
#if CHECKSUM_CHECK_UDP
u16_t chklen = ntohs(udphdr->len);
if (chklen < sizeof(struct udp_hdr)) {
if (chklen == 0) {
/* For UDP-Lite, checksum length of 0 means checksum
over the complete packet (See RFC 3828 chap. 3.1) */
chklen = p->tot_len;
} else {
/* At least the UDP-Lite header must be covered by the
checksum! (Again, see RFC 3828 chap. 3.1) */
UDP_STATS_INC(udp.chkerr);
UDP_STATS_INC(udp.drop);
snmp_inc_udpinerrors();
pbuf_free(p);
goto end;
}
}
if (inet_chksum_pseudo_partial(p, (struct ip_addr *)&(iphdr->src),
(struct ip_addr *)&(iphdr->dest),
IP_PROTO_UDPLITE, p->tot_len, chklen) != 0) {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("udp_input: UDP Lite datagram discarded due to failing checksum\n"));
UDP_STATS_INC(udp.chkerr);
UDP_STATS_INC(udp.drop);
snmp_inc_udpinerrors();
pbuf_free(p);
goto end;
}
#endif /* CHECKSUM_CHECK_UDP */
} else
#endif /* LWIP_UDPLITE */
{
#if CHECKSUM_CHECK_UDP
if (udphdr->chksum != 0) {
if (inet_chksum_pseudo(p, (struct ip_addr *)&(iphdr->src),
(struct ip_addr *)&(iphdr->dest),
IP_PROTO_UDP, p->tot_len) != 0) {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("udp_input: UDP datagram discarded due to failing checksum\n"));
UDP_STATS_INC(udp.chkerr);
UDP_STATS_INC(udp.drop);
snmp_inc_udpinerrors();
pbuf_free(p);
goto end;
}
}
#endif /* CHECKSUM_CHECK_UDP */
}
if(pbuf_header(p, -UDP_HLEN)) {
/* Can we cope with this failing? Just assert for now */
LWIP_ASSERT("pbuf_header failed\n", 0);
UDP_STATS_INC(udp.drop);
snmp_inc_udpinerrors();
pbuf_free(p);
goto end;
}
if (pcb != NULL) {
snmp_inc_udpindatagrams();
/* callback */
if (pcb->recv != NULL) {
/* now the recv function is responsible for freeing p */
pcb->recv(pcb->recv_arg, pcb, p, &iphdr->src, src);
} else {
/* no recv function registered? then we have to free the pbuf! */
pbuf_free(p);
goto end;
}
} else {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_input: not for us.\n"));
#if LWIP_ICMP
/* No match was found, send ICMP destination port unreachable unless
destination address was broadcast/multicast. */
if (!broadcast &&
!ip_addr_ismulticast(&iphdr->dest)) {
/* move payload pointer back to ip header */
pbuf_header(p, (IPH_HL(iphdr) * 4) + UDP_HLEN);
LWIP_ASSERT("p->payload == iphdr", (p->payload == iphdr));
icmp_dest_unreach(p, ICMP_DUR_PORT);
}
#endif /* LWIP_ICMP */
UDP_STATS_INC(udp.proterr);
UDP_STATS_INC(udp.drop);
snmp_inc_udpnoports();
pbuf_free(p);
}
} else {
pbuf_free(p);
}
end:
PERF_STOP("udp_input");
}
/**
* Send data using UDP.
*
* @param pcb UDP PCB used to send the data.
* @param p chain of pbuf's to be sent.
*
* The datagram will be sent to the current remote_ip & remote_port
* stored in pcb. If the pcb is not bound to a port, it will
* automatically be bound to a random port.
*
* @return lwIP error code.
* - ERR_OK. Successful. No error occured.
* - ERR_MEM. Out of memory.
* - ERR_RTE. Could not find route to destination address.
* - More errors could be returned by lower protocol layers.
*
* @see udp_disconnect() udp_sendto()
*/
err_t
udp_send(struct udp_pcb *pcb, struct pbuf *p)
{
/* send to the packet using remote ip and port stored in the pcb */
return udp_sendto(pcb, p, &pcb->remote_ip, pcb->remote_port);
}
/**
* Send data to a specified address using UDP.
*
* @param pcb UDP PCB used to send the data.
* @param p chain of pbuf's to be sent.
* @param dst_ip Destination IP address.
* @param dst_port Destination UDP port.
*
* dst_ip & dst_port are expected to be in the same byte order as in the pcb.
*
* If the PCB already has a remote address association, it will
* be restored after the data is sent.
*
* @return lwIP error code (@see udp_send for possible error codes)
*
* @see udp_disconnect() udp_send()
*/
err_t
udp_sendto(struct udp_pcb *pcb, struct pbuf *p,
struct ip_addr *dst_ip, u16_t dst_port)
{
struct netif *netif;
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send\n"));
/* find the outgoing network interface for this packet */
#if LWIP_IGMP
netif = ip_route((ip_addr_ismulticast(dst_ip))?(&(pcb->multicast_ip)):(dst_ip));
#else
netif = ip_route(dst_ip);
#endif /* LWIP_IGMP */
/* no outgoing network interface could be found? */
if (netif == NULL) {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: No route to 0x%"X32_F"\n", dst_ip->addr));
UDP_STATS_INC(udp.rterr);
return ERR_RTE;
}
return udp_sendto_if(pcb, p, dst_ip, dst_port, netif);
}
/**
* Send data to a specified address using UDP.
* The netif used for sending can be specified.
*
* This function exists mainly for DHCP, to be able to send UDP packets
* on a netif that is still down.
*
* @param pcb UDP PCB used to send the data.
* @param p chain of pbuf's to be sent.
* @param dst_ip Destination IP address.
* @param dst_port Destination UDP port.
* @param netif the netif used for sending.
*
* dst_ip & dst_port are expected to be in the same byte order as in the pcb.
*
* @return lwIP error code (@see udp_send for possible error codes)
*
* @see udp_disconnect() udp_send()
*/
err_t
udp_sendto_if(struct udp_pcb *pcb, struct pbuf *p,
struct ip_addr *dst_ip, u16_t dst_port, struct netif *netif)
{
struct udp_hdr *udphdr;
struct ip_addr *src_ip;
err_t err;
struct pbuf *q; /* q will be sent down the stack */
#if IP_SOF_BROADCAST
/* broadcast filter? */
if ( ((pcb->so_options & SOF_BROADCAST) == 0) && ip_addr_isbroadcast(dst_ip, netif) ) {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_LEVEL_SERIOUS,
("udp_sendto_if: SOF_BROADCAST not enabled on pcb %p\n", (void *)pcb));
return ERR_VAL;
}
#endif /* IP_SOF_BROADCAST */
/* if the PCB is not yet bound to a port, bind it here */
if (pcb->local_port == 0) {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_send: not yet bound to a port, binding now\n"));
err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
if (err != ERR_OK) {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: forced port bind failed\n"));
return err;
}
}
/* not enough space to add an UDP header to first pbuf in given p chain? */
if (pbuf_header(p, UDP_HLEN)) {
/* allocate header in a separate new pbuf */
q = pbuf_alloc(PBUF_IP, UDP_HLEN, PBUF_RAM);
/* new header pbuf could not be allocated? */
if (q == NULL) {
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_LEVEL_SERIOUS, ("udp_send: could not allocate header\n"));
return ERR_MEM;
}
/* chain header q in front of given pbuf p */
pbuf_chain(q, p);
/* first pbuf q points to header pbuf */
LWIP_DEBUGF(UDP_DEBUG,
("udp_send: added header pbuf %p before given pbuf %p\n", (void *)q, (void *)p));
} else {
/* adding space for header within p succeeded */
/* first pbuf q equals given pbuf */
q = p;
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: added header in given pbuf %p\n", (void *)p));
}
LWIP_ASSERT("check that first pbuf can hold struct udp_hdr",
(q->len >= sizeof(struct udp_hdr)));
/* q now represents the packet to be sent */
udphdr = q->payload;
udphdr->src = htons(pcb->local_port);
udphdr->dest = htons(dst_port);
/* in UDP, 0 checksum means 'no checksum' */
udphdr->chksum = 0x0000;
/* PCB local address is IP_ANY_ADDR? */
if (ip_addr_isany(&pcb->local_ip)) {
/* use outgoing network interface IP address as source address */
src_ip = &(netif->ip_addr);
} else {
/* check if UDP PCB local IP address is correct
* this could be an old address if netif->ip_addr has changed */
if (!ip_addr_cmp(&(pcb->local_ip), &(netif->ip_addr))) {
/* local_ip doesn't match, drop the packet */
if (q != p) {
/* free the header pbuf */
pbuf_free(q);
q = NULL;
/* p is still referenced by the caller, and will live on */
}
return ERR_VAL;
}
/* use UDP PCB local IP address as source address */
src_ip = &(pcb->local_ip);
}
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: sending datagram of length %"U16_F"\n", q->tot_len));
#if LWIP_UDPLITE
/* UDP Lite protocol? */
if (pcb->flags & UDP_FLAGS_UDPLITE) {
u16_t chklen, chklen_hdr;
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE packet length %"U16_F"\n", q->tot_len));
/* set UDP message length in UDP header */
chklen_hdr = chklen = pcb->chksum_len_tx;
if ((chklen < sizeof(struct udp_hdr)) || (chklen > q->tot_len)) {
if (chklen != 0) {
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP LITE pcb->chksum_len is illegal: %"U16_F"\n", chklen));
}
/* For UDP-Lite, checksum length of 0 means checksum
over the complete packet. (See RFC 3828 chap. 3.1)
At least the UDP-Lite header must be covered by the
checksum, therefore, if chksum_len has an illegal
value, we generate the checksum over the complete
packet to be safe. */
chklen_hdr = 0;
chklen = q->tot_len;
}
udphdr->len = htons(chklen_hdr);
/* calculate checksum */
#if CHECKSUM_GEN_UDP
udphdr->chksum = inet_chksum_pseudo_partial(q, src_ip, dst_ip,
IP_PROTO_UDPLITE, q->tot_len, chklen);
/* chksum zero must become 0xffff, as zero means 'no checksum' */
if (udphdr->chksum == 0x0000)
udphdr->chksum = 0xffff;
#endif /* CHECKSUM_CHECK_UDP */
/* output to IP */
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDPLITE,)\n"));
#if LWIP_NETIF_HWADDRHINT
netif->addr_hint = &(pcb->addr_hint);
#endif /* LWIP_NETIF_HWADDRHINT*/
err = ip_output_if(q, src_ip, dst_ip, pcb->ttl, pcb->tos, IP_PROTO_UDPLITE, netif);
#if LWIP_NETIF_HWADDRHINT
netif->addr_hint = NULL;
#endif /* LWIP_NETIF_HWADDRHINT*/
} else
#endif /* LWIP_UDPLITE */
{ /* UDP */
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP packet length %"U16_F"\n", q->tot_len));
udphdr->len = htons(q->tot_len);
/* calculate checksum */
#if CHECKSUM_GEN_UDP
if ((pcb->flags & UDP_FLAGS_NOCHKSUM) == 0) {
udphdr->chksum = inet_chksum_pseudo(q, src_ip, dst_ip, IP_PROTO_UDP, q->tot_len);
/* chksum zero must become 0xffff, as zero means 'no checksum' */
if (udphdr->chksum == 0x0000) udphdr->chksum = 0xffff;
}
#endif /* CHECKSUM_CHECK_UDP */
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: UDP checksum 0x%04"X16_F"\n", udphdr->chksum));
LWIP_DEBUGF(UDP_DEBUG, ("udp_send: ip_output_if (,,,,IP_PROTO_UDP,)\n"));
/* output to IP */
#if LWIP_NETIF_HWADDRHINT
netif->addr_hint = &(pcb->addr_hint);
#endif /* LWIP_NETIF_HWADDRHINT*/
err = ip_output_if(q, src_ip, dst_ip, pcb->ttl, pcb->tos, IP_PROTO_UDP, netif);
#if LWIP_NETIF_HWADDRHINT
netif->addr_hint = NULL;
#endif /* LWIP_NETIF_HWADDRHINT*/
}
/* TODO: must this be increased even if error occured? */
snmp_inc_udpoutdatagrams();
/* did we chain a separate header pbuf earlier? */
if (q != p) {
/* free the header pbuf */
pbuf_free(q);
q = NULL;
/* p is still referenced by the caller, and will live on */
}
UDP_STATS_INC(udp.xmit);
return err;
}
/**
* Bind an UDP PCB.
*
* @param pcb UDP PCB to be bound with a local address ipaddr and port.
* @param ipaddr local IP address to bind with. Use IP_ADDR_ANY to
* bind to all local interfaces.
* @param port local UDP port to bind with. Use 0 to automatically bind
* to a random port between UDP_LOCAL_PORT_RANGE_START and
* UDP_LOCAL_PORT_RANGE_END.
*
* ipaddr & port are expected to be in the same byte order as in the pcb.
*
* @return lwIP error code.
* - ERR_OK. Successful. No error occured.
* - ERR_USE. The specified ipaddr and port are already bound to by
* another UDP PCB.
*
* @see udp_disconnect()
*/
err_t
udp_bind(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port)
{
struct udp_pcb *ipcb;
u8_t rebind;
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, ("udp_bind(ipaddr = "));
ip_addr_debug_print(UDP_DEBUG, ipaddr);
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE, (", port = %"U16_F")\n", port));
rebind = 0;
/* Check for double bind and rebind of the same pcb */
for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
/* is this UDP PCB already on active list? */
if (pcb == ipcb) {
/* pcb may occur at most once in active list */
LWIP_ASSERT("rebind == 0", rebind == 0);
/* pcb already in list, just rebind */
rebind = 1;
}
/* this code does not allow upper layer to share a UDP port for
listening to broadcast or multicast traffic (See SO_REUSE_ADDR and
SO_REUSE_PORT under *BSD). TODO: See where it fits instead, OR
combine with implementation of UDP PCB flags. Leon Woestenberg. */
#ifdef LWIP_UDP_TODO
/* port matches that of PCB in list? */
else
if ((ipcb->local_port == port) &&
/* IP address matches, or one is IP_ADDR_ANY? */
(ip_addr_isany(&(ipcb->local_ip)) ||
ip_addr_isany(ipaddr) ||
ip_addr_cmp(&(ipcb->local_ip), ipaddr))) {
/* other PCB already binds to this local IP and port */
LWIP_DEBUGF(UDP_DEBUG,
("udp_bind: local port %"U16_F" already bound by another pcb\n", port));
return ERR_USE;
}
#endif
}
ip_addr_set(&pcb->local_ip, ipaddr);
/* no port specified? */
if (port == 0) {
#ifndef UDP_LOCAL_PORT_RANGE_START
#define UDP_LOCAL_PORT_RANGE_START 4096
#define UDP_LOCAL_PORT_RANGE_END 0x7fff
#endif
port = UDP_LOCAL_PORT_RANGE_START;
ipcb = udp_pcbs;
while ((ipcb != NULL) && (port != UDP_LOCAL_PORT_RANGE_END)) {
if (ipcb->local_port == port) {
/* port is already used by another udp_pcb */
port++;
/* restart scanning all udp pcbs */
ipcb = udp_pcbs;
} else
/* go on with next udp pcb */
ipcb = ipcb->next;
}
if (ipcb != NULL) {
/* no more ports available in local range */
LWIP_DEBUGF(UDP_DEBUG, ("udp_bind: out of free UDP ports\n"));
return ERR_USE;
}
}
pcb->local_port = port;
snmp_insert_udpidx_tree(pcb);
/* pcb not active yet? */
if (rebind == 0) {
/* place the PCB on the active list if not already there */
pcb->next = udp_pcbs;
udp_pcbs = pcb;
}
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("udp_bind: bound to %"U16_F".%"U16_F".%"U16_F".%"U16_F", port %"U16_F"\n",
(u16_t)((ntohl(pcb->local_ip.addr) >> 24) & 0xff),
(u16_t)((ntohl(pcb->local_ip.addr) >> 16) & 0xff),
(u16_t)((ntohl(pcb->local_ip.addr) >> 8) & 0xff),
(u16_t)(ntohl(pcb->local_ip.addr) & 0xff), pcb->local_port));
return ERR_OK;
}
/**
* Connect an UDP PCB.
*
* This will associate the UDP PCB with the remote address.
*
* @param pcb UDP PCB to be connected with remote address ipaddr and port.
* @param ipaddr remote IP address to connect with.
* @param port remote UDP port to connect with.
*
* @return lwIP error code
*
* ipaddr & port are expected to be in the same byte order as in the pcb.
*
* The udp pcb is bound to a random local port if not already bound.
*
* @see udp_disconnect()
*/
err_t
udp_connect(struct udp_pcb *pcb, struct ip_addr *ipaddr, u16_t port)
{
struct udp_pcb *ipcb;
if (pcb->local_port == 0) {
err_t err = udp_bind(pcb, &pcb->local_ip, pcb->local_port);
if (err != ERR_OK)
return err;
}
ip_addr_set(&pcb->remote_ip, ipaddr);
pcb->remote_port = port;
pcb->flags |= UDP_FLAGS_CONNECTED;
/** TODO: this functionality belongs in upper layers */
#ifdef LWIP_UDP_TODO
/* Nail down local IP for netconn_addr()/getsockname() */
if (ip_addr_isany(&pcb->local_ip) && !ip_addr_isany(&pcb->remote_ip)) {
struct netif *netif;
if ((netif = ip_route(&(pcb->remote_ip))) == NULL) {
LWIP_DEBUGF(UDP_DEBUG, ("udp_connect: No route to 0x%lx\n", pcb->remote_ip.addr));
UDP_STATS_INC(udp.rterr);
return ERR_RTE;
}
/** TODO: this will bind the udp pcb locally, to the interface which
is used to route output packets to the remote address. However, we
might want to accept incoming packets on any interface! */
pcb->local_ip = netif->ip_addr;
} else if (ip_addr_isany(&pcb->remote_ip)) {
pcb->local_ip.addr = 0;
}
#endif
LWIP_DEBUGF(UDP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE,
("udp_connect: connected to %"U16_F".%"U16_F".%"U16_F".%"U16_F",port %"U16_F"\n",
(u16_t)((ntohl(pcb->remote_ip.addr) >> 24) & 0xff),
(u16_t)((ntohl(pcb->remote_ip.addr) >> 16) & 0xff),
(u16_t)((ntohl(pcb->remote_ip.addr) >> 8) & 0xff),
(u16_t)(ntohl(pcb->remote_ip.addr) & 0xff), pcb->remote_port));
/* Insert UDP PCB into the list of active UDP PCBs. */
for (ipcb = udp_pcbs; ipcb != NULL; ipcb = ipcb->next) {
if (pcb == ipcb) {
/* already on the list, just return */
return ERR_OK;
}
}
/* PCB not yet on the list, add PCB now */
pcb->next = udp_pcbs;
udp_pcbs = pcb;
return ERR_OK;
}
/**
* Disconnect a UDP PCB
*
* @param pcb the udp pcb to disconnect.
*/
void
udp_disconnect(struct udp_pcb *pcb)
{
/* reset remote address association */
ip_addr_set(&pcb->remote_ip, IP_ADDR_ANY);
pcb->remote_port = 0;
/* mark PCB as unconnected */
pcb->flags &= ~UDP_FLAGS_CONNECTED;
}
/**
* Set a receive callback for a UDP PCB
*
* This callback will be called when receiving a datagram for the pcb.
*
* @param pcb the pcb for wich to set the recv callback
* @param recv function pointer of the callback function
* @param recv_arg additional argument to pass to the callback function
*/
void
udp_recv(struct udp_pcb *pcb,
void (* recv)(void *arg, struct udp_pcb *upcb, struct pbuf *p,
struct ip_addr *addr, u16_t port),
void *recv_arg)
{
/* remember recv() callback and user data */
pcb->recv = recv;
pcb->recv_arg = recv_arg;
}
/**
* Remove an UDP PCB.
*
* @param pcb UDP PCB to be removed. The PCB is removed from the list of
* UDP PCB's and the data structure is freed from memory.
*
* @see udp_new()
*/
void
udp_remove(struct udp_pcb *pcb)
{
struct udp_pcb *pcb2;
snmp_delete_udpidx_tree(pcb);
/* pcb to be removed is first in list? */
if (udp_pcbs == pcb) {
/* make list start at 2nd pcb */
udp_pcbs = udp_pcbs->next;
/* pcb not 1st in list */
} else
for (pcb2 = udp_pcbs; pcb2 != NULL; pcb2 = pcb2->next) {
/* find pcb in udp_pcbs list */
if (pcb2->next != NULL && pcb2->next == pcb) {
/* remove pcb from list */
pcb2->next = pcb->next;
}
}
memp_free(MEMP_UDP_PCB, pcb);
}
/**
* Create a UDP PCB.
*
* @return The UDP PCB which was created. NULL if the PCB data structure
* could not be allocated.
*
* @see udp_remove()
*/
struct udp_pcb *
udp_new(void)
{
struct udp_pcb *pcb;
pcb = memp_malloc(MEMP_UDP_PCB);
/* could allocate UDP PCB? */
if (pcb != NULL) {
/* UDP Lite: by initializing to all zeroes, chksum_len is set to 0
* which means checksum is generated over the whole datagram per default
* (recommended as default by RFC 3828). */
/* initialize PCB to all zeroes */
memset(pcb, 0, sizeof(struct udp_pcb));
pcb->ttl = UDP_TTL;
}
return pcb;
}
#if UDP_DEBUG
/**
* Print UDP header information for debug purposes.
*
* @param udphdr pointer to the udp header in memory.
*/
void
udp_debug_print(struct udp_hdr *udphdr)
{
LWIP_DEBUGF(UDP_DEBUG, ("UDP header:\n"));
LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n"));
LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | %5"U16_F" | (src port, dest port)\n",
ntohs(udphdr->src), ntohs(udphdr->dest)));
LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n"));
LWIP_DEBUGF(UDP_DEBUG, ("| %5"U16_F" | 0x%04"X16_F" | (len, chksum)\n",
ntohs(udphdr->len), ntohs(udphdr->chksum)));
LWIP_DEBUGF(UDP_DEBUG, ("+-------------------------------+\n"));
}
#endif /* UDP_DEBUG */
#endif /* LWIP_UDP */

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/**
* @file
*
* AutoIP Automatic LinkLocal IP Configuration
*/
/*
*
* Copyright (c) 2007 Dominik Spies <kontakt@dspies.de>
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* Author: Dominik Spies <kontakt@dspies.de>
*
* This is a AutoIP implementation for the lwIP TCP/IP stack. It aims to conform
* with RFC 3927.
*
*
* Please coordinate changes and requests with Dominik Spies
* <kontakt@dspies.de>
*/
#ifndef __LWIP_AUTOIP_H__
#define __LWIP_AUTOIP_H__
#include "lwip/opt.h"
#if LWIP_AUTOIP /* don't build if not configured for use in lwipopts.h */
#include "lwip/netif.h"
#include "lwip/udp.h"
#include "netif/etharp.h"
#ifdef __cplusplus
extern "C" {
#endif
/* AutoIP Timing */
#define AUTOIP_TMR_INTERVAL 100
#define AUTOIP_TICKS_PER_SECOND (1000 / AUTOIP_TMR_INTERVAL)
/* RFC 3927 Constants */
#define PROBE_WAIT 1 /* second (initial random delay) */
#define PROBE_MIN 1 /* second (minimum delay till repeated probe) */
#define PROBE_MAX 2 /* seconds (maximum delay till repeated probe) */
#define PROBE_NUM 3 /* (number of probe packets) */
#define ANNOUNCE_NUM 2 /* (number of announcement packets) */
#define ANNOUNCE_INTERVAL 2 /* seconds (time between announcement packets) */
#define ANNOUNCE_WAIT 2 /* seconds (delay before announcing) */
#define MAX_CONFLICTS 10 /* (max conflicts before rate limiting) */
#define RATE_LIMIT_INTERVAL 60 /* seconds (delay between successive attempts) */
#define DEFEND_INTERVAL 10 /* seconds (min. wait between defensive ARPs) */
/* AutoIP client states */
#define AUTOIP_STATE_OFF 0
#define AUTOIP_STATE_PROBING 1
#define AUTOIP_STATE_ANNOUNCING 2
#define AUTOIP_STATE_BOUND 3
struct autoip
{
struct ip_addr llipaddr; /* the currently selected, probed, announced or used LL IP-Address */
u8_t state; /* current AutoIP state machine state */
u8_t sent_num; /* sent number of probes or announces, dependent on state */
u16_t ttw; /* ticks to wait, tick is AUTOIP_TMR_INTERVAL long */
u8_t lastconflict; /* ticks until a conflict can be solved by defending */
u8_t tried_llipaddr; /* total number of probed/used Link Local IP-Addresses */
};
/** Init srand, has to be called before entering mainloop */
void autoip_init(void);
/** Start AutoIP client */
err_t autoip_start(struct netif *netif);
/** Stop AutoIP client */
err_t autoip_stop(struct netif *netif);
/** Handles every incoming ARP Packet, called by etharp_arp_input */
void autoip_arp_reply(struct netif *netif, struct etharp_hdr *hdr);
/** Has to be called in loop every AUTOIP_TMR_INTERVAL milliseconds */
void autoip_tmr(void);
/** Handle a possible change in the network configuration */
void autoip_network_changed(struct netif *netif);
#ifdef __cplusplus
}
#endif
#endif /* LWIP_AUTOIP */
#endif /* __LWIP_AUTOIP_H__ */

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIP_ICMP_H__
#define __LWIP_ICMP_H__
#include "lwip/opt.h"
#include "lwip/pbuf.h"
#include "lwip/ip_addr.h"
#include "lwip/netif.h"
#ifdef __cplusplus
extern "C" {
#endif
#define ICMP_ER 0 /* echo reply */
#define ICMP_DUR 3 /* destination unreachable */
#define ICMP_SQ 4 /* source quench */
#define ICMP_RD 5 /* redirect */
#define ICMP_ECHO 8 /* echo */
#define ICMP_TE 11 /* time exceeded */
#define ICMP_PP 12 /* parameter problem */
#define ICMP_TS 13 /* timestamp */
#define ICMP_TSR 14 /* timestamp reply */
#define ICMP_IRQ 15 /* information request */
#define ICMP_IR 16 /* information reply */
enum icmp_dur_type {
ICMP_DUR_NET = 0, /* net unreachable */
ICMP_DUR_HOST = 1, /* host unreachable */
ICMP_DUR_PROTO = 2, /* protocol unreachable */
ICMP_DUR_PORT = 3, /* port unreachable */
ICMP_DUR_FRAG = 4, /* fragmentation needed and DF set */
ICMP_DUR_SR = 5 /* source route failed */
};
enum icmp_te_type {
ICMP_TE_TTL = 0, /* time to live exceeded in transit */
ICMP_TE_FRAG = 1 /* fragment reassembly time exceeded */
};
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
/** This is the standard ICMP header only that the u32_t data
* is splitted to two u16_t like ICMP echo needs it.
* This header is also used for other ICMP types that do not
* use the data part.
*/
PACK_STRUCT_BEGIN
struct icmp_echo_hdr {
PACK_STRUCT_FIELD(u8_t type);
PACK_STRUCT_FIELD(u8_t code);
PACK_STRUCT_FIELD(u16_t chksum);
PACK_STRUCT_FIELD(u16_t id);
PACK_STRUCT_FIELD(u16_t seqno);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
#define ICMPH_TYPE(hdr) ((hdr)->type)
#define ICMPH_CODE(hdr) ((hdr)->code)
/** Combines type and code to an u16_t */
#define ICMPH_TYPE_SET(hdr, t) ((hdr)->type = (t))
#define ICMPH_CODE_SET(hdr, c) ((hdr)->code = (c))
#if LWIP_ICMP /* don't build if not configured for use in lwipopts.h */
void icmp_input(struct pbuf *p, struct netif *inp);
void icmp_dest_unreach(struct pbuf *p, enum icmp_dur_type t);
void icmp_time_exceeded(struct pbuf *p, enum icmp_te_type t);
#endif /* LWIP_ICMP */
#ifdef __cplusplus
}
#endif
#endif /* __LWIP_ICMP_H__ */

164
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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*
* Copyright (c) 2002 CITEL Technologies Ltd.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
* modification, are permitted provided that the following conditions
* are met:
* 1. Redistributions of source code must retain the above copyright
* notice, this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright
* notice, this list of conditions and the following disclaimer in the
* documentation and/or other materials provided with the distribution.
* 3. Neither the name of CITEL Technologies Ltd nor the names of its contributors
* may be used to endorse or promote products derived from this software
* without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY CITEL TECHNOLOGIES AND CONTRIBUTORS ``AS IS''
* AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
* IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
* ARE DISCLAIMED. IN NO EVENT SHALL CITEL TECHNOLOGIES OR CONTRIBUTORS BE LIABLE
* FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
* DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
* OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
* HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
* LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
* OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
* SUCH DAMAGE.
*
* This file is a contribution to the lwIP TCP/IP stack.
* The Swedish Institute of Computer Science and Adam Dunkels
* are specifically granted permission to redistribute this
* source code.
*/
#ifndef __LWIP_IGMP_H__
#define __LWIP_IGMP_H__
#include "lwip/opt.h"
#include "lwip/ip_addr.h"
#include "lwip/netif.h"
#include "lwip/pbuf.h"
#if LWIP_IGMP /* don't build if not configured for use in lwipopts.h */
#ifdef __cplusplus
extern "C" {
#endif
/*
* IGMP constants
*/
#define IP_PROTO_IGMP 2
#define IGMP_TTL 1
#define IGMP_MINLEN 8
#define ROUTER_ALERT 0x9404
#define ROUTER_ALERTLEN 4
/*
* IGMP message types, including version number.
*/
#define IGMP_MEMB_QUERY 0x11 /* Membership query */
#define IGMP_V1_MEMB_REPORT 0x12 /* Ver. 1 membership report */
#define IGMP_V2_MEMB_REPORT 0x16 /* Ver. 2 membership report */
#define IGMP_LEAVE_GROUP 0x17 /* Leave-group message */
/* IGMP timer */
#define IGMP_TMR_INTERVAL 100 /* Milliseconds */
#define IGMP_V1_DELAYING_MEMBER_TMR (1000/IGMP_TMR_INTERVAL)
#define IGMP_JOIN_DELAYING_MEMBER_TMR (500 /IGMP_TMR_INTERVAL)
/* MAC Filter Actions */
#define IGMP_DEL_MAC_FILTER 0
#define IGMP_ADD_MAC_FILTER 1
/* Group membership states */
#define IGMP_GROUP_NON_MEMBER 0
#define IGMP_GROUP_DELAYING_MEMBER 1
#define IGMP_GROUP_IDLE_MEMBER 2
/*
* IGMP packet format.
*/
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
PACK_STRUCT_BEGIN
struct igmp_msg {
PACK_STRUCT_FIELD(u8_t igmp_msgtype);
PACK_STRUCT_FIELD(u8_t igmp_maxresp);
PACK_STRUCT_FIELD(u16_t igmp_checksum);
PACK_STRUCT_FIELD(struct ip_addr igmp_group_address);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
/*
* now a group structure - there is
* a list of groups for each interface
* these should really be linked from the interface, but
* if we keep them separate we will not affect the lwip original code
* too much
*
* There will be a group for the all systems group address but this
* will not run the state machine as it is used to kick off reports
* from all the other groups
*/
struct igmp_group {
struct igmp_group *next;
struct netif *interface;
struct ip_addr group_address;
u8_t last_reporter_flag; /* signifies we were the last person to report */
u8_t group_state;
u16_t timer;
u8_t use; /* counter of simultaneous uses */
};
/* Prototypes */
void igmp_init(void);
err_t igmp_start( struct netif *netif);
err_t igmp_stop( struct netif *netif);
void igmp_report_groups( struct netif *netif);
struct igmp_group *igmp_lookfor_group( struct netif *ifp, struct ip_addr *addr);
struct igmp_group *igmp_lookup_group( struct netif *ifp, struct ip_addr *addr);
err_t igmp_remove_group( struct igmp_group *group);
void igmp_input( struct pbuf *p, struct netif *inp, struct ip_addr *dest);
err_t igmp_joingroup( struct ip_addr *ifaddr, struct ip_addr *groupaddr);
err_t igmp_leavegroup( struct ip_addr *ifaddr, struct ip_addr *groupaddr);
void igmp_tmr(void);
void igmp_timeout( struct igmp_group *group);
void igmp_start_timer( struct igmp_group *group, u8_t max_time);
void igmp_stop_timer( struct igmp_group *group);
void igmp_delaying_member( struct igmp_group *group, u8_t maxresp);
err_t igmp_ip_output_if( struct pbuf *p, struct ip_addr *src, struct ip_addr *dest, u8_t ttl, u8_t proto, struct netif *netif);
void igmp_send( struct igmp_group *group, u8_t type);
#ifdef __cplusplus
}
#endif
#endif /* LWIP_IGMP */
#endif /* __LWIP_IGMP_H__ */

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIP_INET_H__
#define __LWIP_INET_H__
#include "lwip/opt.h"
#ifdef __cplusplus
extern "C" {
#endif
/* For compatibility with BSD code */
struct in_addr {
u32_t s_addr;
};
#define INADDR_NONE ((u32_t)0xffffffffUL) /* 255.255.255.255 */
#define INADDR_LOOPBACK ((u32_t)0x7f000001UL) /* 127.0.0.1 */
#define INADDR_ANY ((u32_t)0x00000000UL) /* 0.0.0.0 */
#define INADDR_BROADCAST ((u32_t)0xffffffffUL) /* 255.255.255.255 */
u32_t inet_addr(const char *cp);
int inet_aton(const char *cp, struct in_addr *addr);
char *inet_ntoa(struct in_addr addr); /* returns ptr to static buffer; not reentrant! */
#ifdef htons
#undef htons
#endif /* htons */
#ifdef htonl
#undef htonl
#endif /* htonl */
#ifdef ntohs
#undef ntohs
#endif /* ntohs */
#ifdef ntohl
#undef ntohl
#endif /* ntohl */
#ifndef LWIP_PLATFORM_BYTESWAP
#define LWIP_PLATFORM_BYTESWAP 0
#endif
#if BYTE_ORDER == BIG_ENDIAN
#define htons(x) (x)
#define ntohs(x) (x)
#define htonl(x) (x)
#define ntohl(x) (x)
#else /* BYTE_ORDER != BIG_ENDIAN */
#ifdef LWIP_PREFIX_BYTEORDER_FUNCS
/* workaround for naming collisions on some platforms */
#define htons lwip_htons
#define ntohs lwip_ntohs
#define htonl lwip_htonl
#define ntohl lwip_ntohl
#endif /* LWIP_PREFIX_BYTEORDER_FUNCS */
#if LWIP_PLATFORM_BYTESWAP
#define htons(x) LWIP_PLATFORM_HTONS(x)
#define ntohs(x) LWIP_PLATFORM_HTONS(x)
#define htonl(x) LWIP_PLATFORM_HTONL(x)
#define ntohl(x) LWIP_PLATFORM_HTONL(x)
#else /* LWIP_PLATFORM_BYTESWAP */
u16_t htons(u16_t x);
u16_t ntohs(u16_t x);
u32_t htonl(u32_t x);
u32_t ntohl(u32_t x);
#endif /* LWIP_PLATFORM_BYTESWAP */
#endif /* BYTE_ORDER == BIG_ENDIAN */
#ifdef __cplusplus
}
#endif
#endif /* __LWIP_INET_H__ */

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIP_INET_CHKSUM_H__
#define __LWIP_INET_CHKSUM_H__
#include "lwip/opt.h"
#include "lwip/pbuf.h"
#include "lwip/ip_addr.h"
#ifdef __cplusplus
extern "C" {
#endif
u16_t inet_chksum(void *dataptr, u16_t len);
u16_t inet_chksum_pbuf(struct pbuf *p);
u16_t inet_chksum_pseudo(struct pbuf *p,
struct ip_addr *src, struct ip_addr *dest,
u8_t proto, u16_t proto_len);
#if LWIP_UDPLITE
u16_t inet_chksum_pseudo_partial(struct pbuf *p,
struct ip_addr *src, struct ip_addr *dest,
u8_t proto, u16_t proto_len, u16_t chksum_len);
#endif
#ifdef __cplusplus
}
#endif
#endif /* __LWIP_INET_H__ */

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIP_IP_H__
#define __LWIP_IP_H__
#include "lwip/opt.h"
#include "lwip/def.h"
#include "lwip/pbuf.h"
#include "lwip/ip_addr.h"
#include "lwip/err.h"
#include "lwip/netif.h"
#ifdef __cplusplus
extern "C" {
#endif
/** Currently, the function ip_output_if_opt() is only used with IGMP */
#define IP_OPTIONS_SEND LWIP_IGMP
#define IP_HLEN 20
#define IP_PROTO_ICMP 1
#define IP_PROTO_UDP 17
#define IP_PROTO_UDPLITE 136
#define IP_PROTO_TCP 6
/* This is passed as the destination address to ip_output_if (not
to ip_output), meaning that an IP header already is constructed
in the pbuf. This is used when TCP retransmits. */
#ifdef IP_HDRINCL
#undef IP_HDRINCL
#endif /* IP_HDRINCL */
#define IP_HDRINCL NULL
#if LWIP_NETIF_HWADDRHINT
#define IP_PCB_ADDRHINT ;u8_t addr_hint
#else
#define IP_PCB_ADDRHINT
#endif /* LWIP_NETIF_HWADDRHINT */
/* This is the common part of all PCB types. It needs to be at the
beginning of a PCB type definition. It is located here so that
changes to this common part are made in one location instead of
having to change all PCB structs. */
#define IP_PCB \
/* ip addresses in network byte order */ \
struct ip_addr local_ip; \
struct ip_addr remote_ip; \
/* Socket options */ \
u16_t so_options; \
/* Type Of Service */ \
u8_t tos; \
/* Time To Live */ \
u8_t ttl \
/* link layer address resolution hint */ \
IP_PCB_ADDRHINT
struct ip_pcb {
/* Common members of all PCB types */
IP_PCB;
};
/*
* Option flags per-socket. These are the same like SO_XXX.
*/
#define SOF_DEBUG (u16_t)0x0001U /* turn on debugging info recording */
#define SOF_ACCEPTCONN (u16_t)0x0002U /* socket has had listen() */
#define SOF_REUSEADDR (u16_t)0x0004U /* allow local address reuse */
#define SOF_KEEPALIVE (u16_t)0x0008U /* keep connections alive */
#define SOF_DONTROUTE (u16_t)0x0010U /* just use interface addresses */
#define SOF_BROADCAST (u16_t)0x0020U /* permit to send and to receive broadcast messages (see IP_SOF_BROADCAST option) */
#define SOF_USELOOPBACK (u16_t)0x0040U /* bypass hardware when possible */
#define SOF_LINGER (u16_t)0x0080U /* linger on close if data present */
#define SOF_OOBINLINE (u16_t)0x0100U /* leave received OOB data in line */
#define SOF_REUSEPORT (u16_t)0x0200U /* allow local address & port reuse */
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
PACK_STRUCT_BEGIN
struct ip_hdr {
/* version / header length / type of service */
PACK_STRUCT_FIELD(u16_t _v_hl_tos);
/* total length */
PACK_STRUCT_FIELD(u16_t _len);
/* identification */
PACK_STRUCT_FIELD(u16_t _id);
/* fragment offset field */
PACK_STRUCT_FIELD(u16_t _offset);
#define IP_RF 0x8000 /* reserved fragment flag */
#define IP_DF 0x4000 /* dont fragment flag */
#define IP_MF 0x2000 /* more fragments flag */
#define IP_OFFMASK 0x1fff /* mask for fragmenting bits */
/* time to live / protocol*/
PACK_STRUCT_FIELD(u16_t _ttl_proto);
/* checksum */
PACK_STRUCT_FIELD(u16_t _chksum);
/* source and destination IP addresses */
PACK_STRUCT_FIELD(struct ip_addr src);
PACK_STRUCT_FIELD(struct ip_addr dest);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
#define IPH_V(hdr) (ntohs((hdr)->_v_hl_tos) >> 12)
#define IPH_HL(hdr) ((ntohs((hdr)->_v_hl_tos) >> 8) & 0x0f)
#define IPH_TOS(hdr) (ntohs((hdr)->_v_hl_tos) & 0xff)
#define IPH_LEN(hdr) ((hdr)->_len)
#define IPH_ID(hdr) ((hdr)->_id)
#define IPH_OFFSET(hdr) ((hdr)->_offset)
#define IPH_TTL(hdr) (ntohs((hdr)->_ttl_proto) >> 8)
#define IPH_PROTO(hdr) (ntohs((hdr)->_ttl_proto) & 0xff)
#define IPH_CHKSUM(hdr) ((hdr)->_chksum)
#define IPH_VHLTOS_SET(hdr, v, hl, tos) (hdr)->_v_hl_tos = (htons(((v) << 12) | ((hl) << 8) | (tos)))
#define IPH_LEN_SET(hdr, len) (hdr)->_len = (len)
#define IPH_ID_SET(hdr, id) (hdr)->_id = (id)
#define IPH_OFFSET_SET(hdr, off) (hdr)->_offset = (off)
#define IPH_TTL_SET(hdr, ttl) (hdr)->_ttl_proto = (htons(IPH_PROTO(hdr) | ((u16_t)(ttl) << 8)))
#define IPH_PROTO_SET(hdr, proto) (hdr)->_ttl_proto = (htons((proto) | (IPH_TTL(hdr) << 8)))
#define IPH_CHKSUM_SET(hdr, chksum) (hdr)->_chksum = (chksum)
/** The interface that provided the packet for the current callback invocation. */
extern struct netif *current_netif;
/** Header of the input packet currently being processed. */
extern const struct ip_hdr *current_header;
#define ip_init() /* Compatibility define, not init needed. */
struct netif *ip_route(struct ip_addr *dest);
err_t ip_input(struct pbuf *p, struct netif *inp);
err_t ip_output(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t tos, u8_t proto);
err_t ip_output_if(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t tos, u8_t proto,
struct netif *netif);
#if LWIP_NETIF_HWADDRHINT
err_t ip_output_hinted(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t tos, u8_t proto, u8_t *addr_hint);
#endif /* LWIP_NETIF_HWADDRHINT */
#if IP_OPTIONS_SEND
err_t ip_output_if_opt(struct pbuf *p, struct ip_addr *src, struct ip_addr *dest,
u8_t ttl, u8_t tos, u8_t proto, struct netif *netif, void *ip_options,
u16_t optlen);
#endif /* IP_OPTIONS_SEND */
/** Get the interface that received the current packet.
* This function must only be called from a receive callback (udp_recv,
* raw_recv, tcp_accept). It will return NULL otherwise. */
#define ip_current_netif() (current_netif)
/** Get the IP header of the current packet.
* This function must only be called from a receive callback (udp_recv,
* raw_recv, tcp_accept). It will return NULL otherwise. */
#define ip_current_header() (current_header)
#if IP_DEBUG
void ip_debug_print(struct pbuf *p);
#else
#define ip_debug_print(p)
#endif /* IP_DEBUG */
#ifdef __cplusplus
}
#endif
#endif /* __LWIP_IP_H__ */

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIP_IP_ADDR_H__
#define __LWIP_IP_ADDR_H__
#include "lwip/opt.h"
#include "lwip/inet.h"
#ifdef __cplusplus
extern "C" {
#endif
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
PACK_STRUCT_BEGIN
struct ip_addr {
PACK_STRUCT_FIELD(u32_t addr);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
/*
* struct ipaddr2 is used in the definition of the ARP packet format in
* order to support compilers that don't have structure packing.
*/
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/bpstruct.h"
#endif
PACK_STRUCT_BEGIN
struct ip_addr2 {
PACK_STRUCT_FIELD(u16_t addrw[2]);
} PACK_STRUCT_STRUCT;
PACK_STRUCT_END
#ifdef PACK_STRUCT_USE_INCLUDES
# include "arch/epstruct.h"
#endif
struct netif;
extern const struct ip_addr ip_addr_any;
extern const struct ip_addr ip_addr_broadcast;
/** IP_ADDR_ can be used as a fixed IP address
* for the wildcard and the broadcast address
*/
#define IP_ADDR_ANY ((struct ip_addr *)&ip_addr_any)
#define IP_ADDR_BROADCAST ((struct ip_addr *)&ip_addr_broadcast)
/* Definitions of the bits in an Internet address integer.
On subnets, host and network parts are found according to
the subnet mask, not these masks. */
#define IN_CLASSA(a) ((((u32_t)(a)) & 0x80000000UL) == 0)
#define IN_CLASSA_NET 0xff000000
#define IN_CLASSA_NSHIFT 24
#define IN_CLASSA_HOST (0xffffffff & ~IN_CLASSA_NET)
#define IN_CLASSA_MAX 128
#define IN_CLASSB(a) ((((u32_t)(a)) & 0xc0000000UL) == 0x80000000UL)
#define IN_CLASSB_NET 0xffff0000
#define IN_CLASSB_NSHIFT 16
#define IN_CLASSB_HOST (0xffffffff & ~IN_CLASSB_NET)
#define IN_CLASSB_MAX 65536
#define IN_CLASSC(a) ((((u32_t)(a)) & 0xe0000000UL) == 0xc0000000UL)
#define IN_CLASSC_NET 0xffffff00
#define IN_CLASSC_NSHIFT 8
#define IN_CLASSC_HOST (0xffffffff & ~IN_CLASSC_NET)
#define IN_CLASSD(a) (((u32_t)(a) & 0xf0000000UL) == 0xe0000000UL)
#define IN_CLASSD_NET 0xf0000000 /* These ones aren't really */
#define IN_CLASSD_NSHIFT 28 /* net and host fields, but */
#define IN_CLASSD_HOST 0x0fffffff /* routing needn't know. */
#define IN_MULTICAST(a) IN_CLASSD(a)
#define IN_EXPERIMENTAL(a) (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL)
#define IN_BADCLASS(a) (((u32_t)(a) & 0xf0000000UL) == 0xf0000000UL)
#define IN_LOOPBACKNET 127 /* official! */
#define IP4_ADDR(ipaddr, a,b,c,d) \
(ipaddr)->addr = htonl(((u32_t)((a) & 0xff) << 24) | \
((u32_t)((b) & 0xff) << 16) | \
((u32_t)((c) & 0xff) << 8) | \
(u32_t)((d) & 0xff))
#define ip_addr_set(dest, src) (dest)->addr = \
((src) == NULL? 0:\
(src)->addr)
/**
* Determine if two address are on the same network.
*
* @arg addr1 IP address 1
* @arg addr2 IP address 2
* @arg mask network identifier mask
* @return !0 if the network identifiers of both address match
*/
#define ip_addr_netcmp(addr1, addr2, mask) (((addr1)->addr & \
(mask)->addr) == \
((addr2)->addr & \
(mask)->addr))
#define ip_addr_cmp(addr1, addr2) ((addr1)->addr == (addr2)->addr)
#define ip_addr_isany(addr1) ((addr1) == NULL || (addr1)->addr == 0)
u8_t ip_addr_isbroadcast(struct ip_addr *, struct netif *);
#define ip_addr_ismulticast(addr1) (((addr1)->addr & ntohl(0xf0000000UL)) == ntohl(0xe0000000UL))
#define ip_addr_islinklocal(addr1) (((addr1)->addr & ntohl(0xffff0000UL)) == ntohl(0xa9fe0000UL))
#define ip_addr_debug_print(debug, ipaddr) \
LWIP_DEBUGF(debug, ("%"U16_F".%"U16_F".%"U16_F".%"U16_F, \
ipaddr != NULL ? \
(u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff : 0, \
ipaddr != NULL ? \
(u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff : 0, \
ipaddr != NULL ? \
(u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff : 0, \
ipaddr != NULL ? \
(u16_t)ntohl((ipaddr)->addr) & 0xff : 0))
/* These are cast to u16_t, with the intent that they are often arguments
* to printf using the U16_F format from cc.h. */
#define ip4_addr1(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 24) & 0xff)
#define ip4_addr2(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 16) & 0xff)
#define ip4_addr3(ipaddr) ((u16_t)(ntohl((ipaddr)->addr) >> 8) & 0xff)
#define ip4_addr4(ipaddr) ((u16_t)(ntohl((ipaddr)->addr)) & 0xff)
/**
* Same as inet_ntoa() but takes a struct ip_addr*
*/
#define ip_ntoa(addr) ((addr != NULL) ? inet_ntoa(*((struct in_addr*)(addr))) : "NULL")
#ifdef __cplusplus
}
#endif
#endif /* __LWIP_IP_ADDR_H__ */

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Jani Monoses <jani@iv.ro>
*
*/
#ifndef __LWIP_IP_FRAG_H__
#define __LWIP_IP_FRAG_H__
#include "lwip/opt.h"
#include "lwip/err.h"
#include "lwip/pbuf.h"
#include "lwip/netif.h"
#include "lwip/ip_addr.h"
#include "lwip/ip.h"
#ifdef __cplusplus
extern "C" {
#endif
#if IP_REASSEMBLY
/* The IP reassembly timer interval in milliseconds. */
#define IP_TMR_INTERVAL 1000
/* IP reassembly helper struct.
* This is exported because memp needs to know the size.
*/
struct ip_reassdata {
struct ip_reassdata *next;
struct pbuf *p;
struct ip_hdr iphdr;
u16_t datagram_len;
u8_t flags;
u8_t timer;
};
void ip_reass_init(void);
void ip_reass_tmr(void);
struct pbuf * ip_reass(struct pbuf *p);
#endif /* IP_REASSEMBLY */
#if IP_FRAG
err_t ip_frag(struct pbuf *p, struct netif *netif, struct ip_addr *dest);
#endif /* IP_FRAG */
#ifdef __cplusplus
}
#endif
#endif /* __LWIP_IP_FRAG_H__ */

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/* This header file is part of the ATMEL AVR-UC3-SoftwareFramework-1.7.0 Release */
/*
* Copyright (c) 2001-2004 Swedish Institute of Computer Science.
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without modification,
* are permitted provided that the following conditions are met:
*
* 1. Redistributions of source code must retain the above copyright notice,
* this list of conditions and the following disclaimer.
* 2. Redistributions in binary form must reproduce the above copyright notice,
* this list of conditions and the following disclaimer in the documentation
* and/or other materials provided with the distribution.
* 3. The name of the author may not be used to endorse or promote products
* derived from this software without specific prior written permission.
*
* THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR IMPLIED
* WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
* MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT
* SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
* EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT
* OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
* INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
* CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING
* IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY
* OF SUCH DAMAGE.
*
* This file is part of the lwIP TCP/IP stack.
*
* Author: Adam Dunkels <adam@sics.se>
*
*/
#ifndef __LWIP_API_H__
#define __LWIP_API_H__
#include "lwip/opt.h"
#if LWIP_NETCONN /* don't build if not configured for use in lwipopts.h */
#include <stddef.h> /* for size_t */
#include "lwip/netbuf.h"
#include "lwip/sys.h"
#include "lwip/ip_addr.h"
#include "lwip/err.h"
#ifdef __cplusplus
extern "C" {
#endif
/* Throughout this file, IP addresses and port numbers are expected to be in
* the same byte order as in the corresponding pcb.
*/
/* Flags for netconn_write */
#define NETCONN_NOFLAG 0x00
#define NETCONN_NOCOPY 0x00 /* Only for source code compatibility */
#define NETCONN_COPY 0x01
#define NETCONN_MORE 0x02
/* Helpers to process several netconn_types by the same code */
#define NETCONNTYPE_GROUP(t) (t&0xF0)
#define NETCONNTYPE_DATAGRAM(t) (t&0xE0)
enum netconn_type {
NETCONN_INVALID = 0,
/* NETCONN_TCP Group */
NETCONN_TCP = 0x10,
/* NETCONN_UDP Group */
NETCONN_UDP = 0x20,
NETCONN_UDPLITE = 0x21,
NETCONN_UDPNOCHKSUM= 0x22,
/* NETCONN_RAW Group */
NETCONN_RAW = 0x40
};
enum netconn_state {
NETCONN_NONE,
NETCONN_WRITE,
NETCONN_LISTEN,
NETCONN_CONNECT,
NETCONN_CLOSE
};
enum netconn_evt {
NETCONN_EVT_RCVPLUS,
NETCONN_EVT_RCVMINUS,
NETCONN_EVT_SENDPLUS,
NETCONN_EVT_SENDMINUS
};
#if LWIP_IGMP
enum netconn_igmp {
NETCONN_JOIN,
NETCONN_LEAVE
};
#endif /* LWIP_IGMP */
/* forward-declare some structs to avoid to include their headers */
struct ip_pcb;
struct tcp_pcb;
struct udp_pcb;
struct raw_pcb;
struct netconn;
/** A callback prototype to inform about events for a netconn */
typedef void (* netconn_callback)(struct netconn *, enum netconn_evt, u16_t len);
/** A netconn descriptor */
struct netconn {
/** type of the netconn (TCP, UDP or RAW) */
enum netconn_type type;
/** current state of the netconn */
enum netconn_state state;
/** the lwIP internal protocol control block */
union {
struct ip_pcb *ip;
struct tcp_pcb *tcp;
struct udp_pcb *udp;
struct raw_pcb *raw;
} pcb;
/** the last error this netconn had */
err_t err;
/** sem that is used to synchroneously execute functions in the core context */
sys_sem_t op_completed;
/** mbox where received packets are stored until they are fetched
by the netconn application thread (can grow quite big) */
sys_mbox_t recvmbox;
/** mbox where new connections are stored until processed
by the application thread */
sys_mbox_t acceptmbox;
/** only used for socket layer */
int socket;
#if LWIP_SO_RCVTIMEO
/** timeout to wait for new data to be received
(or connections to arrive for listening netconns) */
int recv_timeout;
#endif /* LWIP_SO_RCVTIMEO */
#if LWIP_SO_RCVBUF
/** maximum amount of bytes queued in recvmbox */
int recv_bufsize;
#endif /* LWIP_SO_RCVBUF */
s16_t recv_avail;
#if LWIP_TCP
/** TCP: when data passed to netconn_write doesn't fit into the send buffer,
this temporarily stores the message. */
struct api_msg_msg *write_msg;
/** TCP: when data passed to netconn_write doesn't fit into the send buffer,
this temporarily stores how much is already sent. */
size_t write_offset;
#if LWIP_TCPIP_CORE_LOCKING
/** TCP: when data passed to netconn_write doesn't fit into the send buffer,
this temporarily stores whether to wake up the original application task
if data couldn't be sent in the first try. */
u8_t write_delayed;
#endif /* LWIP_TCPIP_CORE_LOCKING */
#endif /* LWIP_TCP */
/** A callback function that is informed about events for this netconn */
netconn_callback callback;
};
/* Register an Network connection event */
#define API_EVENT(c,e,l) if (c->callback) { \
(*c->callback)(c, e, l); \
}
/* Network connection functions: */
#define netconn_new(t) netconn_new_with_proto_and_callback(t, 0, NULL)
#define netconn_new_with_callback(t, c) netconn_new_with_proto_and_callback(t, 0, c)
struct
netconn *netconn_new_with_proto_and_callback(enum netconn_type t, u8_t proto,
netconn_callback callback);
err_t netconn_delete (struct netconn *conn);
/** Get the type of a netconn (as enum netconn_type). */
#define netconn_type(conn) (conn->type)
err_t netconn_getaddr (struct netconn *conn,
struct ip_addr *addr,
u16_t *port,
u8_t local);
#define netconn_peer(c,i,p) netconn_getaddr(c,i,p,0)
#define netconn_addr(c,i,p) netconn_getaddr(c,i,p,1)
err_t netconn_bind (struct netconn *conn,
struct ip_addr *addr,
u16_t port);
err_t netconn_connect (struct netconn *conn,
struct ip_addr *addr,
u16_t port);
err_t netconn_disconnect (struct netconn *conn);
err_t netconn_listen_with_backlog(struct netconn *conn, u8_t backlog);
#define netconn_listen(conn) netconn_listen_with_backlog(conn, TCP_DEFAULT_LISTEN_BACKLOG)
struct netconn * netconn_accept (struct netconn *conn);
struct netbuf * netconn_recv (struct netconn *conn);
err_t netconn_sendto (struct netconn *conn,
struct netbuf *buf, struct ip_addr *addr, u16_t port);
err_t netconn_send (struct netconn *conn,
struct netbuf *buf);
err_t netconn_write (struct netconn *conn,
const void *dataptr, size_t size,
u8_t apiflags);
err_t netconn_close (struct netconn *conn);
#if LWIP_IGMP
err_t netconn_join_leave_group (struct netconn *conn,
struct ip_addr *multiaddr,
struct ip_addr *interface,
enum netconn_igmp join_or_leave);
#endif /* LWIP_IGMP */
#if LWIP_DNS
err_t netconn_gethostbyname(const char *name, struct ip_addr *addr);
#endif /* LWIP_DNS */
#define netconn_err(conn) ((conn)->err)
#define netconn_recv_bufsize(conn) ((conn)->recv_bufsize)
#ifdef __cplusplus
}
#endif
#endif /* LWIP_NETCONN */
#endif /* __LWIP_API_H__ */

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