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Expose Chip CCompare0 timer

This commit is contained in:
Makuna
2015-05-24 19:21:47 -07:00
parent 912c79d4a8
commit 8393dfcc8f
4 changed files with 77 additions and 3 deletions

View File

@ -43,6 +43,7 @@ typedef void (*int_handler_t)(void*);
#define ETS_GPIO_INUM 4
#define ETS_UART_INUM 5
#define ETS_UART1_INUM 5
#define ETS_CCOMPARE0_INUM 6
#define ETS_FRC_TIMER1_INUM 9 /* use edge*/
#define ETS_INTR_LOCK() \
@ -51,6 +52,9 @@ typedef void (*int_handler_t)(void*);
#define ETS_INTR_UNLOCK() \
ets_intr_unlock()
#define ETS_CCOMPARE0_INTR_ATTACH(func, arg) \
ets_isr_attach(ETS_CCOMPARE0_INUM, (int_handler_t)(func), (void *)(arg))
#define ETS_FRC_TIMER1_INTR_ATTACH(func, arg) \
ets_isr_attach(ETS_FRC_TIMER1_INUM, (int_handler_t)(func), (void *)(arg))
@ -69,6 +73,18 @@ typedef void (*int_handler_t)(void*);
#define ETS_INTR_DISABLE(inum) \
ets_isr_mask((1<<inum))
{
uint32_t enabled;
__asm__ __volatile__("esync; rsr %0,intenable":"=a" (enabled));
return enabled;
}
{
uint32_t pending;
__asm__ __volatile__("esync; rsr %0,interrupt":"=a" (pending));
return pending;
}
#define ETS_SPI_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_SPI_INUM)
@ -78,6 +94,12 @@ typedef void (*int_handler_t)(void*);
#define ETS_UART_INTR_DISABLE() \
ETS_INTR_DISABLE(ETS_UART_INUM)
#define ETS_CCOMPARE0_ENABLE() \
ETS_INTR_ENABLE(ETS_CCOMPARE0_INUM)
#define ETS_CCOMPARE0_DISABLE() \
ETS_INTR_DISABLE(ETS_CCOMPARE0_INUM)
#define ETS_FRC1_INTR_ENABLE() \
ETS_INTR_ENABLE(ETS_FRC_TIMER1_INUM)