From 6e0c0e3dcc8e793b2c328cd0e9a3514f7dee5d09 Mon Sep 17 00:00:00 2001
From: "Earle F. Philhower, III" <earlephilhower@yahoo.com>
Date: Mon, 5 Nov 2018 04:41:18 -0800
Subject: [PATCH] Only stop waveforms actually running in ISR (#5308)

The ISR could end up writing a 0 to a GPIO that had previously been
stopped, effectively overwriting user writes to those pins.  Fix to
only actually disable and write when a pin was enabled and times out.

Fixes #5306
---
 cores/esp8266/core_esp8266_waveform.c | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/cores/esp8266/core_esp8266_waveform.c b/cores/esp8266/core_esp8266_waveform.c
index 04422ef51..8df602020 100644
--- a/cores/esp8266/core_esp8266_waveform.c
+++ b/cores/esp8266/core_esp8266_waveform.c
@@ -282,7 +282,7 @@ static ICACHE_RAM_ATTR void timer1Interrupt() {
   // Check for timed-out waveforms out of the high-frequency toggle loop
   for (size_t i = 0; i < countof(waveform); i++) {
     Waveform *wave = &waveform[i];
-    if (wave->timeLeftCycles) {
+    if (wave->enabled && wave->timeLeftCycles) {
       // Check for unsigned underflow with new > old
       if (deltaCycles >= wave->timeLeftCycles) {
         // Done, remove!