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BREAKING - Use IRAM_ATTR in place of ICACHE_RAM_ATTR (#7921)

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Update the core to use the define that the ESP32 uses, IRAM_ATTR, for
placing code in DRAM.
This commit is contained in:
Earle F. Philhower, III
2021-03-14 16:56:47 -07:00
committed by GitHub
parent 6743a65987
commit 656a33e6f8
26 changed files with 126 additions and 126 deletions
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12
tests/device/test_millis_mm/test_millis_mm.ino
View File

@ -109,7 +109,7 @@ void view_accsum ( const char *desc, uint16_t *acc, uint16_t *itrm )
//---------------------------------------------------------------------------
// FOR BENCHTEST
// Original millis() function
unsigned long ICACHE_RAM_ATTR millis_orig ( void )
unsigned long IRAM_ATTR millis_orig ( void )
{
// Get usec system time, usec overflow conter
uint32_t m = system_get_time();
@ -123,7 +123,7 @@ unsigned long ICACHE_RAM_ATTR millis_orig ( void )
// FOR DEBUG
// Corrected millis(), 64-bit arithmetic gold standard
// truncated to 32-bits by return
unsigned long ICACHE_RAM_ATTR millis_corr_DEBUG( void )
unsigned long IRAM_ATTR millis_corr_DEBUG( void )
{
// Get usec system time, usec overflow conter
uint32_t m = system_get_timeA(); // DEBUG
@ -135,7 +135,7 @@ unsigned long ICACHE_RAM_ATTR millis_corr_DEBUG( void )
//---------------------------------------------------------------------------
// FOR BENCHMARK
unsigned long ICACHE_RAM_ATTR millis_corr ( void )
unsigned long IRAM_ATTR millis_corr ( void )
{
// Get usec system time, usec overflow conter
uint32_t m = system_get_time();
@ -229,7 +229,7 @@ unsigned long ICACHE_RAM_ATTR millis_corr ( void )
//
// Reference function: corrected millis(), 64-bit arithmetic,
// truncated to 32-bits by return
// unsigned long ICACHE_RAM_ATTR millis_corr_DEBUG( void )
// unsigned long IRAM_ATTR millis_corr_DEBUG( void )
// {
// // Get usec system time, usec overflow conter
// ......
@ -246,7 +246,7 @@ unsigned long ICACHE_RAM_ATTR millis_corr ( void )
#define MAGIC_1E3_wLO 0x4bc6a7f0 // LS part
#define MAGIC_1E3_wHI 0x00418937 // MS part, magic multiplier
unsigned long ICACHE_RAM_ATTR millis_test_DEBUG ( void )
unsigned long IRAM_ATTR millis_test_DEBUG ( void )
{
union {
uint64_t q; // Accumulator, 64-bit, little endian
@ -300,7 +300,7 @@ unsigned long ICACHE_RAM_ATTR millis_test_DEBUG ( void )
//---------------------------------------------------------------------------
// FOR BENCHTEST
unsigned long ICACHE_RAM_ATTR millis_test ( void )
unsigned long IRAM_ATTR millis_test ( void )
{
union {
uint64_t q; // Accumulator, 64-bit, little endian

6
tests/host/common/c_types.h
View File

@ -94,16 +94,16 @@ typedef enum {
#define __ICACHE_STRINGIZE_NX(A) #A
#define __ICACHE_STRINGIZE(A) __ICACHE_STRINGIZE_NX(A)
#define ICACHE_FLASH_ATTR __attribute__((section("\".irom0.text." __FILE__ "." __ICACHE_STRINGIZE(__LINE__) "." __ICACHE_STRINGIZE(__COUNTER__) "\"")))
#define ICACHE_RAM_ATTR __attribute__((section("\".iram.text." __FILE__ "." __ICACHE_STRINGIZE(__LINE__) "." __ICACHE_STRINGIZE(__COUNTER__) "\"")))
#define IRAM_ATTR __attribute__((section("\".iram.text." __FILE__ "." __ICACHE_STRINGIZE(__LINE__) "." __ICACHE_STRINGIZE(__COUNTER__) "\"")))
#define ICACHE_RODATA_ATTR __attribute__((section("\".irom.text." __FILE__ "." __ICACHE_STRINGIZE(__LINE__) "." __ICACHE_STRINGIZE(__COUNTER__) "\"")))
#else
#define ICACHE_FLASH_ATTR
#define ICACHE_RAM_ATTR
#define IRAM_ATTR
#define ICACHE_RODATA_ATTR
#endif /* ICACHE_FLASH */
// counterpart https://github.com/espressif/arduino-esp32/blob/master/cores/esp32/esp8266-compat.h
#define IRAM_ATTR ICACHE_RAM_ATTR
#define ICACHE_RAM_ATTR IRAM_ATTR
#define STORE_ATTR __attribute__((aligned(4)))