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BREAKING - Use IRAM_ATTR in place of ICACHE_RAM_ATTR (#7921)

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Update the core to use the define that the ESP32 uses, IRAM_ATTR, for
placing code in DRAM.
This commit is contained in:
Earle F. Philhower, III
2021-03-14 16:56:47 -07:00
committed by GitHub
parent 6743a65987
commit 656a33e6f8
26 changed files with 126 additions and 126 deletions
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doc/faq/a02-my-esp-crashes.rst
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@ -247,8 +247,8 @@ Interrupt Service Routines
cache may kick in for that code. However, the cache currently can't be used
during hardware interrupts. That means that, if you use a hardware ISR, such as
attachInterrupt(gpio, myISR, CHANGE) for a GPIO change, the ISR must have the
ICACHE_RAM_ATTR attribute declared. Not only that, but the entire function tree
called from the ISR must also have the ICACHE_RAM_ATTR declared.
IRAM_ATTR attribute declared. Not only that, but the entire function tree
called from the ISR must also have the IRAM_ATTR declared.
Be aware that every function that has this attribute reduces available memory.
In addition, it is not possible to execute delay() or yield() from an ISR,