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Add code-spell spelling checks to CI (#8067)

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Help find and fix silly spelling errors as they are added to the repo.
This commit is contained in:
Earle F. Philhower, III
2021-05-23 08:53:04 -07:00
committed by GitHub
parent 78a2ed6bd8
commit 60fe7b4ca8
133 changed files with 273 additions and 260 deletions
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16
cores/esp8266/esp8266_peri.h
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@ -163,7 +163,7 @@ extern volatile uint32_t* const esp8266_gpioToFn[16];
#define TCIS 8 //Interrupt Status
#define TCTE 7 //Timer Enable
#define TCAR 6 //AutoReload (restart timer when condition is reached)
#define TCPD 2 //Prescale Devider (2bit) 0:1(12.5ns/tick), 1:16(0.2us/tick), 2/3:256(3.2us/tick)
#define TCPD 2 //Prescale Divider (2bit) 0:1(12.5ns/tick), 1:16(0.2us/tick), 2/3:256(3.2us/tick)
#define TCIT 0 //Interrupt Type 0:edge, 1:level
//RTC Registers
@ -271,7 +271,7 @@ extern volatile uint32_t* const esp8266_gpioToFn[16];
#define UCRXI 19 //Invert RX
#define UCTXRST 18 //Reset TX FIFO
#define UCRXRST 17 //Reset RX FIFO
#define UCTXHFE 15 //TX Harware Flow Enable
#define UCTXHFE 15 //TX Hardware Flow Enable
#define UCLBE 14 //LoopBack Enable
#define UCBRK 8 //Send Break on the TX line
#define UCSWDTR 7 //Set this bit to assert DTR
@ -283,11 +283,11 @@ extern volatile uint32_t* const esp8266_gpioToFn[16];
//UART CONF1 Registers Bits
#define UCTOE 31 //RX TimeOut Enable
#define UCTOT 24 //RX TimeOut Treshold (7bit)
#define UCRXHFE 23 //RX Harware Flow Enable
#define UCRXHFT 16 //RX Harware Flow Treshold (7bit)
#define UCFET 8 //TX FIFO Empty Treshold (7bit)
#define UCFFT 0 //RX FIFO Full Treshold (7bit)
#define UCTOT 24 //RX TimeOut Threshold (7bit)
#define UCRXHFE 23 //RX Hardware Flow Enable
#define UCRXHFT 16 //RX Hardware Flow Threshold (7bit)
#define UCFET 8 //TX FIFO Empty Threshold (7bit)
#define UCFFT 0 //RX FIFO Full Threshold (7bit)
//WDT Feed (the dog) Register
#define WDTFEED ESP8266_REG(0x914)
@ -372,7 +372,7 @@ extern volatile uint32_t* const esp8266_gpioToFn[16];
#define SPI1E3 ESP8266_REG(0x1FC)
#define SPI1W(p) ESP8266_REG(0x140 + ((p & 0xF) * 4))
//SPI0, SPI1 & I2S Interupt Register
//SPI0, SPI1 & I2S Interrupt Register
#define SPIIR ESP8266_DREG(0x20)
#define SPII0 4 //SPI0 Interrupt
#define SPII1 7 //SPI1 Interrupt