diff --git a/hardware/arduino/sam/libraries/Ethernet/utility/w5100.cpp b/hardware/arduino/sam/libraries/Ethernet/utility/w5100.cpp
index d865d9043..5c616d02c 100644
--- a/hardware/arduino/sam/libraries/Ethernet/utility/w5100.cpp
+++ b/hardware/arduino/sam/libraries/Ethernet/utility/w5100.cpp
@@ -26,12 +26,13 @@ W5100Class W5100;
 
 void W5100Class::init(void)
 {
-  SPI.begin(SPI_CS);
-  SPI.setClockDivider(SPI_CS, 255);
-  SPI.setDataMode(SPI_CS, SPI_MODE0);
-
   delay(300);
 
+  SPI.begin(SPI_CS);
+  // Set clock to 4Mhz (W5100 should support up to about 14Mhz)
+  SPI.setClockDivider(SPI_CS, 21);
+  SPI.setDataMode(SPI_CS, SPI_MODE0);
+
   writeMR(1<<RST);
   writeTMSR(0x55);
   writeRMSR(0x55);
diff --git a/hardware/arduino/sam/libraries/SPI/SPI.cpp b/hardware/arduino/sam/libraries/SPI/SPI.cpp
index a39ae3bda..a1a18123b 100644
--- a/hardware/arduino/sam/libraries/SPI/SPI.cpp
+++ b/hardware/arduino/sam/libraries/SPI/SPI.cpp
@@ -26,7 +26,8 @@ void SPIClass::begin(uint8_t _pin) {
 		g_APinDescription[spiPin].ulPinType,
 		g_APinDescription[spiPin].ulPin,
 		g_APinDescription[spiPin].ulPinConfiguration);
-	setClockDivider(_pin, 1);
+	// Default speed set to 500Khz
+	setClockDivider(_pin, 168);
 	setDataMode(_pin, SPI_MODE0);
 }
 
@@ -41,12 +42,16 @@ void SPIClass::end() {
 void SPIClass::setDataMode(uint8_t _pin, uint8_t _mode) {
 	uint32_t _channel = BOARD_PIN_TO_SPI_CHANNEL(_pin);
 	mode[_channel] = _mode | SPI_CSR_CSAAT;
+	// SPI_CSR_DLYBCT(1) keeps CS enabled for 32 MCLK after a completed
+	// transfer. Some device needs that for working properly.
 	SPI_ConfigureNPCS(spi, _channel, mode[_channel] | SPI_CSR_SCBR(divider[_channel]) | SPI_CSR_DLYBCT(1));
 }
 
 void SPIClass::setClockDivider(uint8_t _pin, uint8_t _divider) {
 	uint32_t _channel = BOARD_PIN_TO_SPI_CHANNEL(_pin);
 	divider[_channel] = _divider;
+	// SPI_CSR_DLYBCT(1) keeps CS enabled for 32 MCLK after a completed
+	// transfer. Some device needs that for working properly.
 	SPI_ConfigureNPCS(spi, _channel, mode[_channel] | SPI_CSR_SCBR(divider[_channel]) | SPI_CSR_DLYBCT(1));
 }