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refactored xt_disable_intterupts to accept level

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due to the rsil requirement that the level be a constant, the method was
moved into a macro
This commit is contained in:
Makuna
2015-05-07 12:29:37 -07:00
parent b094b50e18
commit 367962d89e
2 changed files with 12 additions and 18 deletions
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14
cores/esp8266/Arduino.h
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@ -124,11 +124,17 @@ void timer1_write(uint32_t ticks); //maximum ticks 8388607
void ets_intr_lock();
void ets_intr_unlock();
void xt_enable_interrupts();
void xt_disable_interrupts();
// level (0-15),
// level 15 will disable ALL interrupts,
// level 0 will disable most software interrupts
//
#define xt_disable_interrupts(state, level) __asm__ __volatile__("rsil %0," __STRINGIFY(level) "; esync; isync; dsync" : "=a" (state))
#define xt_enable_interrupts(state) __asm__ __volatile__("wsr %0,ps; esync" :: "a" (state) : "memory")
#define interrupts() xt_enable_interrupts();
#define noInterrupts() xt_disable_interrupts();
extern uint32_t interruptsState;
#define interrupts() xt_enable_interrupts(interruptsState)
#define noInterrupts() xt_disable_interrupts(interruptsState, 15)
#define clockCyclesPerMicrosecond() ( F_CPU / 1000000L )
#define clockCyclesToMicroseconds(a) ( (a) / clockCyclesPerMicrosecond() )