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fix SPI speed calculation @160Mhz Clock
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@ -121,14 +121,14 @@ void SPIClass::setBitOrder(uint8_t bitOrder) {
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* @return
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* @return
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*/
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*/
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static uint32_t ClkRegToFreq(spiClk_t * reg) {
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static uint32_t ClkRegToFreq(spiClk_t * reg) {
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return (F_CPU / ((reg->regPre + 1) * (reg->regN + 1)));
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return (SPI_MAX_SPEED / ((reg->regPre + 1) * (reg->regN + 1)));
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}
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}
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void SPIClass::setFrequency(uint32_t freq) {
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void SPIClass::setFrequency(uint32_t freq) {
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static uint32_t lastSetFrequency = 0;
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static uint32_t lastSetFrequency = 0;
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static uint32_t lastSetRegister = 0;
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static uint32_t lastSetRegister = 0;
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if(freq >= F_CPU) {
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if(freq >= SPI_MAX_SPEED) {
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setClockDivider(0x80000000);
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setClockDivider(0x80000000);
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return;
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return;
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}
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}
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@ -164,7 +164,7 @@ void SPIClass::setFrequency(uint32_t freq) {
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reg.regN = calN;
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reg.regN = calN;
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while(calPreVari++ <= 1) { // test different variants for Pre (we calculate in int so we miss the decimals, testing is the easyest and fastest way)
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while(calPreVari++ <= 1) { // test different variants for Pre (we calculate in int so we miss the decimals, testing is the easyest and fastest way)
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calPre = (((F_CPU / (reg.regN + 1)) / freq) - 1) + calPreVari;
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calPre = (((SPI_MAX_SPEED / (reg.regN + 1)) / freq) - 1) + calPreVari;
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if(calPre > 0x1FFF) {
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if(calPre > 0x1FFF) {
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reg.regPre = 0x1FFF; // 8191
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reg.regPre = 0x1FFF; // 8191
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} else if(calPre <= 0) {
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} else if(calPre <= 0) {
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@ -45,6 +45,8 @@
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#define SPI_CLOCK_DIV64 0x04fc1001 //250 KHz
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#define SPI_CLOCK_DIV64 0x04fc1001 //250 KHz
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#endif
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#endif
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#define SPI_MAX_SPEED (80000000L)
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const uint8_t SPI_MODE0 = 0x00; ///< CPOL: 0 CPHA: 0
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const uint8_t SPI_MODE0 = 0x00; ///< CPOL: 0 CPHA: 0
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const uint8_t SPI_MODE1 = 0x01; ///< CPOL: 0 CPHA: 1
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const uint8_t SPI_MODE1 = 0x01; ///< CPOL: 0 CPHA: 1
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const uint8_t SPI_MODE2 = 0x10; ///< CPOL: 1 CPHA: 0
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const uint8_t SPI_MODE2 = 0x10; ///< CPOL: 1 CPHA: 0
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