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Preserve prior bitrate for I2S begin (#6349)

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Fixes #6066

Preserve any existing sample rate for the I2S unit when performing an
`i2s_begin`.  If nothing has ever been set, default to 44.1KHz as
before.
This commit is contained in:
Earle F. Philhower, III 2019-07-28 12:16:31 -07:00 committed by GitHub
parent c6bfec900c
commit 19d09eae2b
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1 changed files with 7 additions and 2 deletions
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9
cores/esp8266/core_esp8266_i2s.cpp
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@ -507,7 +507,6 @@ bool i2s_rxtx_begin(bool enableRx, bool enableTx) {
PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, FUNC_I2SI_WS); PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTMS_U, FUNC_I2SI_WS);
} }
_i2s_sample_rate = 0;
if (!i2s_slc_begin()) { if (!i2s_slc_begin()) {
// OOM in SLC memory allocations, tear it all down and abort! // OOM in SLC memory allocations, tear it all down and abort!
i2s_end(); i2s_end();
@ -530,7 +529,13 @@ bool i2s_rxtx_begin(bool enableRx, bool enableTx) {
// I2STXCMM, I2SRXCMM=0 => Dual channel mode // I2STXCMM, I2SRXCMM=0 => Dual channel mode
I2SCC &= ~((I2STXCMM << I2STXCM) | (I2SRXCMM << I2SRXCM)); // Set RX/TX CHAN_MOD=0 I2SCC &= ~((I2STXCMM << I2STXCM) | (I2SRXCMM << I2SRXCM)); // Set RX/TX CHAN_MOD=0
i2s_set_rate(44100); // Ensure a sane clock is set, but don't change any pre-existing ones.
// But we also need to make sure the other bits weren't reset by a previous
// reset. So, store the present one, clear the flag, then set the same
// value (writing all needed config bits in the process
uint32_t save_rate = _i2s_sample_rate;
_i2s_sample_rate = 0;
i2s_set_rate(save_rate ? save_rate : 44100);
if (rx) { if (rx) {
// Need to prime the # of samples to receive in the engine // Need to prime the # of samples to receive in the engine