From 00f23d3aad7fa30e6e4b08ebd13333d87c1a65c8 Mon Sep 17 00:00:00 2001 From: Cristian Maglie Date: Wed, 14 Jan 2015 00:08:59 +0100 Subject: [PATCH] sam: Fixed initialization of UART/USART mode register --- .../arduino/sam/cores/arduino/UARTClass.cpp | 9 +- .../arduino/sam/cores/arduino/UARTClass.h | 4 +- .../arduino/sam/cores/arduino/USARTClass.cpp | 18 +++- .../arduino/sam/cores/arduino/USARTClass.h | 91 ++++++++++--------- 4 files changed, 69 insertions(+), 53 deletions(-) diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.cpp b/hardware/arduino/sam/cores/arduino/UARTClass.cpp index 93db26272..f8b80e970 100644 --- a/hardware/arduino/sam/cores/arduino/UARTClass.cpp +++ b/hardware/arduino/sam/cores/arduino/UARTClass.cpp @@ -35,17 +35,18 @@ UARTClass::UARTClass( Uart *pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer *p // Public Methods ////////////////////////////////////////////////////////////// -void UARTClass::begin( const uint32_t dwBaudRate ) +void UARTClass::begin(const uint32_t dwBaudRate) { begin(dwBaudRate, Mode_8N1); } void UARTClass::begin(const uint32_t dwBaudRate, const UARTModes config) { - init(dwBaudRate, static_cast(config)); + uint32_t modeReg = static_cast(config) & 0x00000E00; + init(dwBaudRate, modeReg | UART_MR_CHMODE_NORMAL); } -void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config) +void UARTClass::init(const uint32_t dwBaudRate, const uint32_t modeReg) { // Configure PMC pmc_enable_periph_clk( _dwId ); @@ -57,7 +58,7 @@ void UARTClass::init(const uint32_t dwBaudRate, const uint32_t config) _pUart->UART_CR = UART_CR_RSTRX | UART_CR_RSTTX | UART_CR_RXDIS | UART_CR_TXDIS; // Configure mode - _pUart->UART_MR = (config & 0x00000E00) | UART_MR_CHMODE_NORMAL; + _pUart->UART_MR = modeReg; // Configure baudrate (asynchronous, no oversampling) _pUart->UART_BRGR = (SystemCoreClock / dwBaudRate) >> 4; diff --git a/hardware/arduino/sam/cores/arduino/UARTClass.h b/hardware/arduino/sam/cores/arduino/UARTClass.h index d86d04dc4..3747d8beb 100644 --- a/hardware/arduino/sam/cores/arduino/UARTClass.h +++ b/hardware/arduino/sam/cores/arduino/UARTClass.h @@ -39,8 +39,8 @@ class UARTClass : public HardwareSerial Mode_8N1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_NO, Mode_8E1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_EVEN, Mode_8O1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_ODD, - Mode_8M1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_MARK, - Mode_8S1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_SPACE, + Mode_8M1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_MARK, + Mode_8S1 = US_MR_CHRL_8_BIT | US_MR_NBSTOP_1_BIT | UART_MR_PAR_SPACE, }; UARTClass(Uart* pUart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer); diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.cpp b/hardware/arduino/sam/cores/arduino/USARTClass.cpp index 428ac39ed..10a6d175c 100644 --- a/hardware/arduino/sam/cores/arduino/USARTClass.cpp +++ b/hardware/arduino/sam/cores/arduino/USARTClass.cpp @@ -32,8 +32,22 @@ USARTClass::USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffe // Public Methods ////////////////////////////////////////////////////////////// -void USARTClass::begin( const uint32_t dwBaudRate, const USARTModes config ) +void USARTClass::begin(const uint32_t dwBaudRate) { - UARTClass::init(dwBaudRate, static_cast(config)); + begin(dwBaudRate, Mode_8N1); +} + +void USARTClass::begin(const uint32_t dwBaudRate, const UARTModes config) +{ + uint32_t modeReg = static_cast(config); + modeReg |= US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL; + init(dwBaudRate, modeReg); +} + +void USARTClass::begin(const uint32_t dwBaudRate, const USARTModes config) +{ + uint32_t modeReg = static_cast(config); + modeReg |= US_MR_USART_MODE_NORMAL | US_MR_USCLKS_MCK | US_MR_CHMODE_NORMAL; + init(dwBaudRate, modeReg); } diff --git a/hardware/arduino/sam/cores/arduino/USARTClass.h b/hardware/arduino/sam/cores/arduino/USARTClass.h index 899488016..5d5704990 100644 --- a/hardware/arduino/sam/cores/arduino/USARTClass.h +++ b/hardware/arduino/sam/cores/arduino/USARTClass.h @@ -65,53 +65,54 @@ class USARTClass : public UARTClass { + public: + // 8x1 bit modes are inherited from UARTClass + enum USARTModes { + Mode_5N1 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_6N1 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_7N1 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, + Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, + Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, + Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, + Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, + Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, + Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, + Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, + Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, + Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, + }; + + USARTClass(Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer); + + void begin(const uint32_t dwBaudRate); + void begin(const uint32_t dwBaudRate, const USARTModes config); + void begin(const uint32_t dwBaudRate, const UARTModes config); + protected: Usart* _pUsart; - - public: - // 8 bit modes are inherited from UARTClass - enum USARTModes { - Mode_5N1 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, - Mode_6N1 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, - Mode_7N1 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_1_BIT, - Mode_5N2 = US_MR_CHRL_5_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_6N2 = US_MR_CHRL_6_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_7N2 = US_MR_CHRL_7_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_8N2 = US_MR_CHRL_8_BIT | US_MR_PAR_NO | US_MR_NBSTOP_2_BIT, - Mode_5E1 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, - Mode_6E1 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, - Mode_7E1 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_1_BIT, - Mode_5E2 = US_MR_CHRL_5_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_6E2 = US_MR_CHRL_6_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_7E2 = US_MR_CHRL_7_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_8E2 = US_MR_CHRL_8_BIT | US_MR_PAR_EVEN | US_MR_NBSTOP_2_BIT, - Mode_5O1 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, - Mode_6O1 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, - Mode_7O1 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_1_BIT, - Mode_5O2 = US_MR_CHRL_5_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - Mode_6O2 = US_MR_CHRL_6_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - Mode_7O2 = US_MR_CHRL_7_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - Mode_8O2 = US_MR_CHRL_8_BIT | US_MR_PAR_ODD | US_MR_NBSTOP_2_BIT, - Mode_5M1 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, - Mode_6M1 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, - Mode_7M1 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_1_BIT, - Mode_5M2 = US_MR_CHRL_5_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, - Mode_6M2 = US_MR_CHRL_6_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, - Mode_7M2 = US_MR_CHRL_7_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, - Mode_8M2 = US_MR_CHRL_8_BIT | US_MR_PAR_MARK | US_MR_NBSTOP_2_BIT, - Mode_5S1 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, - Mode_6S1 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, - Mode_7S1 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_1_BIT, - Mode_5S2 = US_MR_CHRL_5_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, - Mode_6S2 = US_MR_CHRL_6_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, - Mode_7S2 = US_MR_CHRL_7_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, - Mode_8S2 = US_MR_CHRL_8_BIT | US_MR_PAR_SPACE | US_MR_NBSTOP_2_BIT, - }; - - USARTClass( Usart* pUsart, IRQn_Type dwIrq, uint32_t dwId, RingBuffer* pRx_buffer, RingBuffer* pTx_buffer ); - - void begin( const uint32_t dwBaudRate , const USARTModes config ); - using UARTClass::begin; // Needed only for polymorphic methods }; #endif // _USART_CLASS_