arduino/arduino-LoRa
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Add support for implicit header mode and SF 6

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This commit is contained in:
Sandeep Mistry 2016-10-22 14:33:27 -04:00
parent 9b19623a1c
commit 8aa75b10a3
2 changed files with 62 additions and 13 deletions
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59
src/LoRa.cpp
View File

@ -51,6 +51,7 @@ LoRaClass::LoRaClass() :
_ss(LORA_DEFAULT_SS_PIN), _reset(LORA_DEFAULT_RESET_PIN), _dio0(LORA_DEFAULT_DIO0_PIN),
_frequency(0),
_packetIndex(0),
_implicitHeaderMode(0),
_onReceive(NULL)
{
}
@ -110,11 +111,17 @@ void LoRaClass::end()
SPI.end();
}
int LoRaClass::beginPacket()
int LoRaClass::beginPacket(bool implicitHeader)
{
// put in standby mode
idle();
if (implicitHeader) {
implicitHeaderMode();
} else {
explicitHeaderMode();
}
// reset FIFO address and paload length
writeRegister(REG_FIFO_ADDR_PTR, 0);
writeRegister(REG_PAYLOAD_LENGTH, 0);
@ -136,11 +143,19 @@ int LoRaClass::endPacket()
return 1;
}
int LoRaClass::parsePacket()
int LoRaClass::parsePacket(int size)
{
int packetLength = 0;
int irqFlags = readRegister(REG_IRQ_FLAGS);
if (size > 0) {
implicitHeaderMode();
writeRegister(REG_PAYLOAD_LENGTH, size & 0xff);
} else {
explicitHeaderMode();
}
// clear IRQ's
writeRegister(REG_IRQ_FLAGS, irqFlags);
@ -149,7 +164,11 @@ int LoRaClass::parsePacket()
_packetIndex = 0;
// read packet length
if (_implicitHeaderMode) {
packetLength = readRegister(REG_PAYLOAD_LENGTH);
} else {
packetLength = readRegister(REG_RX_NB_BYTES);
}
// set FIFO address to current RX address
writeRegister(REG_FIFO_ADDR_PTR, readRegister(REG_FIFO_RX_CURRENT_ADDR));
@ -255,8 +274,16 @@ void LoRaClass::onReceive(void(*callback)(int))
}
}
void LoRaClass::receive()
void LoRaClass::receive(int size)
{
if (size > 0) {
implicitHeaderMode();
writeRegister(REG_PAYLOAD_LENGTH, size & 0xff);
} else {
explicitHeaderMode();
}
writeRegister(REG_OP_MODE, MODE_LONG_RANGE_MODE | MODE_RX_CONTINUOUS);
}
@ -299,15 +326,19 @@ void LoRaClass::setTxPower(int level)
void LoRaClass::setSpreadingFactor(int sf)
{
if (sf < 7) {
sf = 7;
if (sf < 6) {
sf = 6;
} else if (sf > 12) {
sf = 12;
}
writeRegister(REG_MODEM_CONFIG_1, readRegister(REG_MODEM_CONFIG_1) & 0xfe);
if (sf == 6) {
writeRegister(REG_DETECTION_OPTIMIZE, 0xc5);
writeRegister(REG_DETECTION_THRESHOLD, 0x0c);
} else {
writeRegister(REG_DETECTION_OPTIMIZE, 0xc3);
writeRegister(REG_DETECTION_THRESHOLD, 0x0a);
}
writeRegister(REG_MODEM_CONFIG_2, (readRegister(REG_MODEM_CONFIG_2) & 0x0f) | ((sf << 4) & 0xf0));
}
@ -392,6 +423,20 @@ void LoRaClass::dumpRegisters(Stream& out)
}
}
void LoRaClass::explicitHeaderMode()
{
_implicitHeaderMode = 0;
writeRegister(REG_MODEM_CONFIG_1, readRegister(REG_MODEM_CONFIG_1) & 0xfe);
}
void LoRaClass::implicitHeaderMode()
{
_implicitHeaderMode = 1;
writeRegister(REG_MODEM_CONFIG_1, readRegister(REG_MODEM_CONFIG_1) | 0x01);
}
void LoRaClass::handleDio0Rise()
{
int irqFlags = readRegister(REG_IRQ_FLAGS);
@ -404,7 +449,7 @@ void LoRaClass::handleDio0Rise()
_packetIndex = 0;
// read packet length
int packetLength = readRegister(REG_RX_NB_BYTES);
int packetLength = _implicitHeaderMode ? readRegister(REG_PAYLOAD_LENGTH) : readRegister(REG_RX_NB_BYTES);
// set FIFO address to current RX address
writeRegister(REG_FIFO_ADDR_PTR, readRegister(REG_FIFO_RX_CURRENT_ADDR));

10
src/LoRa.h
View File

@ -15,10 +15,10 @@ public:
int begin(long frequency);
void end();
int beginPacket();
int beginPacket(bool implicitHeader = false);
int endPacket();
int parsePacket();
int parsePacket(int size = 0);
int packetRssi();
float packetSnr();
@ -34,7 +34,7 @@ public:
void onReceive(void(*callback)(int));
void receive();
void receive(int size = 0);
void idle();
void sleep();
@ -55,6 +55,9 @@ public:
void dumpRegisters(Stream& out);
private:
void explicitHeaderMode();
void implicitHeaderMode();
void handleDio0Rise();
uint8_t readRegister(uint8_t address);
@ -70,6 +73,7 @@ private:
int _dio0;
int _frequency;
int _packetIndex;
int _implicitHeaderMode;
void (*_onReceive)(int);
};